Re: [i386] scalar ops that preserve the high part of a vector

[Uros Bizjak <ubizjak@gmail.com>]

On Fri, Dec 7, 2012 at 7:49 AM, Michael Zolotukhin
<michael.v.zolotukhin@gmail.com> wrote:
> Hi guys,
> Could I ask several questions just to clarify the things up?
>
> 1) Does the root problem lay in the fact that even for scalar
> additions we perform the addition on the whole vector and only then
> drop the higher parts of the vector? I.e. to fix the test from the PR
> we need to replace plus on vector mode with plus on scalar mode?

Yes, existing pattern is used to implement intrinsics, and it is
modelled with vector operand 2. But we in fact emit scalar operation,
so we would like to model the pattern with a scalar operand 2. This
way, the same pattern can be used to emit intrinsics _and_ can be used
to optimize the code from the testcase at the same time. Also, please
note that alignment requirements for vector operand and scalar
operands are different.

> 2) Is one of the main requirements having the same pattern for V4SF
> and V2DF version?

It is not required, but having macroized pattern avoids pattern
explosion, eases maintenance (it is easier to understand similar
functionality if it is described in some uniform way), and in some
cases, macroization opportunities force author to rethink the RTL
description, making the patterns more "universal".

Uros.