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* [PATCH] Allow _mm256_clmulepi64_epi128 even for just -mvcplmulqdq -mavx (PR target/88541)
@ 2018-12-18 20:53 Jakub Jelinek
  2018-12-19  8:23 ` Uros Bizjak
  0 siblings, 1 reply; 2+ messages in thread
From: Jakub Jelinek @ 2018-12-18 20:53 UTC (permalink / raw)
  To: Uros Bizjak; +Cc: gcc-patches

Hi!

As mentioned in the PR, there is a VEX encoded vpclmulqdq instruction
with ymm arguments that needs VPCLMULQDQ ISA, and then EVEX encoded
vpclmulqdq with zmm arguments that needs VPCLMULQDQ + AVX512F ISAs and
vpclmulqdq with xmm or ymm arguments that needs VPCLMULQDQ + AVX512VL ISAs.

So, _mm256_clmulepi64_epi128 can be done just with AVX (so that VEX encoded
instructions are handled) + VPCLMULQDQ ISAs.
The corresponding builtin matches this:
BDESC (OPTION_MASK_ISA_VPCLMULQDQ | OPTION_MASK_ISA_AVX, CODE_FOR_vpclmulqdq_v4di, "__builtin_ia32_vpclmulqdq_v4di", IX86_BUILTIN_VPCLMULQDQ4, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_INT)

Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for
trunk?

2018-12-18  Jakub Jelinek  <jakub@redhat.com>

	PR target/88541
	* config/i386/vpclmulqdqintrin.h (_mm256_clmulepi64_epi128): Enable
	for -mavx -mvpclmulqdq rather than just for -mavx512vl -mvpclmulqdq.

	* gcc.target/i386/avx-vpclmulqdq-1.c: New test.

--- gcc/config/i386/vpclmulqdqintrin.h.jj	2018-06-13 10:05:54.775128332 +0200
+++ gcc/config/i386/vpclmulqdqintrin.h	2018-12-18 20:09:37.693666571 +0100
@@ -53,9 +53,9 @@ _mm512_clmulepi64_epi128 (__m512i __A, _
 #pragma GCC pop_options
 #endif /* __DISABLE_VPCLMULQDQF__ */
 
-#if !defined(__VPCLMULQDQ__) || !defined(__AVX512VL__)
+#if !defined(__VPCLMULQDQ__) || !defined(__AVX__)
 #pragma GCC push_options
-#pragma GCC target("vpclmulqdq,avx512vl")
+#pragma GCC target("vpclmulqdq,avx")
 #define __DISABLE_VPCLMULQDQ__
 #endif /* __VPCLMULQDQ__ */
 
@@ -78,6 +78,4 @@ _mm256_clmulepi64_epi128 (__m256i __A, _
 #pragma GCC pop_options
 #endif /* __DISABLE_VPCLMULQDQ__ */
 
-
 #endif /* _VPCLMULQDQINTRIN_H_INCLUDED */
-
--- gcc/testsuite/gcc.target/i386/avx-vpclmulqdq-1.c.jj	2018-12-18 20:13:28.683960294 +0100
+++ gcc/testsuite/gcc.target/i386/avx-vpclmulqdq-1.c	2018-12-18 20:12:41.140723131 +0100
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx -mvpclmulqdq" } */
+
+#include <x86intrin.h>
+
+__m256i
+foo (__m256i x, __m256i y)
+{
+  return _mm256_clmulepi64_epi128 (x, y, 0);
+}

	Jakub

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] Allow _mm256_clmulepi64_epi128 even for just -mvcplmulqdq -mavx (PR target/88541)
  2018-12-18 20:53 [PATCH] Allow _mm256_clmulepi64_epi128 even for just -mvcplmulqdq -mavx (PR target/88541) Jakub Jelinek
@ 2018-12-19  8:23 ` Uros Bizjak
  0 siblings, 0 replies; 2+ messages in thread
From: Uros Bizjak @ 2018-12-19  8:23 UTC (permalink / raw)
  To: Jakub Jelinek; +Cc: gcc-patches

On Tue, Dec 18, 2018 at 9:53 PM Jakub Jelinek <jakub@redhat.com> wrote:
>
> Hi!
>
> As mentioned in the PR, there is a VEX encoded vpclmulqdq instruction
> with ymm arguments that needs VPCLMULQDQ ISA, and then EVEX encoded
> vpclmulqdq with zmm arguments that needs VPCLMULQDQ + AVX512F ISAs and
> vpclmulqdq with xmm or ymm arguments that needs VPCLMULQDQ + AVX512VL ISAs.
>
> So, _mm256_clmulepi64_epi128 can be done just with AVX (so that VEX encoded
> instructions are handled) + VPCLMULQDQ ISAs.
> The corresponding builtin matches this:
> BDESC (OPTION_MASK_ISA_VPCLMULQDQ | OPTION_MASK_ISA_AVX, CODE_FOR_vpclmulqdq_v4di, "__builtin_ia32_vpclmulqdq_v4di", IX86_BUILTIN_VPCLMULQDQ4, UNKNOWN, (int) V4DI_FTYPE_V4DI_V4DI_INT)
>
> Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for
> trunk?
>
> 2018-12-18  Jakub Jelinek  <jakub@redhat.com>
>
>         PR target/88541
>         * config/i386/vpclmulqdqintrin.h (_mm256_clmulepi64_epi128): Enable
>         for -mavx -mvpclmulqdq rather than just for -mavx512vl -mvpclmulqdq.
>
>         * gcc.target/i386/avx-vpclmulqdq-1.c: New test.

OK.

Thanks,
Uros.

> --- gcc/config/i386/vpclmulqdqintrin.h.jj       2018-06-13 10:05:54.775128332 +0200
> +++ gcc/config/i386/vpclmulqdqintrin.h  2018-12-18 20:09:37.693666571 +0100
> @@ -53,9 +53,9 @@ _mm512_clmulepi64_epi128 (__m512i __A, _
>  #pragma GCC pop_options
>  #endif /* __DISABLE_VPCLMULQDQF__ */
>
> -#if !defined(__VPCLMULQDQ__) || !defined(__AVX512VL__)
> +#if !defined(__VPCLMULQDQ__) || !defined(__AVX__)
>  #pragma GCC push_options
> -#pragma GCC target("vpclmulqdq,avx512vl")
> +#pragma GCC target("vpclmulqdq,avx")
>  #define __DISABLE_VPCLMULQDQ__
>  #endif /* __VPCLMULQDQ__ */
>
> @@ -78,6 +78,4 @@ _mm256_clmulepi64_epi128 (__m256i __A, _
>  #pragma GCC pop_options
>  #endif /* __DISABLE_VPCLMULQDQ__ */
>
> -
>  #endif /* _VPCLMULQDQINTRIN_H_INCLUDED */
> -
> --- gcc/testsuite/gcc.target/i386/avx-vpclmulqdq-1.c.jj 2018-12-18 20:13:28.683960294 +0100
> +++ gcc/testsuite/gcc.target/i386/avx-vpclmulqdq-1.c    2018-12-18 20:12:41.140723131 +0100
> @@ -0,0 +1,10 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mavx -mvpclmulqdq" } */
> +
> +#include <x86intrin.h>
> +
> +__m256i
> +foo (__m256i x, __m256i y)
> +{
> +  return _mm256_clmulepi64_epi128 (x, y, 0);
> +}
>
>         Jakub

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2018-12-19  8:23 UTC | newest]

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2018-12-18 20:53 [PATCH] Allow _mm256_clmulepi64_epi128 even for just -mvcplmulqdq -mavx (PR target/88541) Jakub Jelinek
2018-12-19  8:23 ` Uros Bizjak

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