Attached patch converts a bunch of indirect function calls to use
generic gen_{add2,sub3,extend}_insn functions. The patch corrects
and<mode>3 expander, which generated invalid RTX (non-existent
QI/HImode->DImode extend instructions for 32bit STV targets), so fake
insn-and-split patterns were necessary. The new approach is to leave
DImode and instructions up to STV pass, and split them just before
register allocation to zero-extends.

2019-06-13  Uroš Bizjak  <ubizjak@gmail.com>

    * config/i386/i386.md (SWIM1248s): Rename from SWIM1248x.
    Update all uses.
    (and<mode>3): Use gen_extend_insn instead of indirect functions.
    Do not generate DImode extends for 32bit targets.
    (and->zext post-reload splitter): Use gen_extend_insn
    instead of indirect functions.
    (anddi->zext pre-reload splitter): New.
    (*zext<mode>_doubleword_and): Remove.
    (*zext<mode>_doubleword): Ditto.
    (*zextsi_doubleword): Dittto.

2019-06-13  Uroš Bizjak  <ubizjak@gmail.com>

    * config/i386/i386-expand.c (ix86_expand_int_sse_cmp):
    Use gen_sub3_insn instead of indirect function.
    (ix86_expand_ashl_const): Use gen_add2_insn instead of
    indirect function.
    (ix86_adjust_counter): Ditto.

Patch was bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline SVN.

Uros.