From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by sourceware.org (Postfix) with ESMTPS id 533D33858020 for ; Tue, 15 Aug 2023 06:36:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 533D33858020 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-52256241c50so6912488a12.3 for ; Mon, 14 Aug 2023 23:36:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692081364; x=1692686164; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=lCcoUnftLx2rfbhZTUC5rII2ePXfiHNfeELvGfL4l9Q=; b=RwAgC87zgrrQURmOSGjyk44yng31lZHWPfys6B0dQyAaJV5I54PtAVhaAUQNfYDzTc Wy8U/X7QrFo+BPAEPLxMzc3QZQNUR1rjQIoixXarT0OJlZl+O/JwIkCTJXdVyJdt7cQJ N+xWGrRXGYXDDw8BQ9UgGzJEY22omrDpoVBa9WnPl10/DHCCDawgYrwVPXGelj90ZCzw 8KThBgau4qYMCaEKXdNgrlJBYhlI4eOdjegTbFkgsf58/MwAjMDMWsNYAub6cVTylRjc undsgpEcfBgwtPAHtiXDk/X/SfF2NAgBr5Iem84FlJGR5EPZOk8nktd14M9+V0AbPE8g z05w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692081364; x=1692686164; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lCcoUnftLx2rfbhZTUC5rII2ePXfiHNfeELvGfL4l9Q=; b=fQgOPqyam2d5bY6DoYkcDUakAcc3VdVMnJzuUH2WDWDM6mMaeWZW9r2KpG2YLIzY0w Qh9xNquPCeHDA1+xrAdEF+q/tS7HSimNSNBCEglp+CVQyH5DqhClKLcOXrVgXlo5bOZ/ pmaVgMYYcLt83nctAm/QIK9OyiTIn0ZmQTTBcwLVtggTtkwdVUu+bpJURQUcvvEImZdT TBCMXKrWD2cT8WVxVbsDzDX5I3fsm3VrhBCpdFMQuYsPW7h5bA601Mfoy8MEbMnl8e97 fUYFLQ9DxkME0fXIfY9ZyyUrLJNbqVvGHP4V3nw3VjY8/u3XjnO8bCVAhg9IO2LeCqL3 8QMg== X-Gm-Message-State: AOJu0YxUN/oVMUWr1XIlicfpFP5j0zZtJHHI0G3rkAGCKzL9sl/Y7aDP RKDn/bnDd8r/h/1HN5pMO870LjRHykY2Yozg0Dk= X-Google-Smtp-Source: AGHT+IEALIUKviXtZkpGLCGp3cRgd6xHM5MAwAeSv2Z/KPmtEc4ildCE1/8b+wjRQouqblbdrS8MuKSTFUma99G70hA= X-Received: by 2002:a05:6402:799:b0:522:3d36:ff27 with SMTP id d25-20020a056402079900b005223d36ff27mr9384025edy.31.1692081363684; Mon, 14 Aug 2023 23:36:03 -0700 (PDT) MIME-Version: 1.0 References: <20230814024600.1594913-1-hongtao.liu@intel.com> In-Reply-To: <20230814024600.1594913-1-hongtao.liu@intel.com> From: Uros Bizjak Date: Tue, 15 Aug 2023 08:35:52 +0200 Message-ID: Subject: Re: [PATCH] Generate vmovapd instead of vmovsd for moving DFmode between SSE_REGS. To: liuhongt Cc: gcc-patches@gcc.gnu.org, crazylht@gmail.com, hjl.tools@gmail.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Mon, Aug 14, 2023 at 4:46=E2=80=AFAM liuhongt via Gcc-patches wrote: > > vmovapd can enable register renaming and have same code size as > vmovsd. Similar for vmovsh vs vmovaps, vmovaps is 1 byte less than > vmovsh. > > When TARGET_AVX512VL is not available, still generate > vmovsd/vmovss/vmovsh to avoid vmovapd/vmovaps zmm16-31. > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. > Ok for trunk? > > gcc/ChangeLog: > > * config/i386/i386.md (movdf_internal): Generate vmovapd instead = of > vmovsd when moving DFmode between SSE_REGS. > (movhi_internal): Generate vmovdqa instead of vmovsh when > moving HImode between SSE_REGS. > (mov_internal): Use vmovaps instead of vmovsh when > moving HF/BFmode between SSE_REGS. > > gcc/testsuite/ChangeLog: > > * gcc.target/i386/pr89229-4a.c: Adjust testcase. LGTM. Thanks, Uros. > --- > gcc/config/i386/i386.md | 20 +++++++++++++++++--- > gcc/testsuite/gcc.target/i386/pr89229-4a.c | 4 +--- > 2 files changed, 18 insertions(+), 6 deletions(-) > > diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md > index c906d75b13e..77182e34fe1 100644 > --- a/gcc/config/i386/i386.md > +++ b/gcc/config/i386/i386.md > @@ -2961,8 +2961,12 @@ (define_insn "*movhi_internal" > ] > (const_string "TI")) > (eq_attr "alternative" "12") > - (cond [(match_test "TARGET_AVX512FP16") > + (cond [(match_test "TARGET_AVX512VL") > + (const_string "TI") > + (match_test "TARGET_AVX512FP16") > (const_string "HF") > + (match_test "TARGET_AVX512F") > + (const_string "SF") > (match_test "TARGET_AVX") > (const_string "TI") > (ior (not (match_test "TARGET_SSE2")) > @@ -4099,8 +4103,12 @@ (define_insn "*movdf_internal" > > /* movaps is one byte shorter for non-AVX targets. */ > (eq_attr "alternative" "13,17") > - (cond [(match_test "TARGET_AVX") > + (cond [(match_test "TARGET_AVX512VL") > + (const_string "V2DF") > + (match_test "TARGET_AVX512F") > (const_string "DF") > + (match_test "TARGET_AVX") > + (const_string "V2DF") > (ior (not (match_test "TARGET_SSE2")) > (match_test "optimize_function_for_size_p (c= fun)")) > (const_string "V4SF") > @@ -4380,8 +4388,14 @@ (define_insn "*mov_internal" > (const_string "HI") > (const_string "TI")) > (eq_attr "alternative" "5") > - (cond [(match_test "TARGET_AVX512FP16") > + (cond [(match_test "TARGET_AVX512VL") > + (const_string "V4SF") > + (match_test "TARGET_AVX512FP16") > (const_string "HF") > + (match_test "TARGET_AVX512F") > + (const_string "SF") > + (match_test "TARGET_AVX") > + (const_string "V4SF") > (ior (match_test "TARGET_SSE_PARTIAL_REG_DEPENDEN= CY") > (match_test "TARGET_SSE_SPLIT_REGS")) > (const_string "V4SF") > diff --git a/gcc/testsuite/gcc.target/i386/pr89229-4a.c b/gcc/testsuite/g= cc.target/i386/pr89229-4a.c > index 5bc10d25619..8869650b0ad 100644 > --- a/gcc/testsuite/gcc.target/i386/pr89229-4a.c > +++ b/gcc/testsuite/gcc.target/i386/pr89229-4a.c > @@ -1,4 +1,4 @@ > -/* { dg-do compile { target { ! ia32 } } } */ > +/* { dg-do assemble { target { ! ia32 } } } */ > /* { dg-options "-O2 -march=3Dskylake-avx512" } */ > > extern double d; > @@ -12,5 +12,3 @@ foo1 (double x) > asm volatile ("" : "+v" (xmm17)); > d =3D xmm17; > } > - > -/* { dg-final { scan-assembler-not "vmovapd" } } */ > -- > 2.31.1 >