From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 123686 invoked by alias); 18 May 2017 18:13:40 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 123664 invoked by uid 89); 18 May 2017 18:13:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-9.9 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,GIT_PATCH_2,GIT_PATCH_3,KAM_ASCII_DIVIDERS,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=ham version=3.3.2 spammy=vm, 1718, historic, 1115 X-HELO: mail-ua0-f172.google.com Received: from mail-ua0-f172.google.com (HELO mail-ua0-f172.google.com) (209.85.217.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 18 May 2017 18:13:37 +0000 Received: by mail-ua0-f172.google.com with SMTP id y4so7176794uay.2 for ; Thu, 18 May 2017 11:13:40 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=HXqQj7ERdzbsyUG9d1ciTwfJjtK99GRGViz0TZJNSFQ=; b=paUP2/Q949Oy31wjHd6PkwxF1LHJDoG4qJZOjZdyzbAYED9cvzHsbtzzSXiaBpO45Q TUWF0S3VNbSAofhQVdpejbZeko0nJ3th/XmSBsiE9T7elbsgeMZ0rqlE6jMPjJ8PyNed c3zKLfNXDuOAMohD6MbgkJAlb12fvQOpiC37/l9rXmN+wTcxXEtSNj3ZdDSDQMNI3vS+ tU45ahmr633L5Rg3w+qOROLDtsEoDIRp3Tu7y1BQONVGdt6TvkyvGzQUNpPZV0zLFqkE 5DNi/ZdTBt5CIkZgdJzmDyNi5Jp1/bVIIFFqlL4jJGF9v7XrdiFNzhU9nlO4fps0oTHL xrpw== X-Gm-Message-State: AODbwcC8mnr9ut4DdbBh1LLu1+YghCpdOm2rCM954heChJaydie3Q1KY suvc1OvjBx1TJz7+YMJ7zjXAkHDrxKiB X-Received: by 10.176.75.29 with SMTP id h29mr2301324uaf.40.1495131218581; Thu, 18 May 2017 11:13:38 -0700 (PDT) MIME-Version: 1.0 Received: by 10.103.48.200 with HTTP; Thu, 18 May 2017 11:13:37 -0700 (PDT) From: Uros Bizjak Date: Thu, 18 May 2017 18:20:00 -0000 Message-ID: Subject: [PATCH, i386]: Fix PR 80799: x86-32 generates MMX without EMMS To: "gcc-patches@gcc.gnu.org" Content-Type: multipart/mixed; boundary="f403045e71502d4551054fd05dab" X-SW-Source: 2017-05/txt/msg01492.txt.bz2 --f403045e71502d4551054fd05dab Content-Type: text/plain; charset="UTF-8" Content-length: 904 Hello! Attached patch fixes unwanted MMX reg generation on x86-32 by also allowing target to allocate SSE registers for MMX moves. The difference between x86-32 and x86-64 was historic, and is not needed any more. The patch also adds one missing inter-unit move handling to vec_concatv2di. 2017-05-18 Uros Bizjak PR target/80799 * config/i386/mmx.md (*mov_internal): Enable alternatives 11, 12, 13 and 14 also for 32bit targets. Remove alternatives 15, 16, 17 and 18. * config/i386/sse.md (vec_concatv2di): Change alternative (!x, *y) to (x, ?!*Yn). testsuite/ChangeLog: 2017-05-18 Uros Bizjak PR target/80799 * g++.dg/other/i386-11.C: New test. Patch was bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN, will be backported to release branches in a couple of days. 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