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From: Uros Bizjak <ubizjak@gmail.com>
To: Haochen Jiang <haochen.jiang@intel.com>
Cc: gcc-patches@gcc.gnu.org, hongtao.liu@intel.com
Subject: Re: [PATCH v3] i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW
Date: Tue, 21 May 2024 15:04:26 +0200	[thread overview]
Message-ID: <CAFULd4ZpBWGqoFJviKaMAWHeisPmq12n_dK9imxo+EkuEYhfDg@mail.gmail.com> (raw)
In-Reply-To: <20240521090109.2436971-1-haochen.jiang@intel.com>

On Tue, May 21, 2024 at 11:01 AM Haochen Jiang <haochen.jiang@intel.com> wrote:
>
> Hi all,
>
> This is the v3 patch to fix PR115069. The new testcase has passed.
>
> Changes in v3:
>   - Simplify the testcase.
>
> Changes in v2:
>   - Add a testcase.
>   - Change the comment for the early exit.
>
> Thx,
> Haochen
>
> Since vpermq is really slow, we should avoid using it for permutation
> when vpmovwb is not available (needs AVX512BW) for ix86_expand_vecop_qihi2
> and fall back to ix86_expand_vecop_qihi.
>
> gcc/ChangeLog:
>
>         PR target/115069
>         * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
>         Do not enable the optimization when AVX512BW is not enabled.
>
> gcc/testsuite/ChangeLog:
>
>         PR target/115069
>         * gcc.target/i386/pr115069.c: New.

LGTM, with a nit below.

Thanks,
Uros.

> ---
>  gcc/config/i386/i386-expand.cc           |  7 +++++++
>  gcc/testsuite/gcc.target/i386/pr115069.c | 10 ++++++++++
>  2 files changed, 17 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr115069.c
>
> diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
> index a6132911e6a..f7939761879 100644
> --- a/gcc/config/i386/i386-expand.cc
> +++ b/gcc/config/i386/i386-expand.cc
> @@ -24323,6 +24323,13 @@ ix86_expand_vecop_qihi2 (enum rtx_code code, rtx dest, rtx op1, rtx op2)
>    bool op2vec = GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT;
>    bool uns_p = code != ASHIFTRT;
>
> +  /* Without VPMOVWB (provided by AVX512BW ISA), the expansion uses the
> +     generic permutation to merge the data back into the right place.  This
> +     permutation results in VPERMQ, which is slow, so better fall back to
> +     ix86_expand_vecop_qihi.  */
> +  if (!TARGET_AVX512BW)
> +    return false;
> +
>    if ((qimode == V16QImode && !TARGET_AVX2)
>        || (qimode == V32QImode && (!TARGET_AVX512BW || !TARGET_EVEX512))
>        /* There are no V64HImode instructions.  */
> diff --git a/gcc/testsuite/gcc.target/i386/pr115069.c b/gcc/testsuite/gcc.target/i386/pr115069.c
> new file mode 100644
> index 00000000000..7f1ff209f26
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr115069.c
> @@ -0,0 +1,10 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mavx2" } */
> +/* { dg-final { scan-assembler-not "vpermq" } } */
> +
> +typedef char v16qi __attribute__((vector_size(16)));
> +
> +v16qi foo (v16qi a, v16qi b) {
> +    return a * b;
> +}
> +

Please remove the trailing line.

> --
> 2.31.1
>

  reply	other threads:[~2024-05-21 13:04 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-21  6:16 [PATCH] " Haochen Jiang
2024-05-21  6:17 ` Hongtao Liu
2024-05-21  6:35 ` Uros Bizjak
2024-05-21  7:13   ` [PATCH v2] " Haochen Jiang
2024-05-21  7:21     ` Hongtao Liu
2024-05-21  8:36       ` Jiang, Haochen
2024-05-21  9:01         ` [PATCH v3] " Haochen Jiang
2024-05-21 13:04           ` Uros Bizjak [this message]
2024-05-22  2:21             ` Jiang, Haochen

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