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References: <1531154299-28349-1-git-send-email-Richard.Earnshaw@arm.com> <1532684275-13041-1-git-send-email-Richard.Earnshaw@arm.com> <1532684275-13041-11-git-send-email-Richard.Earnshaw@arm.com>
From: Uros Bizjak <ubizjak@gmail.com>
Date: Sat, 28 Jul 2018 08:25:00 -0000
Message-ID: <CAFULd4Zqy91xq35kgx_Y2h2jpDC6Pc6OemUwb0LQdk2Mf44oog@mail.gmail.com>
Subject: Re: [PATCH 10/11] x86 - add speculation_barrier pattern
To: Richard Earnshaw <Richard.Earnshaw@arm.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>, Jan Hubicka <hubicka@ucw.cz>, 	"H. J. Lu" <hjl.tools@gmail.com>
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On Fri, Jul 27, 2018 at 11:37 AM, Richard Earnshaw
<Richard.Earnshaw@arm.com> wrote:
>
> This patch adds a speculation barrier for x86, based on my
> understanding of the required mitigation for that CPU, which is to use
> an lfence instruction.
>
> This patch needs some review by an x86 expert and if adjustments are
> needed, I'd appreciate it if they could be picked up by the port
> maintainer.  This is supposed to serve as an example of how to deploy
> the new __builtin_speculation_safe_value() intrinsic on this
> architecture.
>
>         * config/i386/i386.md (unspecv): Add UNSPECV_SPECULATION_BARRIER.
>         (speculation_barrier): New insn.

The implementation is OK, but someone from Intel (CC'd) should clarify
if lfence is the correct insn.

Uros.