From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qv1-xf2d.google.com (mail-qv1-xf2d.google.com [IPv6:2607:f8b0:4864:20::f2d]) by sourceware.org (Postfix) with ESMTPS id 897713886C4A for ; Sat, 27 Aug 2022 08:56:14 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 897713886C4A Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-qv1-xf2d.google.com with SMTP id q8so2810229qvr.9 for ; Sat, 27 Aug 2022 01:56:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc; bh=kkddj4E7ytMDrCZW8bSsg43h9W3zXLTAehzKFmDKHvI=; b=mtqNSFlRV0wz2xQyu714XfWVeBCMRn5hUdZ/UK0v+5LB67MPzFeh3RdQUpOh1RlTjG Qu4cg0B4EOsVqXJIaSwHDzppBUsy3WwMPtI9J0vgXPz+y34N0LFIIacNerZjwSxOdJVP RpOOXJMordVMvn1TRofzwpVGbkew2gHo3y9+Qusoj+1akEFPP5zCFbzDvSrCcW2DY1Rr 3FQqQlJ9sEWJM9YvRQLvvILHebPaTbHphSsmFlnykPfZUuthcnjnmRSbNS85mSQd9B8/ myXT+3IZLc5YDxFWfQIsQMX40ZXBmYq5R2jTeHVDeAcx2YIxTtEsAIcbGkAKb9N62qdu zx9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc; bh=kkddj4E7ytMDrCZW8bSsg43h9W3zXLTAehzKFmDKHvI=; b=N5wKUqVNzULcqKw0PTLvP2/tBftwyN21wyFugvNfIwdcj5IHCgKSplOwEIFoK5CSzx 7hbzF/6dJfcYAqpdBo8RGXzDjFfeATFx3L2vWYi1yLxOuJQFxxMAZ5Rr34ESacmrch46 hGlsmGoooMBlkqrOFcK4/kh2FFmjjO5U6Cg07rDqAMTzB1fm7tDOyfKfDI3KOe8fyXCh 2WtnVPsuJDB/e88veDN3RfutuQxrg7dGR1gBJ1Ie/4iG2vGNnxZUDLLDUK3CtUuew0y+ ZEQWfaQa6Gz6yCogDBVIyYMN3bWTfCwVwRb7aF2tQbqfxcbtNPk3XQV7A6ST4Oj7PnBu CCXg== X-Gm-Message-State: ACgBeo2/6uFU4Zg0NfoaWQ3HeLDclrZlD4fwB6oNjxgfFXKlb1wGKaVJ HjIgkYrXCI6QZZya9bFh6eJ29r/8HgMmu/9D68o= X-Google-Smtp-Source: AA6agR45fLWHGPXO6TLTfG8wjCBzIXzI/8a56eFPZuT1wQtqUkNbG2iPiHEf2l3f6UWM+Vx4qBzN6Qyhq8aKDCcCAN8= X-Received: by 2002:a05:6214:27e3:b0:497:f73:7c2 with SMTP id jt3-20020a05621427e300b004970f7307c2mr2685184qvb.1.1661590573807; Sat, 27 Aug 2022 01:56:13 -0700 (PDT) MIME-Version: 1.0 References: <20220826173404.383416-1-hjl.tools@gmail.com> In-Reply-To: <20220826173404.383416-1-hjl.tools@gmail.com> From: Uros Bizjak Date: Sat, 27 Aug 2022 10:56:06 +0200 Message-ID: Subject: Re: [PATCH] x86: Handle V16BF in ix86_avx256_split_vector_move_misalign To: "H.J. Lu" Cc: gcc-patches@gcc.gnu.org, crazylht@gmail.com, lingling.kong@intel.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, Aug 26, 2022 at 7:34 PM H.J. Lu wrote: > > Handle E_V16BFmode in ix86_avx256_split_vector_move_misalign and add > V16BF to V_256H iterator. > > gcc/ > > PR target/106748 > * config/i386/i386-expand.cc > (ix86_avx256_split_vector_move_misalign): Handle E_V16BFmode. > * config/i386/sse.md (V_256H): Add V16BF. > > gcc/testsuite/ > > PR target/106748 > * gcc.target/i386/pr106748.c: New test. OK. Thanks, Uros. > > --- > gcc/config/i386/i386-expand.cc | 4 ++++ > gcc/config/i386/sse.md | 4 ++-- > gcc/testsuite/gcc.target/i386/pr106748.c | 20 ++++++++++++++++++++ > 3 files changed, 26 insertions(+), 2 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/i386/pr106748.c > > diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc > index 4b216308a18..836ebc82d67 100644 > --- a/gcc/config/i386/i386-expand.cc > +++ b/gcc/config/i386/i386-expand.cc > @@ -745,6 +745,10 @@ ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1) > extract = gen_avx_vextractf128v32qi; > mode = V16QImode; > break; > + case E_V16BFmode: > + extract = gen_avx_vextractf128v16bf; > + mode = V8BFmode; > + break; > case E_V16HFmode: > extract = gen_avx_vextractf128v16hf; > mode = V8HFmode; > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > index e6ab3c92dcf..259048481b6 100644 > --- a/gcc/config/i386/sse.md > +++ b/gcc/config/i386/sse.md > @@ -297,9 +297,9 @@ (define_mode_iterator V_128 > (define_mode_iterator V_256 > [V32QI V16HI V8SI V4DI V8SF V4DF]) > > -;; All 256bit vector modes including HF vector mode > +;; All 256bit vector modes including HF/BF vector modes > (define_mode_iterator V_256H > - [V32QI V16HI V8SI V4DI V8SF V4DF V16HF]) > + [V32QI V16HI V8SI V4DI V8SF V4DF V16HF V16BF]) > > ;; All 128bit and 256bit vector modes > (define_mode_iterator V_128_256 > diff --git a/gcc/testsuite/gcc.target/i386/pr106748.c b/gcc/testsuite/gcc.target/i386/pr106748.c > new file mode 100644 > index 00000000000..6388b1deb23 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr106748.c > @@ -0,0 +1,20 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O0 -mavx256-split-unaligned-store -mavx -fpack-struct" } */ > + > +typedef __bf16 __m256bf16 __attribute__((__vector_size__(32))); > +typedef struct { > + __m256bf16 _m256bf16[1]; > +} YMM_T; > + > +struct { > + YMM_T ymm0; > +} fregs; > + > +__m256bf16 do_test_u3b_0_0; > +int do_test_i; > + > +void > +do_test() > +{ > + (&fregs.ymm0)[do_test_i]._m256bf16[0] = do_test_u3b_0_0; > +} > -- > 2.37.2 >