From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12789 invoked by alias); 5 Jul 2011 15:16:32 -0000 Received: (qmail 12779 invoked by uid 22791); 5 Jul 2011 15:16:31 -0000 X-SWARE-Spam-Status: No, hits=-0.9 required=5.0 tests=AWL,BAYES_50,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from mail-pz0-f47.google.com (HELO mail-pz0-f47.google.com) (209.85.210.47) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 05 Jul 2011 15:16:15 +0000 Received: by pzk36 with SMTP id 36so3799335pzk.20 for ; Tue, 05 Jul 2011 08:16:14 -0700 (PDT) MIME-Version: 1.0 Received: by 10.68.0.99 with SMTP id 3mr9231884pbd.375.1309878974804; Tue, 05 Jul 2011 08:16:14 -0700 (PDT) Received: by 10.142.107.13 with HTTP; Tue, 5 Jul 2011 08:16:14 -0700 (PDT) In-Reply-To: <20110705143920.GA25294@intel.com> References: <20110605195441.GA1225@intel.com> <20110705143920.GA25294@intel.com> Date: Tue, 05 Jul 2011 15:21:00 -0000 Message-ID: Subject: Re: PATCH [1/n] X32: Add initial -x32 support From: Uros Bizjak To: "H.J. Lu" Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-07/txt/msg00278.txt.bz2 On Tue, Jul 5, 2011 at 4:39 PM, H.J. Lu wrote: > I'd like to start submitting a series of patches to enable x32: > > https://sites.google.com/site/x32abi/ > > The GCC x32 branch is very stable. There are no unexpected failures in > C, C++, Fortran and Objective C testsuites. =A0SPEC CPU 2K/2006 compile > and run correctly at -O2 and -O3. > > More than 90% of changes are in x86 backend. =A0I have submitted non-x86 > backend patches. =A0Most of them have been reviewed and checked in. =A0On= ly > 4 patches are pending for review/approval. > > This is the first x86 backend patch to support x32. =A0By default, x32 is > disabled and x32 run-time support isn't required. =A0OK for trunk? Please strip out --enable-ia32 stuff, it complicates things ATM. I assume that --enable-x32 applies only to 64bit targets, so this part > @@ -1232,7 +1232,17 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu |= i[34567]86-*-knetbsd*-gnu | i > if test x$enable_targets =3D xall; then > tm_file=3D"${tm_file} i386/x86-64.h i386/gnu-user6= 4.h i386/linux64.h" > tm_defines=3D"${tm_defines} TARGET_BI_ARCH=3D1" > - tmake_file=3D"${tmake_file} i386/t-linux64" > + case x${enable_x32}${enable_ia32} in > + xyesyes) > + tmake_file=3D"${tmake_file} i386/t-linux-= x32" > + ;; > + xyesno) > + tmake_file=3D"${tmake_file} i386/t-linux6= 4-x32" > + ;; > + *) > + tmake_file=3D"${tmake_file} i386/t-linux6= 4" > + ;; > + esac should be simplified to something: if (enable_x32) tmake_file =3D "... i386/t-linux64-x32" else tmake_file =3D "... i386/t-linux64" > diff --git a/gcc/config/i386/gnu-user64.h b/gcc/config/i386/gnu-user64.h > index b069975..954f3b2 100644 > --- a/gcc/config/i386/gnu-user64.h > +++ b/gcc/config/i386/gnu-user64.h > @@ -58,25 +58,31 @@ see the files COPYING3 and COPYING.RUNTIME respective= ly. =A0If not, see > > =A0#if TARGET_64BIT_DEFAULT > =A0#define SPEC_32 "m32" > -#define SPEC_64 "!m32" > +#define SPEC_64 "m32|mx32:;" > +#define SPEC_X32 "mx32" > =A0#else > -#define SPEC_32 "!m64" > +#define SPEC_32 "m64|mx32:;" > =A0#define SPEC_64 "m64" > +#define SPEC_X32 "mx32" > =A0#endif > > =A0#undef ASM_SPEC > -#define ASM_SPEC "%{" SPEC_32 ":--32} %{" SPEC_64 ":--64} \ > +#define ASM_SPEC "%{" SPEC_32 ":--32} \ > + %{" SPEC_64 ":--64} \ > + %{" SPEC_X32 ":--x32} \ > =A0%{!mno-sse2avx:%{mavx:-msse2avx}} %{msse2avx:%{!mavx:-msse2avx}}" Are you sure that above is correct? AFAICS, you are enabling SPEC_64 for m32 in case of TARGET_64BIT_DEFAULT. > =A0/* SSE4.1 defines round instructions */ > =A0#define =A0 =A0 =A0 =A0OPTION_MASK_ISA_ROUND =A0 OPTION_MASK_ISA_SSE4_1 > @@ -517,8 +519,8 @@ extern const char *host_detect_local_cpu (int argc, c= onst char **argv); > =A0#define OPT_ARCH64 "!m32" > =A0#define OPT_ARCH32 "m32" > =A0#else > -#define OPT_ARCH64 "m64" > -#define OPT_ARCH32 "!m64" > +#define OPT_ARCH64 "m64|mx32" > +#define OPT_ARCH32 "m64|mx32:;" > =A0#endif Same here. Uros.