* [PATCH, i386]: Fix PR 68263, Vector "*mov<mode>_internal" fails to handle misaligned load/store from reload
@ 2015-11-17 9:52 Uros Bizjak
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From: Uros Bizjak @ 2015-11-17 9:52 UTC (permalink / raw)
To: gcc-patches; +Cc: H.J. Lu
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Hello!
Attached patch fixes PR 68263. IAMCU ABI doesn't guarantee any
alignment, so we have to emit unaligned moves for SSE or AVX unaligned
operands.
2015-11-17 Uros Bizjak <ubizjak@gmail.com>
PR target/68263
* config/i386/i386.h (BIGGEST_ALIGNMENT): Always define
to 32 for IAMCU.
* config/i386/sse.md (*mov<mode>_internal): Always enable
AVX and SSE unaligned moves for IAMCU.
Patch fixes gcc.target/i386/iamcu/test_passing_floats.c execution
testsuite failure.
Patch was also tested by HJ on IAMCU target.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32},
committed to mainline SVN.
Uros.
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Index: config/i386/i386.h
===================================================================
--- config/i386/i386.h (revision 230454)
+++ config/i386/i386.h (working copy)
@@ -814,7 +814,7 @@
TARGET_ABSOLUTE_BIGGEST_ALIGNMENT. */
#define BIGGEST_ALIGNMENT \
- (TARGET_AVX512F ? 512 : (TARGET_AVX ? 256 : (TARGET_IAMCU ? 32 : 128)))
+ (TARGET_IAMCU ? 32 : (TARGET_AVX512F ? 512 : (TARGET_AVX ? 256 : 128)))
/* Maximum stack alignment. */
#define MAX_STACK_ALIGNMENT MAX_OFILE_ALIGNMENT
Index: config/i386/sse.md
===================================================================
--- config/i386/sse.md (revision 230454)
+++ config/i386/sse.md (working copy)
@@ -892,30 +892,30 @@
case MODE_V16SF:
case MODE_V8SF:
case MODE_V4SF:
- if (TARGET_AVX
+ if ((TARGET_AVX || TARGET_IAMCU)
&& (misaligned_operand (operands[0], <MODE>mode)
|| misaligned_operand (operands[1], <MODE>mode)))
- return "vmovups\t{%1, %0|%0, %1}";
+ return "%vmovups\t{%1, %0|%0, %1}";
else
return "%vmovaps\t{%1, %0|%0, %1}";
case MODE_V8DF:
case MODE_V4DF:
case MODE_V2DF:
- if (TARGET_AVX
+ if ((TARGET_AVX || TARGET_IAMCU)
&& (misaligned_operand (operands[0], <MODE>mode)
|| misaligned_operand (operands[1], <MODE>mode)))
- return "vmovupd\t{%1, %0|%0, %1}";
+ return "%vmovupd\t{%1, %0|%0, %1}";
else
return "%vmovapd\t{%1, %0|%0, %1}";
case MODE_OI:
case MODE_TI:
- if (TARGET_AVX
+ if ((TARGET_AVX || TARGET_IAMCU)
&& (misaligned_operand (operands[0], <MODE>mode)
|| misaligned_operand (operands[1], <MODE>mode)))
return TARGET_AVX512VL ? "vmovdqu64\t{%1, %0|%0, %1}"
- : "vmovdqu\t{%1, %0|%0, %1}";
+ : "%vmovdqu\t{%1, %0|%0, %1}";
else
return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}"
: "%vmovdqa\t{%1, %0|%0, %1}";
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2015-11-17 9:52 [PATCH, i386]: Fix PR 68263, Vector "*mov<mode>_internal" fails to handle misaligned load/store from reload Uros Bizjak
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