From: Uros Bizjak <ubizjak@gmail.com>
To: "H.J. Lu" <hjl.tools@gmail.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH v2] x86: Use crc32 target option for CRC32 intrinsics
Date: Thu, 15 Apr 2021 18:53:25 +0200 [thread overview]
Message-ID: <CAFULd4a21JGYhrPEX=PDhnWJgSfWoLhU6SZhcEc6nDruzs=_1g@mail.gmail.com> (raw)
In-Reply-To: <CAMe9rOpEwB83t8e716=UUOECYMX_=5E98ymwkksRsRn-Hk3gSA@mail.gmail.com>
On Thu, Apr 15, 2021 at 6:51 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> On Thu, Apr 15, 2021 at 9:34 AM Uros Bizjak <ubizjak@gmail.com> wrote:
> >
> > On Thu, Apr 15, 2021 at 6:26 PM H.J. Lu <hjl.tools@gmail.com> wrote:
> > >
> > > On Thu, Apr 15, 2021 at 9:14 AM Uros Bizjak <ubizjak@gmail.com> wrote:
> > > >
> > > > On Thu, Apr 15, 2021 at 5:11 PM H.J. Lu <hjl.tools@gmail.com> wrote:
> > > > >
> > > > > Use crc32 target option for CRC32 intrinsics to support CRC32 intrinsics
> > > > > without enabling SSE vector instructions.
> > > >
> > > > There is no CRC32 ISA. crc32 is part of SSE4.2 [1] and current
> > > > situation reflects that correctly.
> > >
> > > CRC32 is similar to POPCNT which was originally in SSE4.2. Now POPCNT
> >
> > It is not similar, POPCNT has its own CPUID flag and can be enabled
> > independently of SSE4.2.
> >
> > > is a separate feature which is also enabled by SSE4.2. Enable CRC32 only
> > > with SSE4.2 makes it impossible to use CRC32 with -mgeneral-regs-only. This
> > > patch addresses this issue the same way as POPCNT.
> >
> > CRC32 doesn't have its own CPUID flag, so PTA_CRC32 is pointless.
>
> PTA_CRC32 shouldn't be added.
>
> > OTOH, the situation is similar with MONITOR and MWAIT. These are
>
> There are no intrinsics for MONITOR nor MWAIT.
pmmintrin.h:
extern __inline void __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
_mm_monitor (void const * __P, unsigned int __E, unsigned int __H)
{
__builtin_ia32_monitor (__P, __E, __H);
}
extern __inline void __attribute__((__gnu_inline__, __always_inline__,
__artificial__))
_mm_mwait (unsigned int __E, unsigned int __H)
{
__builtin_ia32_mwait (__E, __H);
}
>
> > enabled with SSE3 and don't use XMM registers. Also somewhat similar
> > is FISTTP, but there is no intrinsic for this insn.
>
> True.
>
> Here is the v2 patch without PTA_CRC32.
>
> --
> H.J.
next prev parent reply other threads:[~2021-04-15 16:53 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-15 15:11 [PATCH] " H.J. Lu
2021-04-15 16:14 ` Uros Bizjak
2021-04-15 16:25 ` H.J. Lu
2021-04-15 16:33 ` Uros Bizjak
2021-04-15 16:50 ` [PATCH v2] " H.J. Lu
2021-04-15 16:53 ` Uros Bizjak [this message]
2021-04-15 17:35 ` H.J. Lu
2021-04-15 17:58 ` Uros Bizjak
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