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Date: Mon, 03 Aug 2015 12:33:00 -0000
Message-ID: <CAFULd4aZ21S9=hRi9A0LT+AmaMMQG5PQw_nLyi57DLgKR5_2RA@mail.gmail.com>
Subject: Re: [PATCH][RTL-ifcvt] Improve conditional select ops on immediates
From: Uros Bizjak <ubizjak@gmail.com>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Kyrill Tkachov <kyrylo.tkachov@arm.com>, Jeff Law <law@redhat.com>, 	"H.J. Lu" <hjl.tools@gmail.com>
Content-Type: text/plain; charset=UTF-8
X-SW-Source: 2015-08/txt/msg00056.txt.bz2

Hello!

> 2015-07-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
>
>     * ifcvt.c (noce_try_store_flag_constants): Make logic of the case
>     when diff == STORE_FLAG_VALUE or diff == -STORE_FLAG_VALUE more
>     explicit.  Prefer to add the flag whenever possible.
>     (noce_process_if_block): Try noce_try_store_flag_constants before
>     noce_try_cmove.
>
> 2015-07-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
>
>     * gcc.target/aarch64/csel_bfx_1.c: New test.
>     * gcc.target/aarch64/csel_imms_inc_1.c: Likewise.

This patch regressed following tests on x86_64:

FAIL: gcc.target/i386/cmov2.c scan-assembler sbb
FAIL: gcc.target/i386/cmov3.c scan-assembler cmov[^3]

While cmov3 case is questionable by itself in light of PR56309 [1],
the cnov2 case regressed from:

       cmpl    %edi, %esi
       sbbl    %eax, %eax
       andl    $-10, %eax
       addl    $5, %eax
       ret

to:

       xorl    %eax, %eax
       cmpl    %esi, %edi
       setbe   %al
       negl    %eax
       andl    $10, %eax
       subl    $5, %eax
       ret

Please note that sbb (aka {*x86_movsicc_0_m1} ) is not generated
anymore. Non-QImode setcc instructions are problematic on x86, since
they need to be zero-extended to their full length.

[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56309

Uros.