From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt1-x835.google.com (mail-qt1-x835.google.com [IPv6:2607:f8b0:4864:20::835]) by sourceware.org (Postfix) with ESMTPS id EF8FE3857425 for ; Tue, 3 Aug 2021 08:43:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org EF8FE3857425 Received: by mail-qt1-x835.google.com with SMTP id l24so13477621qtj.4 for ; Tue, 03 Aug 2021 01:43:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=NlbTF4u5/5aHw/leW2+f855QAQzyBpa/ksvxZELr0Ko=; b=p7Tkw/l4jliFjDlPYK5hImDTThyLwdefrNFeoy8UK1pM7NhgVXzqJlGCe3ilIaGGql VlpDDIKKBt8MJRA8IycDzpXXIJvFnAEnp4cs2VIGfNJ2VcCfDtPjSqRG0gQUqxLcTwGN V+gMqEythX1z2z+ExaBe7qvvVEVJV1D/EhjXxIILr/QwE9QLclGhX+qxUW8VEJV/zK20 sfbj3O1EHgU5XGNWHmwP69q/TSNFxi9BADUUZJ1KaodmTUMYR2fzXXJmZnMJR3E8S4xp ONuNc1Dg7wlS1z+PM6k5T/nuk9M73QzbwXkXvMk/VtiijSWMl2xtYJ+IjwSWSSsynw75 cu+Q== X-Gm-Message-State: AOAM530Cl/Y3Ld2Hrn3JkTplCXOa6oo6sOOpYCFtVrJeUrQVLXBSOVE/ l2QJ7HnInBTqCJGh75Z2rICdKUMSy/qA2lvoQ/4= X-Google-Smtp-Source: ABdhPJwDhfWedTAfAdlLmU19eGVIQSkyM43aOI9NAF7UvybgBQ4LFOc0puMZXQfK5AZtTp8PwjvVNIzulhhHXWXE2dM= X-Received: by 2002:ac8:5552:: with SMTP id o18mr17549231qtr.51.1627980236464; Tue, 03 Aug 2021 01:43:56 -0700 (PDT) MIME-Version: 1.0 References: <20210802174726.197648-1-hjl.tools@gmail.com> In-Reply-To: From: Uros Bizjak Date: Tue, 3 Aug 2021 10:43:46 +0200 Message-ID: Subject: Re: [PATCH] x86: Use XMM31 for scratch SSE register To: Hongtao Liu Cc: "H.J. Lu" , liuhongt , "gcc-patches@gcc.gnu.org" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 03 Aug 2021 08:44:00 -0000 On Tue, Aug 3, 2021 at 10:15 AM Hongtao Liu wrote: > > On Tue, Aug 3, 2021 at 4:03 PM Uros Bizjak via Gcc-patches > wrote: > > > > On Mon, Aug 2, 2021 at 7:47 PM H.J. Lu wrote: > > > > > > In 64-bit mode, use XMM31 for scratch SSE register to avoid vzeroupper > > > if possible. > > > > > > gcc/ > > > > > > * config/i386/i386.c (ix86_gen_scratch_sse_rtx): In 64-bit mode, > > > try XMM31 to avoid vzeroupper. > > > > > > gcc/testsuite/ > > > > > > * gcc.target/i386/avx-vzeroupper-14.c: Pass -mno-avx512f to > > > disable XMM31. > > > * gcc.target/i386/avx-vzeroupper-15.c: Likewise. > > > * gcc.target/i386/pr82941-1.c: Updated. Check for vzeroupper. > > > * gcc.target/i386/pr82942-1.c: Likewise. > > > * gcc.target/i386/pr82990-1.c: Likewise. > > > * gcc.target/i386/pr82990-3.c: Likewise. > > > * gcc.target/i386/pr82990-5.c: Likewise. > > > * gcc.target/i386/pr100865-4b.c: Likewise. > > > * gcc.target/i386/pr100865-6b.c: Likewise. > > > * gcc.target/i386/pr100865-7b.c: Likewise. > > > * gcc.target/i386/pr100865-10b.c: Likewise. > > > * gcc.target/i386/pr100865-8b.c: Updated. > > > * gcc.target/i386/pr100865-9b.c: Likewise. > > > * gcc.target/i386/pr100865-11b.c: Likewise. > > > * gcc.target/i386/pr100865-12b.c: Likewise. > > > --- > > > gcc/config/i386/i386.c | 18 +++++++++++++++--- > > > .../gcc.target/i386/avx-vzeroupper-14.c | 2 +- > > > .../gcc.target/i386/avx-vzeroupper-15.c | 2 +- > > > gcc/testsuite/gcc.target/i386/pr100865-10b.c | 1 + > > > gcc/testsuite/gcc.target/i386/pr100865-11b.c | 2 +- > > > gcc/testsuite/gcc.target/i386/pr100865-12b.c | 2 +- > > > gcc/testsuite/gcc.target/i386/pr100865-4b.c | 2 ++ > > > gcc/testsuite/gcc.target/i386/pr100865-6b.c | 5 ++++- > > > gcc/testsuite/gcc.target/i386/pr100865-7b.c | 5 ++++- > > > gcc/testsuite/gcc.target/i386/pr100865-8b.c | 2 +- > > > gcc/testsuite/gcc.target/i386/pr100865-9b.c | 2 +- > > > gcc/testsuite/gcc.target/i386/pr82941-1.c | 3 ++- > > > gcc/testsuite/gcc.target/i386/pr82942-1.c | 3 ++- > > > gcc/testsuite/gcc.target/i386/pr82990-1.c | 3 ++- > > > gcc/testsuite/gcc.target/i386/pr82990-3.c | 3 ++- > > > gcc/testsuite/gcc.target/i386/pr82990-5.c | 3 ++- > > > 16 files changed, 42 insertions(+), 16 deletions(-) > > > > > > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c > > > index 842eb0e6786..ec0690876b7 100644 > > > --- a/gcc/config/i386/i386.c > > > +++ b/gcc/config/i386/i386.c > > > @@ -23335,9 +23335,21 @@ rtx > > > ix86_gen_scratch_sse_rtx (machine_mode mode) > > > { > > > if (TARGET_SSE && !lra_in_progress) > > > - return gen_rtx_REG (mode, (TARGET_64BIT > > > - ? LAST_REX_SSE_REG > > > - : LAST_SSE_REG)); > > > + { > > > + unsigned int regno; > > > + if (TARGET_64BIT) > > > + { > > > + /* In 64-bit mode, use XMM31 to avoid vzeroupper and always > > > + use XMM31 for CSE. */ > > > + if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode)) > > > + regno = LAST_EXT_REX_SSE_REG; > > > + else > > > + regno = LAST_REX_SSE_REG; > > > + } > > > + else > > > + regno = LAST_SSE_REG; > > > > Assuming that ix86_hard_regno_mode_ok always returns false for XMM31 > > in 64bit mode, we can do: > > > > /* Use XMM31 if available to avoid vzeroupper. */ > > if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode)) > > regno = LAST_EXST_REX_SSE_REG; > > else if (TARGET_64BIT) > > regno = LAST_EXT_REX_SSE_REG; > why? w/o avx512 xmm31 is not available. Oh, a typo, this should read LAST_REX_SSE_REG. Uros.