* [PATCH] x86: Use XMM31 for scratch SSE register
@ 2021-08-02 17:47 H.J. Lu
2021-08-03 1:38 ` Hongtao Liu
2021-08-03 8:02 ` Uros Bizjak
0 siblings, 2 replies; 7+ messages in thread
From: H.J. Lu @ 2021-08-02 17:47 UTC (permalink / raw)
To: gcc-patches; +Cc: Uros Bizjak, liuhongt
In 64-bit mode, use XMM31 for scratch SSE register to avoid vzeroupper
if possible.
gcc/
* config/i386/i386.c (ix86_gen_scratch_sse_rtx): In 64-bit mode,
try XMM31 to avoid vzeroupper.
gcc/testsuite/
* gcc.target/i386/avx-vzeroupper-14.c: Pass -mno-avx512f to
disable XMM31.
* gcc.target/i386/avx-vzeroupper-15.c: Likewise.
* gcc.target/i386/pr82941-1.c: Updated. Check for vzeroupper.
* gcc.target/i386/pr82942-1.c: Likewise.
* gcc.target/i386/pr82990-1.c: Likewise.
* gcc.target/i386/pr82990-3.c: Likewise.
* gcc.target/i386/pr82990-5.c: Likewise.
* gcc.target/i386/pr100865-4b.c: Likewise.
* gcc.target/i386/pr100865-6b.c: Likewise.
* gcc.target/i386/pr100865-7b.c: Likewise.
* gcc.target/i386/pr100865-10b.c: Likewise.
* gcc.target/i386/pr100865-8b.c: Updated.
* gcc.target/i386/pr100865-9b.c: Likewise.
* gcc.target/i386/pr100865-11b.c: Likewise.
* gcc.target/i386/pr100865-12b.c: Likewise.
---
gcc/config/i386/i386.c | 18 +++++++++++++++---
.../gcc.target/i386/avx-vzeroupper-14.c | 2 +-
.../gcc.target/i386/avx-vzeroupper-15.c | 2 +-
gcc/testsuite/gcc.target/i386/pr100865-10b.c | 1 +
gcc/testsuite/gcc.target/i386/pr100865-11b.c | 2 +-
gcc/testsuite/gcc.target/i386/pr100865-12b.c | 2 +-
gcc/testsuite/gcc.target/i386/pr100865-4b.c | 2 ++
gcc/testsuite/gcc.target/i386/pr100865-6b.c | 5 ++++-
gcc/testsuite/gcc.target/i386/pr100865-7b.c | 5 ++++-
gcc/testsuite/gcc.target/i386/pr100865-8b.c | 2 +-
gcc/testsuite/gcc.target/i386/pr100865-9b.c | 2 +-
gcc/testsuite/gcc.target/i386/pr82941-1.c | 3 ++-
gcc/testsuite/gcc.target/i386/pr82942-1.c | 3 ++-
gcc/testsuite/gcc.target/i386/pr82990-1.c | 3 ++-
gcc/testsuite/gcc.target/i386/pr82990-3.c | 3 ++-
gcc/testsuite/gcc.target/i386/pr82990-5.c | 3 ++-
16 files changed, 42 insertions(+), 16 deletions(-)
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 842eb0e6786..ec0690876b7 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -23335,9 +23335,21 @@ rtx
ix86_gen_scratch_sse_rtx (machine_mode mode)
{
if (TARGET_SSE && !lra_in_progress)
- return gen_rtx_REG (mode, (TARGET_64BIT
- ? LAST_REX_SSE_REG
- : LAST_SSE_REG));
+ {
+ unsigned int regno;
+ if (TARGET_64BIT)
+ {
+ /* In 64-bit mode, use XMM31 to avoid vzeroupper and always
+ use XMM31 for CSE. */
+ if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
+ regno = LAST_EXT_REX_SSE_REG;
+ else
+ regno = LAST_REX_SSE_REG;
+ }
+ else
+ regno = LAST_SSE_REG;
+ return gen_rtx_REG (mode, regno);
+ }
else
return gen_reg_rtx (mode);
}
diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
index a31b4a2a63a..9590f25da22 100644
--- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
+++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -mavx -mtune=generic -dp" } */
+/* { dg-options "-O2 -mavx -mno-avx512f -mtune=generic -dp" } */
#include <immintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
index 803936eef01..36dcf7367f1 100644
--- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
+++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -mavx -mtune=generic -dp" } */
+/* { dg-options "-O2 -mavx -mno-avx512f -mtune=generic -dp" } */
#include <immintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-10b.c b/gcc/testsuite/gcc.target/i386/pr100865-10b.c
index e5616d8d258..77ace86ffe8 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-10b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-10b.c
@@ -5,3 +5,4 @@
/* { dg-final { scan-assembler-times "vpbroadcastb\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqu8\[\\t \]%ymm\[0-9\]+, " 8 } } */
+/* { dg-final { scan-assembler-not "vzeroupper" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-11b.c b/gcc/testsuite/gcc.target/i386/pr100865-11b.c
index 12d55b9a642..7e458e85cdd 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-11b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-11b.c
@@ -5,4 +5,4 @@
/* { dg-final { scan-assembler-times "movabsq" 1 } } */
/* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
+/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-12b.c b/gcc/testsuite/gcc.target/i386/pr100865-12b.c
index 63a5629b90c..dee0cfb016a 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-12b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-12b.c
@@ -5,4 +5,4 @@
/* { dg-final { scan-assembler-times "movabsq" 1 } } */
/* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
+/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-4b.c b/gcc/testsuite/gcc.target/i386/pr100865-4b.c
index 8e8a7eaaaff..80e9fdb12ea 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-4b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-4b.c
@@ -5,5 +5,7 @@
/* { dg-final { scan-assembler-times "vpbroadcastb\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqu8\[\\t \]%ymm\[0-9\]+, " 2 } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-not "vpbroadcastb\[\\t \]+%xmm\[0-9\]+, %ymm\[0-9\]+" } } */
/* { dg-final { scan-assembler-not "vmovdqa" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-6b.c b/gcc/testsuite/gcc.target/i386/pr100865-6b.c
index 44e74c64e55..35f2e961d25 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-6b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-6b.c
@@ -4,6 +4,9 @@
#include "pr100865-6a.c"
/* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 8 } } */
+/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 8 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "vmovdqu32\[\\t \]%ymm\[0-9\]+, " 8 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-not "vpbroadcastd\[\\t \]+%xmm\[0-9\]+, %ymm\[0-9\]+" } } */
/* { dg-final { scan-assembler-not "vmovdqa" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-7b.c b/gcc/testsuite/gcc.target/i386/pr100865-7b.c
index 0a68820aa32..ad267c43891 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-7b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-7b.c
@@ -5,5 +5,8 @@
/* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%r\[^\n\]*, %ymm\[0-9\]+" 1 { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+\[^\n\]*, %ymm\[0-9\]+" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 16 } } */
+/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 16 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "vmovdqu64\[\\t \]%ymm\[0-9\]+, " 16 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-not "vmovdqa" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-8b.c b/gcc/testsuite/gcc.target/i386/pr100865-8b.c
index 99a10ad83bd..4b7dd7cee3e 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-8b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-8b.c
@@ -4,4 +4,4 @@
#include "pr100865-8a.c"
/* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
+/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-9b.c b/gcc/testsuite/gcc.target/i386/pr100865-9b.c
index 14696248525..a315dde7c52 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-9b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-9b.c
@@ -4,4 +4,4 @@
#include "pr100865-9a.c"
/* { dg-final { scan-assembler-times "vpbroadcastw\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
+/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr82941-1.c b/gcc/testsuite/gcc.target/i386/pr82941-1.c
index d7e530d5116..c3be2f5b797 100644
--- a/gcc/testsuite/gcc.target/i386/pr82941-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr82941-1.c
@@ -11,4 +11,5 @@ pr82941 ()
z = y;
}
-/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr82942-1.c b/gcc/testsuite/gcc.target/i386/pr82942-1.c
index 9cdf81a9d60..29ead049a67 100644
--- a/gcc/testsuite/gcc.target/i386/pr82942-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr82942-1.c
@@ -3,4 +3,5 @@
#include "pr82941-1.c"
-/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr82990-1.c b/gcc/testsuite/gcc.target/i386/pr82990-1.c
index ff1d6d40eb2..bbf580fea77 100644
--- a/gcc/testsuite/gcc.target/i386/pr82990-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr82990-1.c
@@ -11,4 +11,5 @@ pr82941 ()
z = y;
}
-/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr82990-3.c b/gcc/testsuite/gcc.target/i386/pr82990-3.c
index 201fa98d8d4..89ddb20adb3 100644
--- a/gcc/testsuite/gcc.target/i386/pr82990-3.c
+++ b/gcc/testsuite/gcc.target/i386/pr82990-3.c
@@ -3,4 +3,5 @@
#include "pr82941-1.c"
-/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr82990-5.c b/gcc/testsuite/gcc.target/i386/pr82990-5.c
index 9932bdc5375..b9da0e706b1 100644
--- a/gcc/testsuite/gcc.target/i386/pr82990-5.c
+++ b/gcc/testsuite/gcc.target/i386/pr82990-5.c
@@ -11,4 +11,5 @@ pr82941 ()
z = y;
}
-/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
--
2.31.1
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] x86: Use XMM31 for scratch SSE register
2021-08-02 17:47 [PATCH] x86: Use XMM31 for scratch SSE register H.J. Lu
@ 2021-08-03 1:38 ` Hongtao Liu
2021-08-03 8:02 ` Uros Bizjak
1 sibling, 0 replies; 7+ messages in thread
From: Hongtao Liu @ 2021-08-03 1:38 UTC (permalink / raw)
To: H.J. Lu; +Cc: GCC Patches, liuhongt
On Tue, Aug 3, 2021 at 1:48 AM H.J. Lu via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> In 64-bit mode, use XMM31 for scratch SSE register to avoid vzeroupper
> if possible.
>
> gcc/
>
> * config/i386/i386.c (ix86_gen_scratch_sse_rtx): In 64-bit mode,
> try XMM31 to avoid vzeroupper.
LGTM.
>
> gcc/testsuite/
>
> * gcc.target/i386/avx-vzeroupper-14.c: Pass -mno-avx512f to
> disable XMM31.
> * gcc.target/i386/avx-vzeroupper-15.c: Likewise.
> * gcc.target/i386/pr82941-1.c: Updated. Check for vzeroupper.
> * gcc.target/i386/pr82942-1.c: Likewise.
> * gcc.target/i386/pr82990-1.c: Likewise.
> * gcc.target/i386/pr82990-3.c: Likewise.
> * gcc.target/i386/pr82990-5.c: Likewise.
> * gcc.target/i386/pr100865-4b.c: Likewise.
> * gcc.target/i386/pr100865-6b.c: Likewise.
> * gcc.target/i386/pr100865-7b.c: Likewise.
> * gcc.target/i386/pr100865-10b.c: Likewise.
> * gcc.target/i386/pr100865-8b.c: Updated.
> * gcc.target/i386/pr100865-9b.c: Likewise.
> * gcc.target/i386/pr100865-11b.c: Likewise.
> * gcc.target/i386/pr100865-12b.c: Likewise.
> ---
> gcc/config/i386/i386.c | 18 +++++++++++++++---
> .../gcc.target/i386/avx-vzeroupper-14.c | 2 +-
> .../gcc.target/i386/avx-vzeroupper-15.c | 2 +-
> gcc/testsuite/gcc.target/i386/pr100865-10b.c | 1 +
> gcc/testsuite/gcc.target/i386/pr100865-11b.c | 2 +-
> gcc/testsuite/gcc.target/i386/pr100865-12b.c | 2 +-
> gcc/testsuite/gcc.target/i386/pr100865-4b.c | 2 ++
> gcc/testsuite/gcc.target/i386/pr100865-6b.c | 5 ++++-
> gcc/testsuite/gcc.target/i386/pr100865-7b.c | 5 ++++-
> gcc/testsuite/gcc.target/i386/pr100865-8b.c | 2 +-
> gcc/testsuite/gcc.target/i386/pr100865-9b.c | 2 +-
> gcc/testsuite/gcc.target/i386/pr82941-1.c | 3 ++-
> gcc/testsuite/gcc.target/i386/pr82942-1.c | 3 ++-
> gcc/testsuite/gcc.target/i386/pr82990-1.c | 3 ++-
> gcc/testsuite/gcc.target/i386/pr82990-3.c | 3 ++-
> gcc/testsuite/gcc.target/i386/pr82990-5.c | 3 ++-
> 16 files changed, 42 insertions(+), 16 deletions(-)
>
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index 842eb0e6786..ec0690876b7 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -23335,9 +23335,21 @@ rtx
> ix86_gen_scratch_sse_rtx (machine_mode mode)
> {
> if (TARGET_SSE && !lra_in_progress)
> - return gen_rtx_REG (mode, (TARGET_64BIT
> - ? LAST_REX_SSE_REG
> - : LAST_SSE_REG));
> + {
> + unsigned int regno;
> + if (TARGET_64BIT)
> + {
> + /* In 64-bit mode, use XMM31 to avoid vzeroupper and always
> + use XMM31 for CSE. */
> + if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
> + regno = LAST_EXT_REX_SSE_REG;
> + else
> + regno = LAST_REX_SSE_REG;
> + }
> + else
> + regno = LAST_SSE_REG;
> + return gen_rtx_REG (mode, regno);
> + }
> else
> return gen_reg_rtx (mode);
> }
> diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
> index a31b4a2a63a..9590f25da22 100644
> --- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
> +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-options "-O2 -mavx -mtune=generic -dp" } */
> +/* { dg-options "-O2 -mavx -mno-avx512f -mtune=generic -dp" } */
>
> #include <immintrin.h>
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
> index 803936eef01..36dcf7367f1 100644
> --- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
> +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-options "-O2 -mavx -mtune=generic -dp" } */
> +/* { dg-options "-O2 -mavx -mno-avx512f -mtune=generic -dp" } */
>
> #include <immintrin.h>
>
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-10b.c b/gcc/testsuite/gcc.target/i386/pr100865-10b.c
> index e5616d8d258..77ace86ffe8 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-10b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-10b.c
> @@ -5,3 +5,4 @@
>
> /* { dg-final { scan-assembler-times "vpbroadcastb\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
> /* { dg-final { scan-assembler-times "vmovdqu8\[\\t \]%ymm\[0-9\]+, " 8 } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-11b.c b/gcc/testsuite/gcc.target/i386/pr100865-11b.c
> index 12d55b9a642..7e458e85cdd 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-11b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-11b.c
> @@ -5,4 +5,4 @@
>
> /* { dg-final { scan-assembler-times "movabsq" 1 } } */
> /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-12b.c b/gcc/testsuite/gcc.target/i386/pr100865-12b.c
> index 63a5629b90c..dee0cfb016a 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-12b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-12b.c
> @@ -5,4 +5,4 @@
>
> /* { dg-final { scan-assembler-times "movabsq" 1 } } */
> /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-4b.c b/gcc/testsuite/gcc.target/i386/pr100865-4b.c
> index 8e8a7eaaaff..80e9fdb12ea 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-4b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-4b.c
> @@ -5,5 +5,7 @@
>
> /* { dg-final { scan-assembler-times "vpbroadcastb\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
> /* { dg-final { scan-assembler-times "vmovdqu8\[\\t \]%ymm\[0-9\]+, " 2 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> /* { dg-final { scan-assembler-not "vpbroadcastb\[\\t \]+%xmm\[0-9\]+, %ymm\[0-9\]+" } } */
> /* { dg-final { scan-assembler-not "vmovdqa" } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-6b.c b/gcc/testsuite/gcc.target/i386/pr100865-6b.c
> index 44e74c64e55..35f2e961d25 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-6b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-6b.c
> @@ -4,6 +4,9 @@
> #include "pr100865-6a.c"
>
> /* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
> -/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 8 } } */
> +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 8 { target ia32 } } } */
> +/* { dg-final { scan-assembler-times "vmovdqu32\[\\t \]%ymm\[0-9\]+, " 8 { target { ! ia32 } } } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> /* { dg-final { scan-assembler-not "vpbroadcastd\[\\t \]+%xmm\[0-9\]+, %ymm\[0-9\]+" } } */
> /* { dg-final { scan-assembler-not "vmovdqa" } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-7b.c b/gcc/testsuite/gcc.target/i386/pr100865-7b.c
> index 0a68820aa32..ad267c43891 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-7b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-7b.c
> @@ -5,5 +5,8 @@
>
> /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%r\[^\n\]*, %ymm\[0-9\]+" 1 { target { ! ia32 } } } } */
> /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+\[^\n\]*, %ymm\[0-9\]+" 1 { target ia32 } } } */
> -/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 16 } } */
> +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 16 { target ia32 } } } */
> +/* { dg-final { scan-assembler-times "vmovdqu64\[\\t \]%ymm\[0-9\]+, " 16 { target { ! ia32 } } } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> /* { dg-final { scan-assembler-not "vmovdqa" } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-8b.c b/gcc/testsuite/gcc.target/i386/pr100865-8b.c
> index 99a10ad83bd..4b7dd7cee3e 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-8b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-8b.c
> @@ -4,4 +4,4 @@
> #include "pr100865-8a.c"
>
> /* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-9b.c b/gcc/testsuite/gcc.target/i386/pr100865-9b.c
> index 14696248525..a315dde7c52 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-9b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-9b.c
> @@ -4,4 +4,4 @@
> #include "pr100865-9a.c"
>
> /* { dg-final { scan-assembler-times "vpbroadcastw\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr82941-1.c b/gcc/testsuite/gcc.target/i386/pr82941-1.c
> index d7e530d5116..c3be2f5b797 100644
> --- a/gcc/testsuite/gcc.target/i386/pr82941-1.c
> +++ b/gcc/testsuite/gcc.target/i386/pr82941-1.c
> @@ -11,4 +11,5 @@ pr82941 ()
> z = y;
> }
>
> -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr82942-1.c b/gcc/testsuite/gcc.target/i386/pr82942-1.c
> index 9cdf81a9d60..29ead049a67 100644
> --- a/gcc/testsuite/gcc.target/i386/pr82942-1.c
> +++ b/gcc/testsuite/gcc.target/i386/pr82942-1.c
> @@ -3,4 +3,5 @@
>
> #include "pr82941-1.c"
>
> -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr82990-1.c b/gcc/testsuite/gcc.target/i386/pr82990-1.c
> index ff1d6d40eb2..bbf580fea77 100644
> --- a/gcc/testsuite/gcc.target/i386/pr82990-1.c
> +++ b/gcc/testsuite/gcc.target/i386/pr82990-1.c
> @@ -11,4 +11,5 @@ pr82941 ()
> z = y;
> }
>
> -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr82990-3.c b/gcc/testsuite/gcc.target/i386/pr82990-3.c
> index 201fa98d8d4..89ddb20adb3 100644
> --- a/gcc/testsuite/gcc.target/i386/pr82990-3.c
> +++ b/gcc/testsuite/gcc.target/i386/pr82990-3.c
> @@ -3,4 +3,5 @@
>
> #include "pr82941-1.c"
>
> -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr82990-5.c b/gcc/testsuite/gcc.target/i386/pr82990-5.c
> index 9932bdc5375..b9da0e706b1 100644
> --- a/gcc/testsuite/gcc.target/i386/pr82990-5.c
> +++ b/gcc/testsuite/gcc.target/i386/pr82990-5.c
> @@ -11,4 +11,5 @@ pr82941 ()
> z = y;
> }
>
> -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> --
> 2.31.1
>
--
BR,
Hongtao
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] x86: Use XMM31 for scratch SSE register
2021-08-02 17:47 [PATCH] x86: Use XMM31 for scratch SSE register H.J. Lu
2021-08-03 1:38 ` Hongtao Liu
@ 2021-08-03 8:02 ` Uros Bizjak
2021-08-03 8:15 ` Hongtao Liu
1 sibling, 1 reply; 7+ messages in thread
From: Uros Bizjak @ 2021-08-03 8:02 UTC (permalink / raw)
To: H.J. Lu; +Cc: gcc-patches, liuhongt
On Mon, Aug 2, 2021 at 7:47 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> In 64-bit mode, use XMM31 for scratch SSE register to avoid vzeroupper
> if possible.
>
> gcc/
>
> * config/i386/i386.c (ix86_gen_scratch_sse_rtx): In 64-bit mode,
> try XMM31 to avoid vzeroupper.
>
> gcc/testsuite/
>
> * gcc.target/i386/avx-vzeroupper-14.c: Pass -mno-avx512f to
> disable XMM31.
> * gcc.target/i386/avx-vzeroupper-15.c: Likewise.
> * gcc.target/i386/pr82941-1.c: Updated. Check for vzeroupper.
> * gcc.target/i386/pr82942-1.c: Likewise.
> * gcc.target/i386/pr82990-1.c: Likewise.
> * gcc.target/i386/pr82990-3.c: Likewise.
> * gcc.target/i386/pr82990-5.c: Likewise.
> * gcc.target/i386/pr100865-4b.c: Likewise.
> * gcc.target/i386/pr100865-6b.c: Likewise.
> * gcc.target/i386/pr100865-7b.c: Likewise.
> * gcc.target/i386/pr100865-10b.c: Likewise.
> * gcc.target/i386/pr100865-8b.c: Updated.
> * gcc.target/i386/pr100865-9b.c: Likewise.
> * gcc.target/i386/pr100865-11b.c: Likewise.
> * gcc.target/i386/pr100865-12b.c: Likewise.
> ---
> gcc/config/i386/i386.c | 18 +++++++++++++++---
> .../gcc.target/i386/avx-vzeroupper-14.c | 2 +-
> .../gcc.target/i386/avx-vzeroupper-15.c | 2 +-
> gcc/testsuite/gcc.target/i386/pr100865-10b.c | 1 +
> gcc/testsuite/gcc.target/i386/pr100865-11b.c | 2 +-
> gcc/testsuite/gcc.target/i386/pr100865-12b.c | 2 +-
> gcc/testsuite/gcc.target/i386/pr100865-4b.c | 2 ++
> gcc/testsuite/gcc.target/i386/pr100865-6b.c | 5 ++++-
> gcc/testsuite/gcc.target/i386/pr100865-7b.c | 5 ++++-
> gcc/testsuite/gcc.target/i386/pr100865-8b.c | 2 +-
> gcc/testsuite/gcc.target/i386/pr100865-9b.c | 2 +-
> gcc/testsuite/gcc.target/i386/pr82941-1.c | 3 ++-
> gcc/testsuite/gcc.target/i386/pr82942-1.c | 3 ++-
> gcc/testsuite/gcc.target/i386/pr82990-1.c | 3 ++-
> gcc/testsuite/gcc.target/i386/pr82990-3.c | 3 ++-
> gcc/testsuite/gcc.target/i386/pr82990-5.c | 3 ++-
> 16 files changed, 42 insertions(+), 16 deletions(-)
>
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index 842eb0e6786..ec0690876b7 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -23335,9 +23335,21 @@ rtx
> ix86_gen_scratch_sse_rtx (machine_mode mode)
> {
> if (TARGET_SSE && !lra_in_progress)
> - return gen_rtx_REG (mode, (TARGET_64BIT
> - ? LAST_REX_SSE_REG
> - : LAST_SSE_REG));
> + {
> + unsigned int regno;
> + if (TARGET_64BIT)
> + {
> + /* In 64-bit mode, use XMM31 to avoid vzeroupper and always
> + use XMM31 for CSE. */
> + if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
> + regno = LAST_EXT_REX_SSE_REG;
> + else
> + regno = LAST_REX_SSE_REG;
> + }
> + else
> + regno = LAST_SSE_REG;
Assuming that ix86_hard_regno_mode_ok always returns false for XMM31
in 64bit mode, we can do:
/* Use XMM31 if available to avoid vzeroupper. */
if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
regno = LAST_EXST_REX_SSE_REG;
else if (TARGET_64BIT)
regno = LAST_EXT_REX_SSE_REG;
else
regno = LAST_SSE_REG;
Uros.
> + return gen_rtx_REG (mode, regno);
> + }
> else
> return gen_reg_rtx (mode);
> }
> diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
> index a31b4a2a63a..9590f25da22 100644
> --- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
> +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-options "-O2 -mavx -mtune=generic -dp" } */
> +/* { dg-options "-O2 -mavx -mno-avx512f -mtune=generic -dp" } */
>
> #include <immintrin.h>
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
> index 803936eef01..36dcf7367f1 100644
> --- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
> +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-options "-O2 -mavx -mtune=generic -dp" } */
> +/* { dg-options "-O2 -mavx -mno-avx512f -mtune=generic -dp" } */
>
> #include <immintrin.h>
>
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-10b.c b/gcc/testsuite/gcc.target/i386/pr100865-10b.c
> index e5616d8d258..77ace86ffe8 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-10b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-10b.c
> @@ -5,3 +5,4 @@
>
> /* { dg-final { scan-assembler-times "vpbroadcastb\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
> /* { dg-final { scan-assembler-times "vmovdqu8\[\\t \]%ymm\[0-9\]+, " 8 } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-11b.c b/gcc/testsuite/gcc.target/i386/pr100865-11b.c
> index 12d55b9a642..7e458e85cdd 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-11b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-11b.c
> @@ -5,4 +5,4 @@
>
> /* { dg-final { scan-assembler-times "movabsq" 1 } } */
> /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-12b.c b/gcc/testsuite/gcc.target/i386/pr100865-12b.c
> index 63a5629b90c..dee0cfb016a 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-12b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-12b.c
> @@ -5,4 +5,4 @@
>
> /* { dg-final { scan-assembler-times "movabsq" 1 } } */
> /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-4b.c b/gcc/testsuite/gcc.target/i386/pr100865-4b.c
> index 8e8a7eaaaff..80e9fdb12ea 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-4b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-4b.c
> @@ -5,5 +5,7 @@
>
> /* { dg-final { scan-assembler-times "vpbroadcastb\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
> /* { dg-final { scan-assembler-times "vmovdqu8\[\\t \]%ymm\[0-9\]+, " 2 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> /* { dg-final { scan-assembler-not "vpbroadcastb\[\\t \]+%xmm\[0-9\]+, %ymm\[0-9\]+" } } */
> /* { dg-final { scan-assembler-not "vmovdqa" } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-6b.c b/gcc/testsuite/gcc.target/i386/pr100865-6b.c
> index 44e74c64e55..35f2e961d25 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-6b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-6b.c
> @@ -4,6 +4,9 @@
> #include "pr100865-6a.c"
>
> /* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
> -/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 8 } } */
> +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 8 { target ia32 } } } */
> +/* { dg-final { scan-assembler-times "vmovdqu32\[\\t \]%ymm\[0-9\]+, " 8 { target { ! ia32 } } } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> /* { dg-final { scan-assembler-not "vpbroadcastd\[\\t \]+%xmm\[0-9\]+, %ymm\[0-9\]+" } } */
> /* { dg-final { scan-assembler-not "vmovdqa" } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-7b.c b/gcc/testsuite/gcc.target/i386/pr100865-7b.c
> index 0a68820aa32..ad267c43891 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-7b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-7b.c
> @@ -5,5 +5,8 @@
>
> /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%r\[^\n\]*, %ymm\[0-9\]+" 1 { target { ! ia32 } } } } */
> /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+\[^\n\]*, %ymm\[0-9\]+" 1 { target ia32 } } } */
> -/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 16 } } */
> +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 16 { target ia32 } } } */
> +/* { dg-final { scan-assembler-times "vmovdqu64\[\\t \]%ymm\[0-9\]+, " 16 { target { ! ia32 } } } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> /* { dg-final { scan-assembler-not "vmovdqa" } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-8b.c b/gcc/testsuite/gcc.target/i386/pr100865-8b.c
> index 99a10ad83bd..4b7dd7cee3e 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-8b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-8b.c
> @@ -4,4 +4,4 @@
> #include "pr100865-8a.c"
>
> /* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr100865-9b.c b/gcc/testsuite/gcc.target/i386/pr100865-9b.c
> index 14696248525..a315dde7c52 100644
> --- a/gcc/testsuite/gcc.target/i386/pr100865-9b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr100865-9b.c
> @@ -4,4 +4,4 @@
> #include "pr100865-9a.c"
>
> /* { dg-final { scan-assembler-times "vpbroadcastw\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr82941-1.c b/gcc/testsuite/gcc.target/i386/pr82941-1.c
> index d7e530d5116..c3be2f5b797 100644
> --- a/gcc/testsuite/gcc.target/i386/pr82941-1.c
> +++ b/gcc/testsuite/gcc.target/i386/pr82941-1.c
> @@ -11,4 +11,5 @@ pr82941 ()
> z = y;
> }
>
> -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr82942-1.c b/gcc/testsuite/gcc.target/i386/pr82942-1.c
> index 9cdf81a9d60..29ead049a67 100644
> --- a/gcc/testsuite/gcc.target/i386/pr82942-1.c
> +++ b/gcc/testsuite/gcc.target/i386/pr82942-1.c
> @@ -3,4 +3,5 @@
>
> #include "pr82941-1.c"
>
> -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr82990-1.c b/gcc/testsuite/gcc.target/i386/pr82990-1.c
> index ff1d6d40eb2..bbf580fea77 100644
> --- a/gcc/testsuite/gcc.target/i386/pr82990-1.c
> +++ b/gcc/testsuite/gcc.target/i386/pr82990-1.c
> @@ -11,4 +11,5 @@ pr82941 ()
> z = y;
> }
>
> -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr82990-3.c b/gcc/testsuite/gcc.target/i386/pr82990-3.c
> index 201fa98d8d4..89ddb20adb3 100644
> --- a/gcc/testsuite/gcc.target/i386/pr82990-3.c
> +++ b/gcc/testsuite/gcc.target/i386/pr82990-3.c
> @@ -3,4 +3,5 @@
>
> #include "pr82941-1.c"
>
> -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> diff --git a/gcc/testsuite/gcc.target/i386/pr82990-5.c b/gcc/testsuite/gcc.target/i386/pr82990-5.c
> index 9932bdc5375..b9da0e706b1 100644
> --- a/gcc/testsuite/gcc.target/i386/pr82990-5.c
> +++ b/gcc/testsuite/gcc.target/i386/pr82990-5.c
> @@ -11,4 +11,5 @@ pr82941 ()
> z = y;
> }
>
> -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> --
> 2.31.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] x86: Use XMM31 for scratch SSE register
2021-08-03 8:02 ` Uros Bizjak
@ 2021-08-03 8:15 ` Hongtao Liu
2021-08-03 8:43 ` Uros Bizjak
0 siblings, 1 reply; 7+ messages in thread
From: Hongtao Liu @ 2021-08-03 8:15 UTC (permalink / raw)
To: Uros Bizjak; +Cc: H.J. Lu, liuhongt, gcc-patches
On Tue, Aug 3, 2021 at 4:03 PM Uros Bizjak via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> On Mon, Aug 2, 2021 at 7:47 PM H.J. Lu <hjl.tools@gmail.com> wrote:
> >
> > In 64-bit mode, use XMM31 for scratch SSE register to avoid vzeroupper
> > if possible.
> >
> > gcc/
> >
> > * config/i386/i386.c (ix86_gen_scratch_sse_rtx): In 64-bit mode,
> > try XMM31 to avoid vzeroupper.
> >
> > gcc/testsuite/
> >
> > * gcc.target/i386/avx-vzeroupper-14.c: Pass -mno-avx512f to
> > disable XMM31.
> > * gcc.target/i386/avx-vzeroupper-15.c: Likewise.
> > * gcc.target/i386/pr82941-1.c: Updated. Check for vzeroupper.
> > * gcc.target/i386/pr82942-1.c: Likewise.
> > * gcc.target/i386/pr82990-1.c: Likewise.
> > * gcc.target/i386/pr82990-3.c: Likewise.
> > * gcc.target/i386/pr82990-5.c: Likewise.
> > * gcc.target/i386/pr100865-4b.c: Likewise.
> > * gcc.target/i386/pr100865-6b.c: Likewise.
> > * gcc.target/i386/pr100865-7b.c: Likewise.
> > * gcc.target/i386/pr100865-10b.c: Likewise.
> > * gcc.target/i386/pr100865-8b.c: Updated.
> > * gcc.target/i386/pr100865-9b.c: Likewise.
> > * gcc.target/i386/pr100865-11b.c: Likewise.
> > * gcc.target/i386/pr100865-12b.c: Likewise.
> > ---
> > gcc/config/i386/i386.c | 18 +++++++++++++++---
> > .../gcc.target/i386/avx-vzeroupper-14.c | 2 +-
> > .../gcc.target/i386/avx-vzeroupper-15.c | 2 +-
> > gcc/testsuite/gcc.target/i386/pr100865-10b.c | 1 +
> > gcc/testsuite/gcc.target/i386/pr100865-11b.c | 2 +-
> > gcc/testsuite/gcc.target/i386/pr100865-12b.c | 2 +-
> > gcc/testsuite/gcc.target/i386/pr100865-4b.c | 2 ++
> > gcc/testsuite/gcc.target/i386/pr100865-6b.c | 5 ++++-
> > gcc/testsuite/gcc.target/i386/pr100865-7b.c | 5 ++++-
> > gcc/testsuite/gcc.target/i386/pr100865-8b.c | 2 +-
> > gcc/testsuite/gcc.target/i386/pr100865-9b.c | 2 +-
> > gcc/testsuite/gcc.target/i386/pr82941-1.c | 3 ++-
> > gcc/testsuite/gcc.target/i386/pr82942-1.c | 3 ++-
> > gcc/testsuite/gcc.target/i386/pr82990-1.c | 3 ++-
> > gcc/testsuite/gcc.target/i386/pr82990-3.c | 3 ++-
> > gcc/testsuite/gcc.target/i386/pr82990-5.c | 3 ++-
> > 16 files changed, 42 insertions(+), 16 deletions(-)
> >
> > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> > index 842eb0e6786..ec0690876b7 100644
> > --- a/gcc/config/i386/i386.c
> > +++ b/gcc/config/i386/i386.c
> > @@ -23335,9 +23335,21 @@ rtx
> > ix86_gen_scratch_sse_rtx (machine_mode mode)
> > {
> > if (TARGET_SSE && !lra_in_progress)
> > - return gen_rtx_REG (mode, (TARGET_64BIT
> > - ? LAST_REX_SSE_REG
> > - : LAST_SSE_REG));
> > + {
> > + unsigned int regno;
> > + if (TARGET_64BIT)
> > + {
> > + /* In 64-bit mode, use XMM31 to avoid vzeroupper and always
> > + use XMM31 for CSE. */
> > + if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
> > + regno = LAST_EXT_REX_SSE_REG;
> > + else
> > + regno = LAST_REX_SSE_REG;
> > + }
> > + else
> > + regno = LAST_SSE_REG;
>
> Assuming that ix86_hard_regno_mode_ok always returns false for XMM31
> in 64bit mode, we can do:
>
> /* Use XMM31 if available to avoid vzeroupper. */
> if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
> regno = LAST_EXST_REX_SSE_REG;
> else if (TARGET_64BIT)
> regno = LAST_EXT_REX_SSE_REG;
why? w/o avx512 xmm31 is not available.
> else
> regno = LAST_SSE_REG;
>
> Uros.
>
> > + return gen_rtx_REG (mode, regno);
> > + }
> > else
> > return gen_reg_rtx (mode);
> > }
> > diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
> > index a31b4a2a63a..9590f25da22 100644
> > --- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
> > +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-14.c
> > @@ -1,5 +1,5 @@
> > /* { dg-do compile } */
> > -/* { dg-options "-O2 -mavx -mtune=generic -dp" } */
> > +/* { dg-options "-O2 -mavx -mno-avx512f -mtune=generic -dp" } */
> >
> > #include <immintrin.h>
> >
> > diff --git a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
> > index 803936eef01..36dcf7367f1 100644
> > --- a/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
> > +++ b/gcc/testsuite/gcc.target/i386/avx-vzeroupper-15.c
> > @@ -1,5 +1,5 @@
> > /* { dg-do compile } */
> > -/* { dg-options "-O2 -mavx -mtune=generic -dp" } */
> > +/* { dg-options "-O2 -mavx -mno-avx512f -mtune=generic -dp" } */
> >
> > #include <immintrin.h>
> >
> > diff --git a/gcc/testsuite/gcc.target/i386/pr100865-10b.c b/gcc/testsuite/gcc.target/i386/pr100865-10b.c
> > index e5616d8d258..77ace86ffe8 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr100865-10b.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr100865-10b.c
> > @@ -5,3 +5,4 @@
> >
> > /* { dg-final { scan-assembler-times "vpbroadcastb\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
> > /* { dg-final { scan-assembler-times "vmovdqu8\[\\t \]%ymm\[0-9\]+, " 8 } } */
> > +/* { dg-final { scan-assembler-not "vzeroupper" } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr100865-11b.c b/gcc/testsuite/gcc.target/i386/pr100865-11b.c
> > index 12d55b9a642..7e458e85cdd 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr100865-11b.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr100865-11b.c
> > @@ -5,4 +5,4 @@
> >
> > /* { dg-final { scan-assembler-times "movabsq" 1 } } */
> > /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> > -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> > +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr100865-12b.c b/gcc/testsuite/gcc.target/i386/pr100865-12b.c
> > index 63a5629b90c..dee0cfb016a 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr100865-12b.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr100865-12b.c
> > @@ -5,4 +5,4 @@
> >
> > /* { dg-final { scan-assembler-times "movabsq" 1 } } */
> > /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> > -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> > +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr100865-4b.c b/gcc/testsuite/gcc.target/i386/pr100865-4b.c
> > index 8e8a7eaaaff..80e9fdb12ea 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr100865-4b.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr100865-4b.c
> > @@ -5,5 +5,7 @@
> >
> > /* { dg-final { scan-assembler-times "vpbroadcastb\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
> > /* { dg-final { scan-assembler-times "vmovdqu8\[\\t \]%ymm\[0-9\]+, " 2 } } */
> > +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> > +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> > /* { dg-final { scan-assembler-not "vpbroadcastb\[\\t \]+%xmm\[0-9\]+, %ymm\[0-9\]+" } } */
> > /* { dg-final { scan-assembler-not "vmovdqa" } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr100865-6b.c b/gcc/testsuite/gcc.target/i386/pr100865-6b.c
> > index 44e74c64e55..35f2e961d25 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr100865-6b.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr100865-6b.c
> > @@ -4,6 +4,9 @@
> > #include "pr100865-6a.c"
> >
> > /* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %ymm\[0-9\]+" 1 } } */
> > -/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 8 } } */
> > +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 8 { target ia32 } } } */
> > +/* { dg-final { scan-assembler-times "vmovdqu32\[\\t \]%ymm\[0-9\]+, " 8 { target { ! ia32 } } } } */
> > +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> > +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> > /* { dg-final { scan-assembler-not "vpbroadcastd\[\\t \]+%xmm\[0-9\]+, %ymm\[0-9\]+" } } */
> > /* { dg-final { scan-assembler-not "vmovdqa" } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr100865-7b.c b/gcc/testsuite/gcc.target/i386/pr100865-7b.c
> > index 0a68820aa32..ad267c43891 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr100865-7b.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr100865-7b.c
> > @@ -5,5 +5,8 @@
> >
> > /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%r\[^\n\]*, %ymm\[0-9\]+" 1 { target { ! ia32 } } } } */
> > /* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+\[^\n\]*, %ymm\[0-9\]+" 1 { target ia32 } } } */
> > -/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 16 } } */
> > +/* { dg-final { scan-assembler-times "vmovdqu\[\\t \]%ymm\[0-9\]+, " 16 { target ia32 } } } */
> > +/* { dg-final { scan-assembler-times "vmovdqu64\[\\t \]%ymm\[0-9\]+, " 16 { target { ! ia32 } } } } */
> > +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> > +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> > /* { dg-final { scan-assembler-not "vmovdqa" } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr100865-8b.c b/gcc/testsuite/gcc.target/i386/pr100865-8b.c
> > index 99a10ad83bd..4b7dd7cee3e 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr100865-8b.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr100865-8b.c
> > @@ -4,4 +4,4 @@
> > #include "pr100865-8a.c"
> >
> > /* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> > -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> > +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr100865-9b.c b/gcc/testsuite/gcc.target/i386/pr100865-9b.c
> > index 14696248525..a315dde7c52 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr100865-9b.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr100865-9b.c
> > @@ -4,4 +4,4 @@
> > #include "pr100865-9a.c"
> >
> > /* { dg-final { scan-assembler-times "vpbroadcastw\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
> > -/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
> > +/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr82941-1.c b/gcc/testsuite/gcc.target/i386/pr82941-1.c
> > index d7e530d5116..c3be2f5b797 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr82941-1.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr82941-1.c
> > @@ -11,4 +11,5 @@ pr82941 ()
> > z = y;
> > }
> >
> > -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> > +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> > +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr82942-1.c b/gcc/testsuite/gcc.target/i386/pr82942-1.c
> > index 9cdf81a9d60..29ead049a67 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr82942-1.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr82942-1.c
> > @@ -3,4 +3,5 @@
> >
> > #include "pr82941-1.c"
> >
> > -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> > +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> > +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr82990-1.c b/gcc/testsuite/gcc.target/i386/pr82990-1.c
> > index ff1d6d40eb2..bbf580fea77 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr82990-1.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr82990-1.c
> > @@ -11,4 +11,5 @@ pr82941 ()
> > z = y;
> > }
> >
> > -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> > +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> > +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr82990-3.c b/gcc/testsuite/gcc.target/i386/pr82990-3.c
> > index 201fa98d8d4..89ddb20adb3 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr82990-3.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr82990-3.c
> > @@ -3,4 +3,5 @@
> >
> > #include "pr82941-1.c"
> >
> > -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> > +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> > +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> > diff --git a/gcc/testsuite/gcc.target/i386/pr82990-5.c b/gcc/testsuite/gcc.target/i386/pr82990-5.c
> > index 9932bdc5375..b9da0e706b1 100644
> > --- a/gcc/testsuite/gcc.target/i386/pr82990-5.c
> > +++ b/gcc/testsuite/gcc.target/i386/pr82990-5.c
> > @@ -11,4 +11,5 @@ pr82941 ()
> > z = y;
> > }
> >
> > -/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
> > +/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
> > +/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
> > --
> > 2.31.1
> >
--
BR,
Hongtao
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] x86: Use XMM31 for scratch SSE register
2021-08-03 8:15 ` Hongtao Liu
@ 2021-08-03 8:43 ` Uros Bizjak
2021-08-03 12:10 ` H.J. Lu
0 siblings, 1 reply; 7+ messages in thread
From: Uros Bizjak @ 2021-08-03 8:43 UTC (permalink / raw)
To: Hongtao Liu; +Cc: H.J. Lu, liuhongt, gcc-patches
On Tue, Aug 3, 2021 at 10:15 AM Hongtao Liu <crazylht@gmail.com> wrote:
>
> On Tue, Aug 3, 2021 at 4:03 PM Uros Bizjak via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
> >
> > On Mon, Aug 2, 2021 at 7:47 PM H.J. Lu <hjl.tools@gmail.com> wrote:
> > >
> > > In 64-bit mode, use XMM31 for scratch SSE register to avoid vzeroupper
> > > if possible.
> > >
> > > gcc/
> > >
> > > * config/i386/i386.c (ix86_gen_scratch_sse_rtx): In 64-bit mode,
> > > try XMM31 to avoid vzeroupper.
> > >
> > > gcc/testsuite/
> > >
> > > * gcc.target/i386/avx-vzeroupper-14.c: Pass -mno-avx512f to
> > > disable XMM31.
> > > * gcc.target/i386/avx-vzeroupper-15.c: Likewise.
> > > * gcc.target/i386/pr82941-1.c: Updated. Check for vzeroupper.
> > > * gcc.target/i386/pr82942-1.c: Likewise.
> > > * gcc.target/i386/pr82990-1.c: Likewise.
> > > * gcc.target/i386/pr82990-3.c: Likewise.
> > > * gcc.target/i386/pr82990-5.c: Likewise.
> > > * gcc.target/i386/pr100865-4b.c: Likewise.
> > > * gcc.target/i386/pr100865-6b.c: Likewise.
> > > * gcc.target/i386/pr100865-7b.c: Likewise.
> > > * gcc.target/i386/pr100865-10b.c: Likewise.
> > > * gcc.target/i386/pr100865-8b.c: Updated.
> > > * gcc.target/i386/pr100865-9b.c: Likewise.
> > > * gcc.target/i386/pr100865-11b.c: Likewise.
> > > * gcc.target/i386/pr100865-12b.c: Likewise.
> > > ---
> > > gcc/config/i386/i386.c | 18 +++++++++++++++---
> > > .../gcc.target/i386/avx-vzeroupper-14.c | 2 +-
> > > .../gcc.target/i386/avx-vzeroupper-15.c | 2 +-
> > > gcc/testsuite/gcc.target/i386/pr100865-10b.c | 1 +
> > > gcc/testsuite/gcc.target/i386/pr100865-11b.c | 2 +-
> > > gcc/testsuite/gcc.target/i386/pr100865-12b.c | 2 +-
> > > gcc/testsuite/gcc.target/i386/pr100865-4b.c | 2 ++
> > > gcc/testsuite/gcc.target/i386/pr100865-6b.c | 5 ++++-
> > > gcc/testsuite/gcc.target/i386/pr100865-7b.c | 5 ++++-
> > > gcc/testsuite/gcc.target/i386/pr100865-8b.c | 2 +-
> > > gcc/testsuite/gcc.target/i386/pr100865-9b.c | 2 +-
> > > gcc/testsuite/gcc.target/i386/pr82941-1.c | 3 ++-
> > > gcc/testsuite/gcc.target/i386/pr82942-1.c | 3 ++-
> > > gcc/testsuite/gcc.target/i386/pr82990-1.c | 3 ++-
> > > gcc/testsuite/gcc.target/i386/pr82990-3.c | 3 ++-
> > > gcc/testsuite/gcc.target/i386/pr82990-5.c | 3 ++-
> > > 16 files changed, 42 insertions(+), 16 deletions(-)
> > >
> > > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> > > index 842eb0e6786..ec0690876b7 100644
> > > --- a/gcc/config/i386/i386.c
> > > +++ b/gcc/config/i386/i386.c
> > > @@ -23335,9 +23335,21 @@ rtx
> > > ix86_gen_scratch_sse_rtx (machine_mode mode)
> > > {
> > > if (TARGET_SSE && !lra_in_progress)
> > > - return gen_rtx_REG (mode, (TARGET_64BIT
> > > - ? LAST_REX_SSE_REG
> > > - : LAST_SSE_REG));
> > > + {
> > > + unsigned int regno;
> > > + if (TARGET_64BIT)
> > > + {
> > > + /* In 64-bit mode, use XMM31 to avoid vzeroupper and always
> > > + use XMM31 for CSE. */
> > > + if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
> > > + regno = LAST_EXT_REX_SSE_REG;
> > > + else
> > > + regno = LAST_REX_SSE_REG;
> > > + }
> > > + else
> > > + regno = LAST_SSE_REG;
> >
> > Assuming that ix86_hard_regno_mode_ok always returns false for XMM31
> > in 64bit mode, we can do:
> >
> > /* Use XMM31 if available to avoid vzeroupper. */
> > if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
> > regno = LAST_EXST_REX_SSE_REG;
> > else if (TARGET_64BIT)
> > regno = LAST_EXT_REX_SSE_REG;
> why? w/o avx512 xmm31 is not available.
Oh, a typo, this should read LAST_REX_SSE_REG.
Uros.
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] x86: Use XMM31 for scratch SSE register
2021-08-03 8:43 ` Uros Bizjak
@ 2021-08-03 12:10 ` H.J. Lu
2021-08-03 13:13 ` H.J. Lu
0 siblings, 1 reply; 7+ messages in thread
From: H.J. Lu @ 2021-08-03 12:10 UTC (permalink / raw)
To: Uros Bizjak; +Cc: Hongtao Liu, liuhongt, gcc-patches
On Tue, Aug 3, 2021 at 1:43 AM Uros Bizjak <ubizjak@gmail.com> wrote:
>
> On Tue, Aug 3, 2021 at 10:15 AM Hongtao Liu <crazylht@gmail.com> wrote:
> >
> > On Tue, Aug 3, 2021 at 4:03 PM Uros Bizjak via Gcc-patches
> > <gcc-patches@gcc.gnu.org> wrote:
> > >
> > > On Mon, Aug 2, 2021 at 7:47 PM H.J. Lu <hjl.tools@gmail.com> wrote:
> > > >
> > > > In 64-bit mode, use XMM31 for scratch SSE register to avoid vzeroupper
> > > > if possible.
> > > >
> > > > gcc/
> > > >
> > > > * config/i386/i386.c (ix86_gen_scratch_sse_rtx): In 64-bit mode,
> > > > try XMM31 to avoid vzeroupper.
> > > >
> > > > gcc/testsuite/
> > > >
> > > > * gcc.target/i386/avx-vzeroupper-14.c: Pass -mno-avx512f to
> > > > disable XMM31.
> > > > * gcc.target/i386/avx-vzeroupper-15.c: Likewise.
> > > > * gcc.target/i386/pr82941-1.c: Updated. Check for vzeroupper.
> > > > * gcc.target/i386/pr82942-1.c: Likewise.
> > > > * gcc.target/i386/pr82990-1.c: Likewise.
> > > > * gcc.target/i386/pr82990-3.c: Likewise.
> > > > * gcc.target/i386/pr82990-5.c: Likewise.
> > > > * gcc.target/i386/pr100865-4b.c: Likewise.
> > > > * gcc.target/i386/pr100865-6b.c: Likewise.
> > > > * gcc.target/i386/pr100865-7b.c: Likewise.
> > > > * gcc.target/i386/pr100865-10b.c: Likewise.
> > > > * gcc.target/i386/pr100865-8b.c: Updated.
> > > > * gcc.target/i386/pr100865-9b.c: Likewise.
> > > > * gcc.target/i386/pr100865-11b.c: Likewise.
> > > > * gcc.target/i386/pr100865-12b.c: Likewise.
> > > > ---
> > > > gcc/config/i386/i386.c | 18 +++++++++++++++---
> > > > .../gcc.target/i386/avx-vzeroupper-14.c | 2 +-
> > > > .../gcc.target/i386/avx-vzeroupper-15.c | 2 +-
> > > > gcc/testsuite/gcc.target/i386/pr100865-10b.c | 1 +
> > > > gcc/testsuite/gcc.target/i386/pr100865-11b.c | 2 +-
> > > > gcc/testsuite/gcc.target/i386/pr100865-12b.c | 2 +-
> > > > gcc/testsuite/gcc.target/i386/pr100865-4b.c | 2 ++
> > > > gcc/testsuite/gcc.target/i386/pr100865-6b.c | 5 ++++-
> > > > gcc/testsuite/gcc.target/i386/pr100865-7b.c | 5 ++++-
> > > > gcc/testsuite/gcc.target/i386/pr100865-8b.c | 2 +-
> > > > gcc/testsuite/gcc.target/i386/pr100865-9b.c | 2 +-
> > > > gcc/testsuite/gcc.target/i386/pr82941-1.c | 3 ++-
> > > > gcc/testsuite/gcc.target/i386/pr82942-1.c | 3 ++-
> > > > gcc/testsuite/gcc.target/i386/pr82990-1.c | 3 ++-
> > > > gcc/testsuite/gcc.target/i386/pr82990-3.c | 3 ++-
> > > > gcc/testsuite/gcc.target/i386/pr82990-5.c | 3 ++-
> > > > 16 files changed, 42 insertions(+), 16 deletions(-)
> > > >
> > > > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> > > > index 842eb0e6786..ec0690876b7 100644
> > > > --- a/gcc/config/i386/i386.c
> > > > +++ b/gcc/config/i386/i386.c
> > > > @@ -23335,9 +23335,21 @@ rtx
> > > > ix86_gen_scratch_sse_rtx (machine_mode mode)
> > > > {
> > > > if (TARGET_SSE && !lra_in_progress)
> > > > - return gen_rtx_REG (mode, (TARGET_64BIT
> > > > - ? LAST_REX_SSE_REG
> > > > - : LAST_SSE_REG));
> > > > + {
> > > > + unsigned int regno;
> > > > + if (TARGET_64BIT)
> > > > + {
> > > > + /* In 64-bit mode, use XMM31 to avoid vzeroupper and always
> > > > + use XMM31 for CSE. */
> > > > + if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
> > > > + regno = LAST_EXT_REX_SSE_REG;
> > > > + else
> > > > + regno = LAST_REX_SSE_REG;
> > > > + }
> > > > + else
> > > > + regno = LAST_SSE_REG;
> > >
> > > Assuming that ix86_hard_regno_mode_ok always returns false for XMM31
> > > in 64bit mode, we can do:
> > >
> > > /* Use XMM31 if available to avoid vzeroupper. */
> > > if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
It doesn't work for -m32 since ix86_hard_regno_mode_ok doesn't check
for TARGET_64BIT. LAST_EXST_REX_SSE_REG is used for -m32:
$ /export/build/gnu/tools-build/gcc-gitlab-debug/build-x86_64-linux/gcc/xgcc
-B/export/build/gnu/tools-build/gcc-gitlab-debug/build-x86_64-linux/gcc/
/export/gnu/import/git/gitlab/x86-gcc/gcc/testsuite/gcc.target/i386/pr82941-1.c
-m32 -fdiagnostics-plain-output -O2 -march=skylake-avx512
-ffat-lto-objects -fno-ident -S -o pr82941-1.s
xgcc: internal compiler error: Segmentation fault signal terminated program cc1
Please submit a full bug report,
with preprocessed source if appropriate.
See <https://gcc.gnu.org/bugs/> for instructions.
$
Program received signal SIGSEGV, Segmentation fault.
0x0000000001201c64 in general_operand (
op=<error reading variable: Cannot access memory at address
0x7ffffbffeff8>, mode=<error reading variable: Cannot access memory at
address 0x7ffffbffeff4>)
at /export/gnu/import/git/gitlab/x86-gcc/gcc/recog.c:1412
1412 {
(gdb) bt
#0 0x0000000001201c64 in general_operand (
op=<error reading variable: Cannot access memory at address
0x7ffffbffeff8>, mode=<error reading variable: Cannot access memory at
address 0x7ffffbffeff4>)
at /export/gnu/import/git/gitlab/x86-gcc/gcc/recog.c:1412
#1 0x000000000120221e in register_operand (op=0x7ffff5c10510, mode=E_V8DFmode)
at /export/gnu/import/git/gitlab/x86-gcc/gcc/recog.c:1559
#2 0x00000000018fcfdb in ix86_expand_vector_move (mode=E_V8DFmode,
operands=0x7ffffbfff190)
at /export/gnu/import/git/gitlab/x86-gcc/gcc/config/i386/i386-expand.c:625
#3 0x0000000001ef9bc2 in gen_movv8df (operand0=0x7ffff5c10510,
operand1=0x7ffff6351d98)
at /export/gnu/import/git/gitlab/x86-gcc/gcc/config/i386/sse.md:1051
#4 0x0000000000de6cfb in insn_gen_fn::operator()<rtx_def*, rtx_def*> (
this=0x2d88908 <insn_data+278376>)
at /export/gnu/import/git/gitlab/x86-gcc/gcc/recog.h:407
#5 0x0000000000dbe4ec in emit_move_insn_1 (x=0x7ffff5c10510, y=0x7ffff6351d98)
at /export/gnu/import/git/gitlab/x86-gcc/gcc/expr.c:3930
#6 0x0000000000dbefde in emit_move_insn (x=0x7ffff5c10510, y=0x7ffff6351d98)
at /export/gnu/import/git/gitlab/x86-gcc/gcc/expr.c:4100
#7 0x00000000018fd036 in ix86_expand_vector_move (mode=E_V8DFmode,
operands=0x7ffffbfff420)
at /export/gnu/import/git/gitlab/x86-gcc/gcc/config/i386/i386-expand.c:629
#8 0x0000000001ef9bc2 in gen_movv8df (operand0=0x7ffff5c104e0,
> > > regno = LAST_EXST_REX_SSE_REG;
> > > else if (TARGET_64BIT)
> > > regno = LAST_EXT_REX_SSE_REG;
>
> > why? w/o avx512 xmm31 is not available.
>
> Oh, a typo, this should read LAST_REX_SSE_REG.
>
> Uros.
--
H.J.
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] x86: Use XMM31 for scratch SSE register
2021-08-03 12:10 ` H.J. Lu
@ 2021-08-03 13:13 ` H.J. Lu
0 siblings, 0 replies; 7+ messages in thread
From: H.J. Lu @ 2021-08-03 13:13 UTC (permalink / raw)
To: Uros Bizjak; +Cc: Hongtao Liu, liuhongt, gcc-patches
On Tue, Aug 3, 2021 at 5:10 AM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> On Tue, Aug 3, 2021 at 1:43 AM Uros Bizjak <ubizjak@gmail.com> wrote:
> >
> > On Tue, Aug 3, 2021 at 10:15 AM Hongtao Liu <crazylht@gmail.com> wrote:
> > >
> > > On Tue, Aug 3, 2021 at 4:03 PM Uros Bizjak via Gcc-patches
> > > <gcc-patches@gcc.gnu.org> wrote:
> > > >
> > > > On Mon, Aug 2, 2021 at 7:47 PM H.J. Lu <hjl.tools@gmail.com> wrote:
> > > > >
> > > > > In 64-bit mode, use XMM31 for scratch SSE register to avoid vzeroupper
> > > > > if possible.
> > > > >
> > > > > gcc/
> > > > >
> > > > > * config/i386/i386.c (ix86_gen_scratch_sse_rtx): In 64-bit mode,
> > > > > try XMM31 to avoid vzeroupper.
> > > > >
> > > > > gcc/testsuite/
> > > > >
> > > > > * gcc.target/i386/avx-vzeroupper-14.c: Pass -mno-avx512f to
> > > > > disable XMM31.
> > > > > * gcc.target/i386/avx-vzeroupper-15.c: Likewise.
> > > > > * gcc.target/i386/pr82941-1.c: Updated. Check for vzeroupper.
> > > > > * gcc.target/i386/pr82942-1.c: Likewise.
> > > > > * gcc.target/i386/pr82990-1.c: Likewise.
> > > > > * gcc.target/i386/pr82990-3.c: Likewise.
> > > > > * gcc.target/i386/pr82990-5.c: Likewise.
> > > > > * gcc.target/i386/pr100865-4b.c: Likewise.
> > > > > * gcc.target/i386/pr100865-6b.c: Likewise.
> > > > > * gcc.target/i386/pr100865-7b.c: Likewise.
> > > > > * gcc.target/i386/pr100865-10b.c: Likewise.
> > > > > * gcc.target/i386/pr100865-8b.c: Updated.
> > > > > * gcc.target/i386/pr100865-9b.c: Likewise.
> > > > > * gcc.target/i386/pr100865-11b.c: Likewise.
> > > > > * gcc.target/i386/pr100865-12b.c: Likewise.
> > > > > ---
> > > > > gcc/config/i386/i386.c | 18 +++++++++++++++---
> > > > > .../gcc.target/i386/avx-vzeroupper-14.c | 2 +-
> > > > > .../gcc.target/i386/avx-vzeroupper-15.c | 2 +-
> > > > > gcc/testsuite/gcc.target/i386/pr100865-10b.c | 1 +
> > > > > gcc/testsuite/gcc.target/i386/pr100865-11b.c | 2 +-
> > > > > gcc/testsuite/gcc.target/i386/pr100865-12b.c | 2 +-
> > > > > gcc/testsuite/gcc.target/i386/pr100865-4b.c | 2 ++
> > > > > gcc/testsuite/gcc.target/i386/pr100865-6b.c | 5 ++++-
> > > > > gcc/testsuite/gcc.target/i386/pr100865-7b.c | 5 ++++-
> > > > > gcc/testsuite/gcc.target/i386/pr100865-8b.c | 2 +-
> > > > > gcc/testsuite/gcc.target/i386/pr100865-9b.c | 2 +-
> > > > > gcc/testsuite/gcc.target/i386/pr82941-1.c | 3 ++-
> > > > > gcc/testsuite/gcc.target/i386/pr82942-1.c | 3 ++-
> > > > > gcc/testsuite/gcc.target/i386/pr82990-1.c | 3 ++-
> > > > > gcc/testsuite/gcc.target/i386/pr82990-3.c | 3 ++-
> > > > > gcc/testsuite/gcc.target/i386/pr82990-5.c | 3 ++-
> > > > > 16 files changed, 42 insertions(+), 16 deletions(-)
> > > > >
> > > > > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> > > > > index 842eb0e6786..ec0690876b7 100644
> > > > > --- a/gcc/config/i386/i386.c
> > > > > +++ b/gcc/config/i386/i386.c
> > > > > @@ -23335,9 +23335,21 @@ rtx
> > > > > ix86_gen_scratch_sse_rtx (machine_mode mode)
> > > > > {
> > > > > if (TARGET_SSE && !lra_in_progress)
> > > > > - return gen_rtx_REG (mode, (TARGET_64BIT
> > > > > - ? LAST_REX_SSE_REG
> > > > > - : LAST_SSE_REG));
> > > > > + {
> > > > > + unsigned int regno;
> > > > > + if (TARGET_64BIT)
> > > > > + {
> > > > > + /* In 64-bit mode, use XMM31 to avoid vzeroupper and always
> > > > > + use XMM31 for CSE. */
> > > > > + if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
> > > > > + regno = LAST_EXT_REX_SSE_REG;
> > > > > + else
> > > > > + regno = LAST_REX_SSE_REG;
> > > > > + }
> > > > > + else
> > > > > + regno = LAST_SSE_REG;
> > > >
> > > > Assuming that ix86_hard_regno_mode_ok always returns false for XMM31
> > > > in 64bit mode, we can do:
> > > >
> > > > /* Use XMM31 if available to avoid vzeroupper. */
> > > > if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
>
> It doesn't work for -m32 since ix86_hard_regno_mode_ok doesn't check
> for TARGET_64BIT. LAST_EXST_REX_SSE_REG is used for -m32:
I will check in my original patch as is.
Thanks.
> $ /export/build/gnu/tools-build/gcc-gitlab-debug/build-x86_64-linux/gcc/xgcc
> -B/export/build/gnu/tools-build/gcc-gitlab-debug/build-x86_64-linux/gcc/
> /export/gnu/import/git/gitlab/x86-gcc/gcc/testsuite/gcc.target/i386/pr82941-1.c
> -m32 -fdiagnostics-plain-output -O2 -march=skylake-avx512
> -ffat-lto-objects -fno-ident -S -o pr82941-1.s
> xgcc: internal compiler error: Segmentation fault signal terminated program cc1
> Please submit a full bug report,
> with preprocessed source if appropriate.
> See <https://gcc.gnu.org/bugs/> for instructions.
> $
>
> Program received signal SIGSEGV, Segmentation fault.
> 0x0000000001201c64 in general_operand (
> op=<error reading variable: Cannot access memory at address
> 0x7ffffbffeff8>, mode=<error reading variable: Cannot access memory at
> address 0x7ffffbffeff4>)
> at /export/gnu/import/git/gitlab/x86-gcc/gcc/recog.c:1412
> 1412 {
> (gdb) bt
> #0 0x0000000001201c64 in general_operand (
> op=<error reading variable: Cannot access memory at address
> 0x7ffffbffeff8>, mode=<error reading variable: Cannot access memory at
> address 0x7ffffbffeff4>)
> at /export/gnu/import/git/gitlab/x86-gcc/gcc/recog.c:1412
> #1 0x000000000120221e in register_operand (op=0x7ffff5c10510, mode=E_V8DFmode)
> at /export/gnu/import/git/gitlab/x86-gcc/gcc/recog.c:1559
> #2 0x00000000018fcfdb in ix86_expand_vector_move (mode=E_V8DFmode,
> operands=0x7ffffbfff190)
> at /export/gnu/import/git/gitlab/x86-gcc/gcc/config/i386/i386-expand.c:625
> #3 0x0000000001ef9bc2 in gen_movv8df (operand0=0x7ffff5c10510,
> operand1=0x7ffff6351d98)
> at /export/gnu/import/git/gitlab/x86-gcc/gcc/config/i386/sse.md:1051
> #4 0x0000000000de6cfb in insn_gen_fn::operator()<rtx_def*, rtx_def*> (
> this=0x2d88908 <insn_data+278376>)
> at /export/gnu/import/git/gitlab/x86-gcc/gcc/recog.h:407
> #5 0x0000000000dbe4ec in emit_move_insn_1 (x=0x7ffff5c10510, y=0x7ffff6351d98)
> at /export/gnu/import/git/gitlab/x86-gcc/gcc/expr.c:3930
> #6 0x0000000000dbefde in emit_move_insn (x=0x7ffff5c10510, y=0x7ffff6351d98)
> at /export/gnu/import/git/gitlab/x86-gcc/gcc/expr.c:4100
> #7 0x00000000018fd036 in ix86_expand_vector_move (mode=E_V8DFmode,
> operands=0x7ffffbfff420)
> at /export/gnu/import/git/gitlab/x86-gcc/gcc/config/i386/i386-expand.c:629
> #8 0x0000000001ef9bc2 in gen_movv8df (operand0=0x7ffff5c104e0,
>
> > > > regno = LAST_EXST_REX_SSE_REG;
> > > > else if (TARGET_64BIT)
> > > > regno = LAST_EXT_REX_SSE_REG;
> >
> > > why? w/o avx512 xmm31 is not available.
> >
> > Oh, a typo, this should read LAST_REX_SSE_REG.
> >
> > Uros.
>
>
>
> --
> H.J.
--
H.J.
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-08-03 13:13 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-08-02 17:47 [PATCH] x86: Use XMM31 for scratch SSE register H.J. Lu
2021-08-03 1:38 ` Hongtao Liu
2021-08-03 8:02 ` Uros Bizjak
2021-08-03 8:15 ` Hongtao Liu
2021-08-03 8:43 ` Uros Bizjak
2021-08-03 12:10 ` H.J. Lu
2021-08-03 13:13 ` H.J. Lu
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