From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 84874 invoked by alias); 1 May 2017 11:18:44 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 84637 invoked by uid 89); 1 May 2017 11:18:43 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.5 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=stub, recommend, offer X-HELO: mail-vk0-f66.google.com Received: from mail-vk0-f66.google.com (HELO mail-vk0-f66.google.com) (209.85.213.66) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 01 May 2017 11:18:41 +0000 Received: by mail-vk0-f66.google.com with SMTP id m78so2865626vkf.0 for ; Mon, 01 May 2017 04:18:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=AS4Qnb31k6cA2DGrJTdywzlArX3O5qJJ8EO9P4Ld9KU=; b=DqhG6w6hwgaW5Pd/jcMUm5RD2kbTgUsWd/uw1qiUxbu7tCO1OJncHB66z5aBovxUUe lbZRymI/YdwUAJX6ud7hu3/w5hQ1h6NXHhPgBWE+eY3kFzlk4pIlkgIu6NbCaTT868HB tY8KQ77JfsDSF8Irz6Q+1Es3Yggo84OwI/0TvV34C2NXJZVrIxGGkMibqsKo0cCu/Zk/ TJX/X9mSTdfnIrsJUfqFkW/SAQJCZA7jaF7PU+VwQXo2UbP0XIg+8nWhFNtLg5InpeEM XxzJZAWzHmJXn082D1awgPOU8H5HKdb+2HKabhJxWhcGYBFG3avu2HSimMmvC1yaVY5V 5JsA== X-Gm-Message-State: AN3rC/7RkCKQUQGNyjOMKRi1Y+ugHpWIXLJ9uGNkrplDe2ZiVOOqYKQB yStfG5SwZQk/8q3ktGK4r70wOClGFg== X-Received: by 10.31.2.71 with SMTP id 68mr11438050vkc.113.1493637522320; Mon, 01 May 2017 04:18:42 -0700 (PDT) MIME-Version: 1.0 Received: by 10.103.49.206 with HTTP; Mon, 1 May 2017 04:18:41 -0700 (PDT) In-Reply-To: <20170427080932.11703-9-daniel.santos@pobox.com> References: <49e81c0b-07a4-22df-d7c3-2439177ac7cf@pobox.com> <20170427080932.11703-9-daniel.santos@pobox.com> From: Uros Bizjak Date: Mon, 01 May 2017 11:18:00 -0000 Message-ID: Subject: Re: [PATCH 09/12] [i386] Add patterns and predicates foutline-msabi-xlouges To: Daniel Santos Cc: gcc-patches , Jan Hubicka Content-Type: text/plain; charset=UTF-8 X-SW-Source: 2017-05/txt/msg00008.txt.bz2 On Thu, Apr 27, 2017 at 10:09 AM, Daniel Santos wrote: > Adds the predicates save_multiple and restore_multiple to predicates.md, > which are used by following patterns in sse.md: > > * save_multiple - insn that calls a save stub > * restore_multiple - call_insn that calls a save stub and returns to the > function to allow a sibling call (which should typically offer better > optimization than the restore stub as the tail call) > * restore_multiple_and_return - a jump_insn that returns from the > function as a tail-call. > * restore_multiple_leave_return - like the above, but restores the frame > pointer before returning. > > Signed-off-by: Daniel Santos > --- > gcc/config/i386/predicates.md | 155 ++++++++++++++++++++++++++++++++++++++++++ > gcc/config/i386/sse.md | 37 ++++++++++ > 2 files changed, 192 insertions(+) > > diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md > index 8f250a2e720..36fe8abc3f4 100644 > --- a/gcc/config/i386/predicates.md > +++ b/gcc/config/i386/predicates.md > @@ -1657,3 +1657,158 @@ > (ior (match_operand 0 "register_operand") > (and (match_code "const_int") > (match_test "op == constm1_rtx")))) > + > +;; Return true if: > +;; 1. first op is a symbol reference, > +;; 2. >= 13 operands, and > +;; 3. operands 2 to end is one of: > +;; a. save a register to a memory location, or > +;; b. restore stack pointer. > +(define_predicate "save_multiple" > + (match_code "parallel") > +{ > + const unsigned nregs = XVECLEN (op, 0); > + rtx head = XVECEXP (op, 0, 0); > + unsigned i; > + > + if (GET_CODE (head) != USE) > + return false; > + else > + { > + rtx op0 = XEXP (head, 0); > + if (op0 == NULL_RTX || GET_CODE (op0) != SYMBOL_REF) > + return false; > + } > + > + if (nregs < 13) > + return false; > + > + for (i = 2; i < nregs; i++) > + { > + rtx e, src, dest; > + > + e = XVECEXP (op, 0, i); > + > + switch (GET_CODE (e)) > + { > + case SET: > + src = SET_SRC (e); > + dest = SET_DEST (e); > + > + /* storing a register to memory. */ > + if (GET_CODE (src) == REG && GET_CODE (dest) == MEM) Please use REG_P (...) and MEM_P (...) - and possible others - predicates in the code. > + { > + rtx addr = XEXP (dest, 0); > + > + /* Good if dest address is in RAX. */ > + if (GET_CODE (addr) == REG > + && REGNO (addr) == AX_REG) > + continue; > + > + /* Good if dest address is offset of RAX. */ > + if (GET_CODE (addr) == PLUS > + && GET_CODE (XEXP (addr, 0)) == REG > + && REGNO (XEXP (addr, 0)) == AX_REG) > + continue; > + } > + break; > + > + default: > + break; > + } > + return false; > + } > + return true; > +}) > + > +;; Return true if: > +;; * first op is (return) or a a use (symbol reference), > +;; * >= 14 operands, and > +;; * operands 2 to end are one of: > +;; - restoring a register from a memory location that's an offset of RSI. > +;; - clobbering a reg > +;; - adjusting SP > +(define_predicate "restore_multiple" > + (match_code "parallel") > +{ > + const unsigned nregs = XVECLEN (op, 0); > + rtx head = XVECEXP (op, 0, 0); > + unsigned i; > + > + switch (GET_CODE (head)) > + { > + case RETURN: > + i = 3; > + break; > + > + case USE: > + { > + rtx op0 = XEXP (head, 0); > + > + if (op0 == NULL_RTX || GET_CODE (op0) != SYMBOL_REF) > + return false; > + > + i = 1; > + break; > + } > + > + default: > + return false; > + } > + > + if (nregs < i + 12) > + return false; > + > + for (; i < nregs; i++) > + { > + rtx e, src, dest; > + > + e = XVECEXP (op, 0, i); > + > + switch (GET_CODE (e)) > + { > + case CLOBBER: > + continue; I don't see where CLOBBER is genreated in ix86_emit_outlined_ms2sysv_restore. > + > + case SET: > + src = SET_SRC (e); > + dest = SET_DEST (e); > + > + /* Restoring a register from memory. */ > + if (GET_CODE (src) == MEM && GET_CODE (dest) == REG) > + { > + rtx addr = XEXP (src, 0); > + > + /* Good if src address is in RSI. */ > + if (GET_CODE (addr) == REG > + && REGNO (addr) == SI_REG) > + continue; > + > + /* Good if src address is offset of RSI. */ > + if (GET_CODE (addr) == PLUS > + && GET_CODE (XEXP (addr, 0)) == REG > + && REGNO (XEXP (addr, 0)) == SI_REG) > + continue; > + > + /* Good if adjusting stack pointer. */ > + if (GET_CODE (dest) == REG > + && REGNO (dest) == SP_REG > + && GET_CODE (src) == PLUS > + && GET_CODE (XEXP (src, 0)) == REG > + && REGNO (XEXP (src, 0)) == SP_REG) > + continue; > + } > + > + /* Restoring stack pointer from another register. */ > + if (GET_CODE (dest) == REG && REGNO (dest) == SP_REG > + && GET_CODE (src) == REG) > + continue; > + break; > + > + default: > + break; > + } > + return false; > + } > + return true; > +}) I think that the above functions should check only if the function is storing/restoring correct registers, all other RTXes should be explicitly written in the insn patterns. > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > index e8ccb1e10c3..c9fe7274def 100644 > --- a/gcc/config/i386/sse.md > +++ b/gcc/config/i386/sse.md > @@ -19997,3 +19997,40 @@ > (match_operand:VI48_512 1 "nonimmediate_operand" "vm")))] > "TARGET_AVX512VPOPCNTDQ" > "vpopcnt\t{%1, %0|%0, %1}") > + > +;; Save multiple registers out-of-line. > +(define_insn "save_multiple" > + [(match_parallel 0 "save_multiple" > + [(use (match_operand:P 1 "symbol_operand")) > + (const_int 0) > + ])] > + "TARGET_SSE && TARGET_64BIT" > + "call\t%P1") You probably don't need a (const_int 0) tag. According to the documentation, RTX matching guarantees subexpression match, so in the predicate you should check only stores of registers (as suggested above). > +;; Restore multiple registers out-of-line. > +(define_insn "restore_multiple" > + [(match_parallel 0 "restore_multiple" > + [(use (match_operand:P 1 "symbol_operand"))])] > + "TARGET_SSE && TARGET_64BIT" > + "call\t%P1") > + > +;; Restore multiple registers out-of-line and return. > +(define_insn "restore_multiple_and_return" > + [(match_parallel 0 "restore_multiple" > + [(return) > + (use (match_operand:P 1 "symbol_operand")) > + (const_int 0) > + ])] > + "TARGET_SSE && TARGET_64BIT" > + "jmp\t%P1") No need for (const_int 0) tag. > +;; Restore multiple registers out-of-line when hard frame pointer is used, > +;; perform the leave operation prior to returning (from the function). > +(define_insn "restore_multiple_leave_return" > + [(match_parallel 0 "restore_multiple" > + [(return) > + (use (match_operand:P 1 "symbol_operand")) > + (const_int 1) > + ])] > + "TARGET_SSE && TARGET_64BIT" > + "jmp\t%P1") You will have to write out all sub-RTXes of the "leave" pattern, including clobber. I'd recommend that in the predicate, you check match_parallel from the bottom up, since subexpressions on the top are already matched, and you can have different number of subexpressions at the top. Uros.