[PATCH, i386]: fix PR 66922, wrong code for bit-field struct

[PATCH, i386]: fix PR 66922, wrong code for bit-field struct

[Uros Bizjak]

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We have to reject misaligned insertions and extractions from
ix86_expand_pextr and  ix86_expand_pinsr.

2015-07-18  Uros Bizjak  <ubizjak@gmail.com>

    PR target/66922
    * config/i386/i386.c (ix86_expand_pextr): Reject extractions
    from misaligned positions.
    (ix86_expand_pinsr): Reject insertions to misaligned positions.

testsuite/ChangeLog:

2015-07-18  Uros Bizjak  <ubizjak@gmail.com>

    PR target/66922
    * gcc.target/i386/pr66922.c: New test.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline SVN and release branches.

Uros.

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Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c	(revision 225979)
+++ config/i386/i386.c	(working copy)
@@ -50591,6 +50591,10 @@ ix86_expand_pextr (rtx *operands)
 	    return false;
 	  }
 
+	/* Reject extractions from misaligned positions.  */
+	if (pos & (size-1))
+	  return false;
+
 	if (GET_MODE (dst) == dstmode)
 	  d = dst;
 	else
@@ -50687,6 +50691,10 @@ ix86_expand_pinsr (rtx *operands)
 	    return false;
 	  }
 
+	/* Reject insertions to misaligned positions.  */
+	if (pos & (size-1))
+	  return false;
+
 	if (GET_CODE (src) == SUBREG)
 	  {
 	    unsigned int srcpos = SUBREG_BYTE (src);
Index: testsuite/gcc.target/i386/pr66922.c
===================================================================
--- testsuite/gcc.target/i386/pr66922.c	(revision 0)
+++ testsuite/gcc.target/i386/pr66922.c	(working copy)
@@ -0,0 +1,23 @@
+/* { dg-do run } */
+/* { dg-options "-O1 -msse2" } */
+/* { dg-require-effective-target sse2 } */
+
+#include "sse2-check.h"
+
+struct S 
+{
+  int:31;
+  int:2;
+  int f0:16;
+  int f1;
+  int f2;
+};
+
+static void 
+sse2_test (void)
+{
+  struct S a = { 1, 0, 0 };
+
+  if (a.f0 != 1)
+    __builtin_abort(); 
+}