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From: Uros Bizjak <ubizjak@gmail.com>
To: Jakub Jelinek <jakub@redhat.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH] Don't error about x86 return value in SSE reg (or x86 reg) or argument in SSE reg too early (PR target/80298)
Date: Wed, 05 Apr 2017 15:37:00 -0000	[thread overview]
Message-ID: <CAFULd4ayz36aRg1kxgiLhXTYj95+COJS_xXNqHyByhaYs6_sbg@mail.gmail.com> (raw)
In-Reply-To: <20170405082915.GP17461@tucnak>

On Wed, Apr 5, 2017 at 10:29 AM, Jakub Jelinek <jakub@redhat.com> wrote:
> On Wed, Apr 05, 2017 at 10:26:47AM +0200, Uros Bizjak wrote:
>> On Wed, Apr 5, 2017 at 10:20 AM, Jakub Jelinek <jakub@redhat.com> wrote:
>> > On Wed, Apr 05, 2017 at 10:12:02AM +0200, Uros Bizjak wrote:
>> >> Oh, I forgot to point out that on x86_64 ABI specifies MMX values in
>> >> SSE registers.
>> >
>> > I know it does.  And if people have their own function that returns
>> > __m64 or takes such arguments, they surely have to.
>> > The question is only about the case when no function (in the assembly)
>> > returns in SSE registers nor gets arguments in them, when all the
>> > MMX code is inside of a function.
>> > With your patch, it is - the MMX intrinsics are functions and we error on
>> > them even when they are inlined.
>> > With my patch we count only the non-inlined functions, something we emit
>> > assembly for or call them from other TUs.
>> >
>> > If you think requiring SSE for MMX always in 64-bit code is fine, even
>> > when not strictly needed (as in, you really don't need SSE ISA to execute
>> > such code, although there are no CPUs without that HW), so be it, then
>> > let's go with your patch.
>>
>> Yes, I think that we should consistently warn even in case intrinsic
>> is inlined. I'm afraid that otherwise we will have endless stream of
>> bugreports that something warns with -O0, but not -O1+, when LTO is
>> used, etc, etc... The rule is: When user uses (or intends to use) MMX
>> value (that goes in SSE reg on x86_64), -msse is needed on x86_64,
>> otherwise warning is emitted.
>
> Well, error.  Anyway, if so, then please commit your patch.

Committed with the following ChangeLog:

2017-04-05  Uros Bizjak  <ubizjak@gmail.com>

    PR target/80298
    * config/i386/mmintrin.h: Add -msse target option when __SSE__ is
    not defined for x86_64 target.  Add -mmmx target option when __SSE2__
    is not defined.
    * config/i386/mm3dnow.h: Add -msse target when __SSE__ is not defined
    for x86_64 target.  Handle -m3dnowa option.

I choose not to include testcases, since mm_malloc includes stdlib.h,
which uses SSE register return with -O2, resulting in:

In file included from /usr/include/stdlib.h:921:0,
                 from /ssd/uros/gcc-build/gcc/include/mm_malloc.h:27,
                 from /ssd/uros/gcc-build/gcc/include/xmmintrin.h:34,
                 from /ssd/uros/gcc-build/gcc/include/x86intrin.h:33,
                 from
/home/uros/gcc-svn/trunk/gcc/testsuite/gcc.target/i386/pr80298-2.c:5:
/usr/include/bits/stdlib-float.h: In function 'atof':
/usr/include/bits/stdlib-float.h:27:1: error: SSE register return with
SSE disabled
compiler exited with status 1

This issue is out of scope of the compiler.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline SVN.

Uros.

  reply	other threads:[~2017-04-05 15:37 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-04 19:24 Jakub Jelinek
2017-04-05  7:42 ` Uros Bizjak
2017-04-05  8:00   ` Jakub Jelinek
2017-04-05  8:12     ` Uros Bizjak
2017-04-05  8:20       ` Jakub Jelinek
2017-04-05  8:26         ` Uros Bizjak
2017-04-05  8:29           ` Jakub Jelinek
2017-04-05 15:37             ` Uros Bizjak [this message]
2017-04-06 18:37               ` Uros Bizjak

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