From: Uros Bizjak <ubizjak@gmail.com>
To: "H.J. Lu" <hjl.tools@gmail.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH 08/43] i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE
Date: Sun, 10 Feb 2019 20:49:00 -0000 [thread overview]
Message-ID: <CAFULd4b29nH+jK2kji-bQCo0t-dT7UQ-2U8VFQ4hKP8urbt_Vg@mail.gmail.com> (raw)
In-Reply-To: <CAMe9rOp1M5NDaQdAZJ5+T3kb2sbxaOWR2rNfSWOvTRoX=C8u4A@mail.gmail.com>
On Sun, Feb 10, 2019 at 9:38 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> On Sun, Feb 10, 2019 at 2:26 AM Uros Bizjak <ubizjak@gmail.com> wrote:
> >
> > On 2/10/19, H.J. Lu <hjl.tools@gmail.com> wrote:
> > > Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE. Only SSE register
> > > source operand is allowed.
> > >
> > > PR target/89021
> > > * config/i386/mmx.md (mmx_ashr<mode>3): Disallow with
> > > TARGET_MMX_WITH_SSE.
> > > (mmx_<shift_insn><mode>3): Likewise.
> > > (ashr<mode>3): New.
> > > (<shift_insn><mode>3): Likewise.
> >
> > Please merge patterns use mmx_isa attribute.
>
> Currently, MMX pattern names have a "mmx_" prefix. For SSE emulation, we
> don't want such a prefix so that the middle-end can detect and use them. If we
> remove the "mmx_" prefix from MMX pattern names, won't the middle-end
> generate MMX instructions in this case? It it safe to do so?
I meant to create a merged "*ashr<mode>3" pattern, and introduce
ashr<mode>3 expander. The intention from maintainability point of view
is for instruction patterns to follow an unified approach as much as
possible, and minimise deviations between patterns of the same family.
Uros.
>
>
> > Uros.
> >
> > > ---
> > > gcc/config/i386/mmx.md | 38 ++++++++++++++++++++++++++++++++++++--
> > > 1 file changed, 36 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
> > > index 2024c75fa78..9e07bf31f81 100644
> > > --- a/gcc/config/i386/mmx.md
> > > +++ b/gcc/config/i386/mmx.md
> > > @@ -995,7 +995,7 @@
> > > (ashiftrt:MMXMODE24
> > > (match_operand:MMXMODE24 1 "register_operand" "0")
> > > (match_operand:DI 2 "nonmemory_operand" "yN")))]
> > > - "TARGET_MMX"
> > > + "TARGET_MMX && !TARGET_MMX_WITH_SSE"
> > > "psra<mmxvecsize>\t{%2, %0|%0, %2}"
> > > [(set_attr "type" "mmxshft")
> > > (set (attr "length_immediate")
> > > @@ -1009,7 +1009,7 @@
> > > (any_lshift:MMXMODE248
> > > (match_operand:MMXMODE248 1 "register_operand" "0")
> > > (match_operand:DI 2 "nonmemory_operand" "yN")))]
> > > - "TARGET_MMX"
> > > + "TARGET_MMX && !TARGET_MMX_WITH_SSE"
> > > "p<vshift><mmxvecsize>\t{%2, %0|%0, %2}"
> > > [(set_attr "type" "mmxshft")
> > > (set (attr "length_immediate")
> > > @@ -1018,6 +1018,40 @@
> > > (const_string "0")))
> > > (set_attr "mode" "DI")])
> > >
> > > +(define_insn "ashr<mode>3"
> > > + [(set (match_operand:MMXMODE24 0 "register_operand" "=x,Yv")
> > > + (ashiftrt:MMXMODE24
> > > + (match_operand:MMXMODE24 1 "register_operand" "0,Yv")
> > > + (match_operand:DI 2 "nonmemory_operand" "xN,YvN")))]
> > > + "TARGET_MMX_WITH_SSE"
> > > + "@
> > > + psra<mmxvecsize>\t{%2, %0|%0, %2}
> > > + vpsra<mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
> > > + [(set_attr "isa" "noavx,avx")
> > > + (set_attr "type" "sseishft,sseishft")
> > > + (set (attr "length_immediate")
> > > + (if_then_else (match_operand 2 "const_int_operand")
> > > + (const_string "1")
> > > + (const_string "0")))
> > > + (set_attr "mode" "TI")])
> > > +
> > > +(define_insn "<shift_insn><mode>3"
> > > + [(set (match_operand:MMXMODE248 0 "register_operand" "=x,Yv")
> > > + (any_lshift:MMXMODE248
> > > + (match_operand:MMXMODE248 1 "register_operand" "0,Yv")
> > > + (match_operand:DI 2 "nonmemory_operand" "xN,YvN")))]
> > > + "TARGET_MMX_WITH_SSE"
> > > + "@
> > > + p<vshift><mmxvecsize>\t{%2, %0|%0, %2}
> > > + vp<vshift><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
> > > + [(set_attr "isa" "noavx,avx")
> > > + (set_attr "type" "sseishft,sseishft")
> > > + (set (attr "length_immediate")
> > > + (if_then_else (match_operand 2 "const_int_operand")
> > > + (const_string "1")
> > > + (const_string "0")))
> > > + (set_attr "mode" "TI")])
> > > +
> > > ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
> > > ;;
> > > ;; Parallel integral comparisons
> > > --
> > > 2.20.1
> > >
> > >
>
>
>
> --
> H.J.
next prev parent reply other threads:[~2019-02-10 20:49 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-10 0:19 [PATCH 00/43] V3: Emulate MMX intrinsics " H.J. Lu
2019-02-10 0:19 ` [PATCH 04/43] i386: Emulate MMX plusminus/sat_plusminus " H.J. Lu
2019-02-10 10:12 ` Uros Bizjak
2019-02-10 0:19 ` [PATCH 03/43] i386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX H.J. Lu
2019-02-10 10:07 ` Uros Bizjak
2019-02-10 0:19 ` [PATCH 05/43] i386: Emulate MMX mulv4hi3 with SSE H.J. Lu
2019-02-10 0:19 ` [PATCH 02/43] i386: Emulate MMX packsswb/packssdw/packuswb with SSE2 H.J. Lu
2019-02-10 9:56 ` Uros Bizjak
2019-02-10 10:04 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 11/43] i386: Emulate MMX mmx_eq/mmx_gt<mode>3 with SSE H.J. Lu
2019-02-10 10:33 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 15/43] i386: Emulate MMX sse_cvtpi2ps " H.J. Lu
2019-02-10 10:56 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 34/43] i386: Emulate MMX abs<mode>2 " H.J. Lu
2019-02-10 12:32 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 01/43] i386: Allow 64-bit vector modes in SSE registers H.J. Lu
2019-02-10 9:43 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 13/43] i386: Emulate MMX pshufw with SSE H.J. Lu
2019-02-10 11:16 ` Uros Bizjak
2019-02-11 18:09 ` H.J. Lu
2019-02-11 19:36 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 28/43] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 " H.J. Lu
2019-02-10 12:24 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 10/43] i386: Emulate MMX mmx_andnot<mode>3 " H.J. Lu
2019-02-10 0:20 ` [PATCH 14/43] i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi " H.J. Lu
2019-02-10 10:48 ` Uros Bizjak
2019-02-11 19:08 ` H.J. Lu
2019-02-11 19:52 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 27/43] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 " H.J. Lu
2019-02-10 12:23 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 20/43] i386: Emulate MMX mmx_umulv4hi3_highpart " H.J. Lu
2019-02-10 12:12 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 35/43] i386: Allow MMXMODE moves with TARGET_MMX_WITH_SSE H.J. Lu
2019-02-10 12:34 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 42/43] i386: Implement V2SF <-> V2SI conversions with SSE H.J. Lu
2019-02-10 0:20 ` [PATCH 36/43] i386: Allow MMX vector expanders with TARGET_MMX_WITH_SSE H.J. Lu
2019-02-10 0:20 ` [PATCH 33/43] i386: Emulate MMX ssse3_palignrdi with SSE H.J. Lu
2019-02-10 0:20 ` [PATCH 06/43] i386: Emulate MMX smulv4hi3_highpart " H.J. Lu
2019-02-10 10:18 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 43/43] i386: Implement V2SF comparisons " H.J. Lu
2019-02-10 0:20 ` [PATCH 08/43] i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 " H.J. Lu
2019-02-10 10:26 ` Uros Bizjak
2019-02-10 20:38 ` H.J. Lu
2019-02-10 20:49 ` Uros Bizjak [this message]
2019-02-10 0:20 ` [PATCH 07/43] i386: Emulate MMX mmx_pmaddwd " H.J. Lu
2019-02-10 10:21 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 19/43] i386: Emulate MMX mmx_pmovmskb " H.J. Lu
2019-02-10 12:11 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 12/43] i386: Emulate MMX vec_dupv2si " H.J. Lu
2019-02-10 10:36 ` Uros Bizjak
2019-02-10 21:01 ` H.J. Lu
2019-02-10 21:46 ` Uros Bizjak
2019-02-10 21:49 ` Uros Bizjak
2019-02-11 1:04 ` H.J. Lu
2019-02-11 7:25 ` Uros Bizjak
2019-02-11 12:27 ` H.J. Lu
2019-02-11 12:51 ` Uros Bizjak
2019-02-11 13:12 ` H.J. Lu
2019-02-10 0:20 ` [PATCH 18/43] i386: Emulate MMX V4HI smaxmin/V8QI umaxmin " H.J. Lu
2019-02-10 11:36 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 09/43] i386: Emulate MMX <any_logic><mode>3 " H.J. Lu
2019-02-10 0:23 ` [PATCH 24/43] i386: Emulate MMX mmx_psadbw " H.J. Lu
2019-02-10 0:23 ` [PATCH 41/43] i386: Implement V2SF add/sub/mul " H.J. Lu
2019-02-10 12:42 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 17/43] i386: Emulate MMX mmx_pinsrw " H.J. Lu
2019-02-10 11:44 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 25/43] i386: Emulate MMX movntq with SSE2 movntidi H.J. Lu
2019-02-10 0:23 ` [PATCH 32/43] i386: Emulate MMX ssse3_psign<mode>3 with SSE H.J. Lu
2019-02-10 12:29 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 21/43] i386: Emulate MMX maskmovq with SSE2 maskmovdqu H.J. Lu
2019-02-10 0:23 ` [PATCH 29/43] i386: Emulate MMX ssse3_pmaddubsw with SSE H.J. Lu
2019-02-10 12:26 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 16/43] i386: Emulate MMX mmx_pextrw " H.J. Lu
2019-02-10 11:20 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 40/43] i386: Enable 8-byte vectorizer for TARGET_MMX_WITH_SSE H.J. Lu
2019-02-10 0:23 ` [PATCH 23/43] i386: Emulate MMX mmx_uavgv4hi3 with SSE H.J. Lu
2019-02-10 0:23 ` [PATCH 26/43] i386: Emulate MMX umulv1siv1di3 with SSE2 H.J. Lu
2019-02-10 12:17 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 22/43] i386: Emulate MMX mmx_uavgv8qi3 with SSE H.J. Lu
2019-02-10 12:19 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 37/43] i386: Allow MMX intrinsic emulation " H.J. Lu
2019-02-10 0:24 ` [PATCH 38/43] i386: Add tests for MMX intrinsic emulations " H.J. Lu
2019-02-10 0:24 ` [PATCH 31/43] i386: Emulate MMX pshufb with SSE version H.J. Lu
2019-02-10 0:24 ` [PATCH 30/43] i386: Emulate MMX ssse3_pmulhrswv4hi3 with SSE H.J. Lu
2019-02-10 12:27 ` Uros Bizjak
2019-02-10 0:24 ` [PATCH 39/43] i386: Also enable SSSE3 __m64 tests in 64-bit mode H.J. Lu
-- strict thread matches above, loose matches on Subject: below --
2019-02-09 13:24 [PATCH 00/43] V2: Emulate MMX intrinsics with SSE H.J. Lu
2019-02-09 13:23 ` [PATCH 08/43] i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 " H.J. Lu
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