From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [IPv6:2a00:1450:4864:20::530]) by sourceware.org (Postfix) with ESMTPS id D62783858D33 for ; Thu, 9 Nov 2023 09:30:53 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D62783858D33 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org D62783858D33 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::530 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699522255; cv=none; b=MLAc2VD23PtUDXdodtO62wM0v5m9ZB6rAUx8dNa8pajdxI1SIbHXU8FcsDg8xFbzOO4lkGp2vS3/f4l5c8z0xl5oaqRAGCOOZO1rdN0cxqVVQLP1tCk7wM2/3BOhw7HlOVH1AgTN9nVKlJ3HKw9LBVEvi/UUv5nyacXFC0VrMv8= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699522255; c=relaxed/simple; bh=n+T1dYXLcpMORyvR9ICWFqHxsiLU+6YbQkGba+UHcAo=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=bC4kCc94LGgs8UQo53E8IiTO0xly+cwRFiu+0UCOgKNDW5N2H/GnpAXnxoGoWkMx5ExjPL0Az3U1tKeSMXoedkwDBW1ZA0wuuqb9Rf5cPj8+IzuomUwYeMr4+lj6nR9LI9hLoY0SRGL5wJ12qdz4zzd4gy6jnQmnfrpZl4iTDsE= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-ed1-x530.google.com with SMTP id 4fb4d7f45d1cf-53db360294fso985190a12.3 for ; Thu, 09 Nov 2023 01:30:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1699522252; x=1700127052; darn=gcc.gnu.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=EiF5L/3lIl764d0UDDv+po+5ihO0x6oY3xHoIAbp6WQ=; b=UGIA22c/N3P8v/mKg87pXhgMyw+AXd677PkIPbOK/5MgIHdtWAROpbfa83/mYHlCet 5r2FqAF64Egkup44M49js8619x0OBevRVFvvbl1qwa17nFJG85c2fDkbjAiIzS+HtKWC uTUdDG5K3fjQMOYaHDt6jLiGF3/fb0m5IU3KCOBjPc7og71Luo0+1H//SqOh4vAJwNx2 T5rQm1y2INo/fqDq51Oj7j2LH6WEQiE4gVhWnVLcewKdVHgIUqdkdl9loeHY9BptvIZQ hqNNmNZ5UwmAs+hIhrEOoZ4oK8bfIpfx5n6MqrWZuS1HI+ymW3yfH098sjoAuygASxUf L+ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699522252; x=1700127052; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EiF5L/3lIl764d0UDDv+po+5ihO0x6oY3xHoIAbp6WQ=; b=jzQZlJDwDnFaVyVkMtX4cOMYgeI0gTOWABFmLtCoMJaRSyhh/SgZxOgZMokwABL/mz S1UHKateA0xahQ/ZWydtPOj1S9Fc15air0lV1f/dncmtr/pXAXs2CeuB+UsipauGosgt B3rdwjEgoN9k+UyhXlWzo07fOQmcYLM5g7HylAbLK5yTca9mq3MJuJXgECcaciak6F4Q cjBFbQdlfHJzViF17ljaHubKejGU8SEcUN5UJQa50ppzl8gC7XWhVD7kURkdpWT1Nvz0 xtmWQRpmE7JKUYq3LfDAMgLS7LEaba5TkjlN0iC328mPzrh2WyMxHkmtlmJlmzW7G2oo B9uA== X-Gm-Message-State: AOJu0YzhbUrHVmLIEuUSVxEWAXA6dJC+Qems10Lk1QD2gLWZBxKx0leF FFfgMOpRF4+GEgBDGqd2gj4i3I9PBw/lUZ87QXQ= X-Google-Smtp-Source: AGHT+IE68Xly8TukUnW0n4G2dMoPWNuOtYbSYZ9E0esedtT9tuicfK681gRDhV0xrHE+/x596+UJaqJsJuh+J2S7JVQ= X-Received: by 2002:a50:cccb:0:b0:543:6cfa:3acb with SMTP id b11-20020a50cccb000000b005436cfa3acbmr2283188edj.19.1699522252333; Thu, 09 Nov 2023 01:30:52 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Uros Bizjak Date: Thu, 9 Nov 2023 10:30:41 +0100 Message-ID: Subject: Re: [PATCH v2] i386 PIE: accept @GOTOFF in load/store multi base address To: Alexandre Oliva Cc: gcc-patches@gcc.gnu.org, Rainer Orth , Mike Stump , Jan Hubicka Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE,WEIRD_QUOTING autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, Nov 8, 2023 at 5:37=E2=80=AFPM Alexandre Oliva = wrote: > > Ping? > https://gcc.gnu.org/pipermail/gcc-patches/2022-July/598872.html > > Looking at the code generated for sse2-{load,store}-multi.c with PIE, > I realized we could use UNSPEC_GOTOFF as a base address, and that this > would enable the test to use the vector insns expected by the tests > even with PIC, so I extended the base + offset logic used by the SSE2 > multi-load/store peepholes to accept reg + symbolic base + offset too, > so that the test generated the expected insns even with PIE. > > Regstrapped on x86_64-linux-gnu, also tested with gcc-13 on i686- and > x86_64-. Ok to install? > > > for gcc/ChangeLog > > * config/i386/i386.cc (symbolic_base_address_p, > base_address_p): New, factored out from... > (extract_base_offset_in_addr): ... here and extended to > recognize REG+GOTOFF, as in gcc.target/i386/sse2-load-multi.c > and sse2-store-multi.c with PIE enabled by default. LGTM. Thanks, Uros. > --- > gcc/config/i386/i386.cc | 89 ++++++++++++++++++++++++++++++++++++++++-= ------ > 1 file changed, 75 insertions(+), 14 deletions(-) > > diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc > index c2bd07fced7b1..eec9b42396e0a 100644 > --- a/gcc/config/i386/i386.cc > +++ b/gcc/config/i386/i386.cc > @@ -25198,11 +25198,40 @@ ix86_reloc_rw_mask (void) > } > #endif > > -/* If MEM is in the form of [base+offset], extract the two parts > - of address and set to BASE and OFFSET, otherwise return false. */ > +/* Return true iff ADDR can be used as a symbolic base address. */ > > static bool > -extract_base_offset_in_addr (rtx mem, rtx *base, rtx *offset) > +symbolic_base_address_p (rtx addr) > +{ > + if (GET_CODE (addr) =3D=3D SYMBOL_REF) > + return true; > + > + if (GET_CODE (addr) =3D=3D UNSPEC && XINT (addr, 1) =3D=3D UNSPEC_GOTO= FF) > + return true; > + > + return false; > +} > + > +/* Return true iff ADDR can be used as a base address. */ > + > +static bool > +base_address_p (rtx addr) > +{ > + if (REG_P (addr)) > + return true; > + > + if (symbolic_base_address_p (addr)) > + return true; > + > + return false; > +} > + > +/* If MEM is in the form of [(base+symbase)+offset], extract the three > + parts of address and set to BASE, SYMBASE and OFFSET, otherwise > + return false. */ > + > +static bool > +extract_base_offset_in_addr (rtx mem, rtx *base, rtx *symbase, rtx *offs= et) > { > rtx addr; > > @@ -25213,21 +25242,52 @@ extract_base_offset_in_addr (rtx mem, rtx *base= , rtx *offset) > if (GET_CODE (addr) =3D=3D CONST) > addr =3D XEXP (addr, 0); > > - if (REG_P (addr) || GET_CODE (addr) =3D=3D SYMBOL_REF) > + if (base_address_p (addr)) > { > *base =3D addr; > + *symbase =3D const0_rtx; > *offset =3D const0_rtx; > return true; > } > > if (GET_CODE (addr) =3D=3D PLUS > - && (REG_P (XEXP (addr, 0)) > - || GET_CODE (XEXP (addr, 0)) =3D=3D SYMBOL_REF) > - && CONST_INT_P (XEXP (addr, 1))) > + && base_address_p (XEXP (addr, 0))) > { > - *base =3D XEXP (addr, 0); > - *offset =3D XEXP (addr, 1); > - return true; > + rtx addend =3D XEXP (addr, 1); > + > + if (GET_CODE (addend) =3D=3D CONST) > + addend =3D XEXP (addend, 0); > + > + if (CONST_INT_P (addend)) > + { > + *base =3D XEXP (addr, 0); > + *symbase =3D const0_rtx; > + *offset =3D addend; > + return true; > + } > + > + /* Also accept REG + symbolic ref, with or without a CONST_INT > + offset. */ > + if (REG_P (XEXP (addr, 0))) > + { > + if (symbolic_base_address_p (addend)) > + { > + *base =3D XEXP (addr, 0); > + *symbase =3D addend; > + *offset =3D const0_rtx; > + return true; > + } > + > + if (GET_CODE (addend) =3D=3D PLUS > + && symbolic_base_address_p (XEXP (addend, 0)) > + && CONST_INT_P (XEXP (addend, 1))) > + { > + *base =3D XEXP (addr, 0); > + *symbase =3D XEXP (addend, 0); > + *offset =3D XEXP (addend, 1); > + return true; > + } > + } > } > > return false; > @@ -25242,7 +25302,8 @@ ix86_operands_ok_for_move_multiple (rtx *operands= , bool load, > machine_mode mode) > { > HOST_WIDE_INT offval_1, offval_2, msize; > - rtx mem_1, mem_2, reg_1, reg_2, base_1, base_2, offset_1, offset_2; > + rtx mem_1, mem_2, reg_1, reg_2, base_1, base_2, > + symbase_1, symbase_2, offset_1, offset_2; > > if (load) > { > @@ -25265,13 +25326,13 @@ ix86_operands_ok_for_move_multiple (rtx *operan= ds, bool load, > return false; > > /* Check if the addresses are in the form of [base+offset]. */ > - if (!extract_base_offset_in_addr (mem_1, &base_1, &offset_1)) > + if (!extract_base_offset_in_addr (mem_1, &base_1, &symbase_1, &offset_= 1)) > return false; > - if (!extract_base_offset_in_addr (mem_2, &base_2, &offset_2)) > + if (!extract_base_offset_in_addr (mem_2, &base_2, &symbase_2, &offset_= 2)) > return false; > > /* Check if the bases are the same. */ > - if (!rtx_equal_p (base_1, base_2)) > + if (!rtx_equal_p (base_1, base_2) || !rtx_equal_p (symbase_1, symbase_= 2)) > return false; > > offval_1 =3D INTVAL (offset_1); > > > -- > Alexandre Oliva, happy hacker https://FSFLA.org/blogs/lxo/ > Free Software Activist GNU Toolchain Engineer > More tolerance and less prejudice are key for inclusion and diversity > Excluding neuro-others for not behaving ""normal"" is *not* inclusive