From: Uros Bizjak <ubizjak@gmail.com>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: [PATCH, i386]: Allow memory operand for BT with immediate bitcount operand
Date: Sun, 03 Sep 2017 18:53:00 -0000 [thread overview]
Message-ID: <CAFULd4bQ50b0W7z8SLEp0oOKQhrwdRtP09gN1DXf04wAXuJJsA@mail.gmail.com> (raw)
Hello!
The BT instruction is slow only when memory operand is used with
nonimmediate bitcount operand.
2017-09-03 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (*bt<mode>): Use nonimmediate_operand
predicate for operand 1. Add (m,<S>) constraint.
(*jcc_bt<mode>): Use nonimmediate_operand predicate for operand 1.
Prevent memory operand 1 with register operand 2.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Committed to mainline SVN.
Uros.
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md (revision 251566)
+++ config/i386/i386.md (working copy)
@@ -11217,9 +11217,9 @@
[(set (reg:CCC FLAGS_REG)
(compare:CCC
(zero_extract:SWI48
- (match_operand:SWI48 0 "register_operand" "r")
+ (match_operand:SWI48 0 "nonimmediate_operand" "r,m")
(const_int 1)
- (match_operand:SI 1 "nonmemory_operand" "r<S>"))
+ (match_operand:SI 1 "nonmemory_operand" "r<S>,<S>"))
(const_int 0)))]
""
{
@@ -11248,7 +11248,7 @@
[(set (pc)
(if_then_else (match_operator 0 "bt_comparison_operator"
[(zero_extract:SWI48
- (match_operand:SWI48 1 "register_operand")
+ (match_operand:SWI48 1 "nonimmediate_operand")
(const_int 1)
(match_operand:SI 2 "nonmemory_operand"))
(const_int 0)])
@@ -11260,7 +11260,7 @@
? (INTVAL (operands[2]) < GET_MODE_BITSIZE (<MODE>mode)
&& INTVAL (operands[2])
>= (optimize_function_for_size_p (cfun) ? 8 : 32))
- : register_operand (operands[2], SImode))
+ : !memory_operand (operands[1], <MODE>mode))
&& can_create_pseudo_p ()"
"#"
"&& 1"
reply other threads:[~2017-09-03 18:53 UTC|newest]
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