Hello!

As explained in the PR [1] Comment #4, this is a target problem with
invalid RTL sharing.

Invalid sharing is created by the misaligned expansion code in i386.c,
when subregs are involved. vec_extract_hi_v32qi pattern is generated
in loop2_invariant pass when misaligned V8SI move is generated, and
later cprop3 pass propagates a register inside a subreg. The pass
updates both instances of (reg:V8SI 181) to (reg:V8SI 175) in (insn
197) and (insn 198). However, since just renamed (reg 175) doesn't
trigger rescan of (insn 198) in the substitution loop, we miss a
rescan of (insn 198).

The solution is to avoid invalid sharing by copying RTXes when subregs
are created.

2016-06-06  Uros Bizjak  <ubizjak@gmail.com>

    PR target/71389
    * config/i386/i386.c (ix86_avx256_split_vector_move_misalign):
    Copy op1 RTX to avoid invalid sharing.
    (ix86_expand_vector_move_misalign): Ditto.

testsuite/ChangeLog:

2016-06-06  Uros Bizjak  <ubizjak@gmail.com>

    PR target/71389
    * g++.dg/pr71389.C: New test.

Patch was bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline SVN, will be backported to release branches.

[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71389

Uros.