From: Uros Bizjak <ubizjak@gmail.com>
To: Roger Sayle <roger@nextmovesoftware.com>
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [X86 PATCH] Implement doubleword shift left by 1 bit using add+adc.
Date: Thu, 5 Oct 2023 14:06:53 +0200 [thread overview]
Message-ID: <CAFULd4bnkUdk_1hqS4wZJVfhif68eAu259pU2Kb-cOjjAiK34g@mail.gmail.com> (raw)
In-Reply-To: <00e201d9f781$603fdc20$20bf9460$@nextmovesoftware.com>
On Thu, Oct 5, 2023 at 1:45 PM Roger Sayle <roger@nextmovesoftware.com> wrote:
>
> Doh! ENOPATCH.
>
> > -----Original Message-----
> > From: Roger Sayle <roger@nextmovesoftware.com>
> > Sent: 05 October 2023 12:44
> > To: 'gcc-patches@gcc.gnu.org' <gcc-patches@gcc.gnu.org>
> > Cc: 'Uros Bizjak' <ubizjak@gmail.com>
> > Subject: [X86 PATCH] Implement doubleword shift left by 1 bit using
> add+adc.
> >
> >
> > This patch tweaks the i386 back-end's ix86_split_ashl to implement
> doubleword
> > left shifts by 1 bit, using an add followed by an add-with-carry (i.e. a
> doubleword
> > x+x) instead of using the x86's shld instruction.
> > The replacement sequence both requires fewer bytes and is faster on both
> Intel
> > and AMD architectures (from Agner Fog's latency tables and confirmed by my
> > own microbenchmarking).
> >
> > For the test case:
> > __int128 foo(__int128 x) { return x << 1; }
> >
> > with -O2 we previously generated:
> >
> > foo: movq %rdi, %rax
> > movq %rsi, %rdx
> > shldq $1, %rdi, %rdx
> > addq %rdi, %rax
> > ret
> >
> > with this patch we now generate:
> >
> > foo: movq %rdi, %rax
> > movq %rsi, %rdx
> > addq %rdi, %rax
> > adcq %rsi, %rdx
> > ret
> >
> >
> > This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and
> > make -k check, both with and without --target_board=unix{-m32} with no new
> > failures. Ok for mainline?
> >
> >
> > 2023-10-05 Roger Sayle <roger@nextmovesoftware.com>
> >
> > gcc/ChangeLog
> > * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
> > one into add3_cc_overflow_1 followed by add3_carry.
> > * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
> > "*add<mode>3_cc_overflow_1" to provide generator function.
> >
> > gcc/testsuite/ChangeLog
> > * gcc.target/i386/ashldi3-2.c: New 32-bit test case.
> > * gcc.target/i386/ashlti3-3.c: New 64-bit test case.
OK.
Thanks,
Uros.
> >
> >
> > Thanks in advance,
> > Roger
> > --
>
next prev parent reply other threads:[~2023-10-05 12:07 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-05 11:45 Roger Sayle
2023-10-05 12:06 ` Uros Bizjak [this message]
-- strict thread matches above, loose matches on Subject: below --
2023-10-05 11:43 Roger Sayle
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAFULd4bnkUdk_1hqS4wZJVfhif68eAu259pU2Kb-cOjjAiK34g@mail.gmail.com \
--to=ubizjak@gmail.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=roger@nextmovesoftware.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).