From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt1-x834.google.com (mail-qt1-x834.google.com [IPv6:2607:f8b0:4864:20::834]) by sourceware.org (Postfix) with ESMTPS id C6F6A3AAA008 for ; Fri, 3 Jun 2022 10:17:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C6F6A3AAA008 Received: by mail-qt1-x834.google.com with SMTP id x20so5182926qtp.8 for ; Fri, 03 Jun 2022 03:17:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=EpAdyZhhfN9/Jo41wrd8amWxiDknKZnedOyBSH47WwA=; b=eIemDb+7WTeaWe0Nzs3JCCSnuO9U92v3AxxR70vRsTNTFAlV9o57aRGx+wxn6ajLDp nVu7YCA0HBWY7k3B7f/iBKV6wg5PgLlVRmYyWd1S7aNudkMZSqjd2f6FUALO93GMUC1E UmUc8LweddblucSSYnfIuj0P1J2dc7j9SLvrayMZfqwZRM3eR0sGwlC+hoasAzBnjlQG LReZT+7qVSIG9zCBIDQ3W2t4cexoeXNE+WWSfbVwoU8sipPdoBtbLVO8I9vielUj1Okv fF3ZEH3cj+hNl298IXl3OmUqa39JepLy0U762lwtCnXBIk4qSpILOSRx1W5wRrK6WV7z y3cA== X-Gm-Message-State: AOAM531AT4biT7eNYSOlRV22un4lIkIVIm9nzCgeLF/I/0K5bUCB8/t2 eKJT3O44LXJS/pkVDr6D+AEU9vsQlRShw+9mT38= X-Google-Smtp-Source: ABdhPJxYqBbowUK/RwvucMbuztJRUuS2UZmZ/StBrrrYi9zmg15+mqA9u429f8GEB3ccmh8xrZns4PeZn7jlLpxITNA= X-Received: by 2002:a05:622a:20f:b0:304:da73:dc03 with SMTP id b15-20020a05622a020f00b00304da73dc03mr3582796qtx.436.1654251472106; Fri, 03 Jun 2022 03:17:52 -0700 (PDT) MIME-Version: 1.0 References: <229d815d-41f4-69f1-50b1-e58001b24ba3@suse.com> In-Reply-To: <229d815d-41f4-69f1-50b1-e58001b24ba3@suse.com> From: Uros Bizjak Date: Fri, 3 Jun 2022 12:17:41 +0200 Message-ID: Subject: Re: [PATCH] x86-64: make "length_vex" also account for VEX.B use by register operand To: Jan Beulich Cc: "gcc-patches@gcc.gnu.org" , "hubicka@ucw.cz" Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 03 Jun 2022 10:17:54 -0000 On Thu, Jun 2, 2022 at 5:11 PM Jan Beulich wrote: > > The length attribute ought to be "the (bounding maximum) length of an > instruction" according to the comment next to its definition. A register > operand encoded using the ModR/M.rm field will additionally use VEX.B > for encoding the highest bit of the register number. Hence for the high > 8 GPR registers as well as the [xy]mm{8..15} ones 3-byte VEX encoding > may be needed. Since it isn't known to the function calculating the > length which register goes where in the insn encoding, be conservative > and assume a 3-byte VEX prefix whenever any such register operand is > present and there's no memory operand. > > gcc/ > > * config/i386/i386.cc (ix86_attr_length_vex_default): Take REX.B > into account for reg-only insns. LGTM. Thanks, Uros. > --- a/gcc/config/i386/i386.cc > +++ b/gcc/config/i386/i386.cc > @@ -16820,7 +16820,8 @@ int > ix86_attr_length_vex_default (rtx_insn *insn, bool has_0f_opcode, > bool has_vex_w) > { > - int i; > + int i, reg_only = 2 + 1; > + bool has_mem = false; > > /* Only 0f opcode can use 2 byte VEX prefix and VEX W bit uses 3 > byte VEX prefix. */ > @@ -16840,16 +16841,23 @@ ix86_attr_length_vex_default (rtx_insn * > if (GET_MODE (recog_data.operand[i]) == DImode > && GENERAL_REG_P (recog_data.operand[i])) > return 3 + 1; > + > + /* REX.B bit requires 3-byte VEX. Right here we don't know which > + operand will be encoded using VEX.B, so be conservative. */ > + if (REX_INT_REGNO_P (recog_data.operand[i]) > + || REX_SSE_REGNO_P (recog_data.operand[i])) > + reg_only = 3 + 1; > } > - else > + else if (MEM_P (recog_data.operand[i])) > { > /* REX.X or REX.B bits use 3 byte VEX prefix. */ > - if (MEM_P (recog_data.operand[i]) > - && x86_extended_reg_mentioned_p (recog_data.operand[i])) > + if (x86_extended_reg_mentioned_p (recog_data.operand[i])) > return 3 + 1; > + > + has_mem = true; > } > > - return 2 + 1; > + return has_mem ? 2 + 1 : reg_only; > } > > >