* [PATCH] Disable some i?86 builtins for -m32 (PR target/70858)
@ 2016-04-28 19:14 Jakub Jelinek
2016-04-28 19:31 ` Uros Bizjak
0 siblings, 1 reply; 2+ messages in thread
From: Jakub Jelinek @ 2016-04-28 19:14 UTC (permalink / raw)
To: Uros Bizjak, Kirill Yukhin; +Cc: gcc-patches
Hi!
The PR reported one ICE caused by a builtin for __x86_64__ guarded
intrinsics to be mistakenly available in -m32 too, I've looked for
INT64 substrings in the various i386.c builtin tables and for each
that has been missing OPTION_MASK_ISA_64BIT in the mask looked at
whether the uses of the builtin in *intrin.h aren't guarded #ifdef __x86_64__
and whether the corresponding insn isn't TARGET_64BIT only.
This is the result of that effort, 7 builtins that each ICEs when used in -m32.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk/6.2?
2016-04-28 Jakub Jelinek <jakub@redhat.com>
PR target/70858
* config/i386/i386.c (bdesc_special_args): Add | OPTION_MASK_ISA_64BIT
to __builtin_ia32_lwpval64 and __builtin_ia32_lwpins64.
(bdesc_args): Add | OPTION_MASK_ISA_64BIT to __builtin_ia32_bextr_u64,
__builtin_ia32_bextri_u64, __builtin_ia32_bzhi_di,
__builtin_ia32_pdep_di and __builtin_ia32_pext_di.
* gcc.target/i386/pr70858.c: New test.
--- gcc/config/i386/i386.c.jj 2016-04-28 17:26:10.000000000 +0200
+++ gcc/config/i386/i386.c 2016-04-28 18:39:06.506976486 +0200
@@ -32996,9 +32996,9 @@ static const struct builtin_description
{ OPTION_MASK_ISA_LWP, CODE_FOR_lwp_llwpcb, "__builtin_ia32_llwpcb", IX86_BUILTIN_LLWPCB, UNKNOWN, (int) VOID_FTYPE_PVOID },
{ OPTION_MASK_ISA_LWP, CODE_FOR_lwp_slwpcb, "__builtin_ia32_slwpcb", IX86_BUILTIN_SLWPCB, UNKNOWN, (int) PVOID_FTYPE_VOID },
{ OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpvalsi3, "__builtin_ia32_lwpval32", IX86_BUILTIN_LWPVAL32, UNKNOWN, (int) VOID_FTYPE_UINT_UINT_UINT },
- { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpvaldi3, "__builtin_ia32_lwpval64", IX86_BUILTIN_LWPVAL64, UNKNOWN, (int) VOID_FTYPE_UINT64_UINT_UINT },
+ { OPTION_MASK_ISA_LWP | OPTION_MASK_ISA_64BIT, CODE_FOR_lwp_lwpvaldi3, "__builtin_ia32_lwpval64", IX86_BUILTIN_LWPVAL64, UNKNOWN, (int) VOID_FTYPE_UINT64_UINT_UINT },
{ OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpinssi3, "__builtin_ia32_lwpins32", IX86_BUILTIN_LWPINS32, UNKNOWN, (int) UCHAR_FTYPE_UINT_UINT_UINT },
- { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpinsdi3, "__builtin_ia32_lwpins64", IX86_BUILTIN_LWPINS64, UNKNOWN, (int) UCHAR_FTYPE_UINT64_UINT_UINT },
+ { OPTION_MASK_ISA_LWP | OPTION_MASK_ISA_64BIT, CODE_FOR_lwp_lwpinsdi3, "__builtin_ia32_lwpins64", IX86_BUILTIN_LWPINS64, UNKNOWN, (int) UCHAR_FTYPE_UINT64_UINT_UINT },
/* FSGSBASE */
{ OPTION_MASK_ISA_FSGSBASE | OPTION_MASK_ISA_64BIT, CODE_FOR_rdfsbasesi, "__builtin_ia32_rdfsbase32", IX86_BUILTIN_RDFSBASE32, UNKNOWN, (int) UNSIGNED_FTYPE_VOID },
@@ -33933,12 +33933,12 @@ static const struct builtin_description
/* BMI */
{ OPTION_MASK_ISA_BMI, CODE_FOR_bmi_bextr_si, "__builtin_ia32_bextr_u32", IX86_BUILTIN_BEXTR32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
- { OPTION_MASK_ISA_BMI, CODE_FOR_bmi_bextr_di, "__builtin_ia32_bextr_u64", IX86_BUILTIN_BEXTR64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
+ { OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi_bextr_di, "__builtin_ia32_bextr_u64", IX86_BUILTIN_BEXTR64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
{ OPTION_MASK_ISA_BMI, CODE_FOR_ctzhi2, "__builtin_ctzs", IX86_BUILTIN_CTZS, UNKNOWN, (int) UINT16_FTYPE_UINT16 },
/* TBM */
{ OPTION_MASK_ISA_TBM, CODE_FOR_tbm_bextri_si, "__builtin_ia32_bextri_u32", IX86_BUILTIN_BEXTRI32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
- { OPTION_MASK_ISA_TBM, CODE_FOR_tbm_bextri_di, "__builtin_ia32_bextri_u64", IX86_BUILTIN_BEXTRI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
+ { OPTION_MASK_ISA_TBM | OPTION_MASK_ISA_64BIT, CODE_FOR_tbm_bextri_di, "__builtin_ia32_bextri_u64", IX86_BUILTIN_BEXTRI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
/* F16C */
{ OPTION_MASK_ISA_F16C, CODE_FOR_vcvtph2ps, "__builtin_ia32_vcvtph2ps", IX86_BUILTIN_CVTPH2PS, UNKNOWN, (int) V4SF_FTYPE_V8HI },
@@ -33948,11 +33948,11 @@ static const struct builtin_description
/* BMI2 */
{ OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_bzhi_si3, "__builtin_ia32_bzhi_si", IX86_BUILTIN_BZHI32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
- { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_bzhi_di3, "__builtin_ia32_bzhi_di", IX86_BUILTIN_BZHI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
+ { OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi2_bzhi_di3, "__builtin_ia32_bzhi_di", IX86_BUILTIN_BZHI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
{ OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pdep_si3, "__builtin_ia32_pdep_si", IX86_BUILTIN_PDEP32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
- { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pdep_di3, "__builtin_ia32_pdep_di", IX86_BUILTIN_PDEP64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
+ { OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi2_pdep_di3, "__builtin_ia32_pdep_di", IX86_BUILTIN_PDEP64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
{ OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pext_si3, "__builtin_ia32_pext_si", IX86_BUILTIN_PEXT32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
- { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pext_di3, "__builtin_ia32_pext_di", IX86_BUILTIN_PEXT64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
+ { OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi2_pext_di3, "__builtin_ia32_pext_di", IX86_BUILTIN_PEXT64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
/* AVX512F */
{ OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_si512_256si, "__builtin_ia32_si512_256si", IX86_BUILTIN_SI512_SI256, UNKNOWN, (int) V16SI_FTYPE_V8SI },
--- gcc/testsuite/gcc.target/i386/pr70858.c.jj 2016-04-28 18:59:23.160568289 +0200
+++ gcc/testsuite/gcc.target/i386/pr70858.c 2016-04-28 19:00:07.529969908 +0200
@@ -0,0 +1,45 @@
+/* PR target/70858 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mlwp -mbmi -mtbm -mbmi2 -std=gnu11" } */
+
+void
+f1 (unsigned long long x, unsigned int y)
+{
+ __builtin_ia32_lwpval64 (x, y, 1); /* { dg-warning "implicit declaration of function .__builtin_ia32_lwpval64." "" { target ia32 } } */
+}
+
+char
+f2 (unsigned long long x, unsigned int y)
+{
+ return __builtin_ia32_lwpins64 (x, y, 1); /* { dg-warning "implicit declaration of function .__builtin_ia32_lwpins64." "" { target ia32 } } */
+}
+
+unsigned long long
+f3 (unsigned long long x, unsigned long long y)
+{
+ return __builtin_ia32_bextr_u64 (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_bextr_u64." "" { target ia32 } } */
+}
+
+unsigned long long
+f4 (unsigned long long x)
+{
+ return __builtin_ia32_bextri_u64 (x, 1); /* { dg-warning "implicit declaration of function .__builtin_ia32_bextri_u64." "" { target ia32 } } */
+}
+
+unsigned long long
+f5 (unsigned long long x, unsigned long long y)
+{
+ return __builtin_ia32_bzhi_di (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_bzhi_di." "" { target ia32 } } */
+}
+
+unsigned long long
+f6 (unsigned long long x, unsigned long long y)
+{
+ return __builtin_ia32_pdep_di (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_pdep_di." "" { target ia32 } } */
+}
+
+unsigned long long
+f7 (unsigned long long x, unsigned long long y)
+{
+ return __builtin_ia32_pext_di (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_pext_di." "" { target ia32 } } */
+}
Jakub
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] Disable some i?86 builtins for -m32 (PR target/70858)
2016-04-28 19:14 [PATCH] Disable some i?86 builtins for -m32 (PR target/70858) Jakub Jelinek
@ 2016-04-28 19:31 ` Uros Bizjak
0 siblings, 0 replies; 2+ messages in thread
From: Uros Bizjak @ 2016-04-28 19:31 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: Kirill Yukhin, gcc-patches
On Thu, Apr 28, 2016 at 9:14 PM, Jakub Jelinek <jakub@redhat.com> wrote:
> Hi!
>
> The PR reported one ICE caused by a builtin for __x86_64__ guarded
> intrinsics to be mistakenly available in -m32 too, I've looked for
> INT64 substrings in the various i386.c builtin tables and for each
> that has been missing OPTION_MASK_ISA_64BIT in the mask looked at
> whether the uses of the builtin in *intrin.h aren't guarded #ifdef __x86_64__
> and whether the corresponding insn isn't TARGET_64BIT only.
>
> This is the result of that effort, 7 builtins that each ICEs when used in -m32.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk/6.2?
>
> 2016-04-28 Jakub Jelinek <jakub@redhat.com>
>
> PR target/70858
> * config/i386/i386.c (bdesc_special_args): Add | OPTION_MASK_ISA_64BIT
> to __builtin_ia32_lwpval64 and __builtin_ia32_lwpins64.
> (bdesc_args): Add | OPTION_MASK_ISA_64BIT to __builtin_ia32_bextr_u64,
> __builtin_ia32_bextri_u64, __builtin_ia32_bzhi_di,
> __builtin_ia32_pdep_di and __builtin_ia32_pext_di.
>
> * gcc.target/i386/pr70858.c: New test.
OK everywhere.
Thanks,
Uros.
> --- gcc/config/i386/i386.c.jj 2016-04-28 17:26:10.000000000 +0200
> +++ gcc/config/i386/i386.c 2016-04-28 18:39:06.506976486 +0200
> @@ -32996,9 +32996,9 @@ static const struct builtin_description
> { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_llwpcb, "__builtin_ia32_llwpcb", IX86_BUILTIN_LLWPCB, UNKNOWN, (int) VOID_FTYPE_PVOID },
> { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_slwpcb, "__builtin_ia32_slwpcb", IX86_BUILTIN_SLWPCB, UNKNOWN, (int) PVOID_FTYPE_VOID },
> { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpvalsi3, "__builtin_ia32_lwpval32", IX86_BUILTIN_LWPVAL32, UNKNOWN, (int) VOID_FTYPE_UINT_UINT_UINT },
> - { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpvaldi3, "__builtin_ia32_lwpval64", IX86_BUILTIN_LWPVAL64, UNKNOWN, (int) VOID_FTYPE_UINT64_UINT_UINT },
> + { OPTION_MASK_ISA_LWP | OPTION_MASK_ISA_64BIT, CODE_FOR_lwp_lwpvaldi3, "__builtin_ia32_lwpval64", IX86_BUILTIN_LWPVAL64, UNKNOWN, (int) VOID_FTYPE_UINT64_UINT_UINT },
> { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpinssi3, "__builtin_ia32_lwpins32", IX86_BUILTIN_LWPINS32, UNKNOWN, (int) UCHAR_FTYPE_UINT_UINT_UINT },
> - { OPTION_MASK_ISA_LWP, CODE_FOR_lwp_lwpinsdi3, "__builtin_ia32_lwpins64", IX86_BUILTIN_LWPINS64, UNKNOWN, (int) UCHAR_FTYPE_UINT64_UINT_UINT },
> + { OPTION_MASK_ISA_LWP | OPTION_MASK_ISA_64BIT, CODE_FOR_lwp_lwpinsdi3, "__builtin_ia32_lwpins64", IX86_BUILTIN_LWPINS64, UNKNOWN, (int) UCHAR_FTYPE_UINT64_UINT_UINT },
>
> /* FSGSBASE */
> { OPTION_MASK_ISA_FSGSBASE | OPTION_MASK_ISA_64BIT, CODE_FOR_rdfsbasesi, "__builtin_ia32_rdfsbase32", IX86_BUILTIN_RDFSBASE32, UNKNOWN, (int) UNSIGNED_FTYPE_VOID },
> @@ -33933,12 +33933,12 @@ static const struct builtin_description
>
> /* BMI */
> { OPTION_MASK_ISA_BMI, CODE_FOR_bmi_bextr_si, "__builtin_ia32_bextr_u32", IX86_BUILTIN_BEXTR32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
> - { OPTION_MASK_ISA_BMI, CODE_FOR_bmi_bextr_di, "__builtin_ia32_bextr_u64", IX86_BUILTIN_BEXTR64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
> + { OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi_bextr_di, "__builtin_ia32_bextr_u64", IX86_BUILTIN_BEXTR64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
> { OPTION_MASK_ISA_BMI, CODE_FOR_ctzhi2, "__builtin_ctzs", IX86_BUILTIN_CTZS, UNKNOWN, (int) UINT16_FTYPE_UINT16 },
>
> /* TBM */
> { OPTION_MASK_ISA_TBM, CODE_FOR_tbm_bextri_si, "__builtin_ia32_bextri_u32", IX86_BUILTIN_BEXTRI32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
> - { OPTION_MASK_ISA_TBM, CODE_FOR_tbm_bextri_di, "__builtin_ia32_bextri_u64", IX86_BUILTIN_BEXTRI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
> + { OPTION_MASK_ISA_TBM | OPTION_MASK_ISA_64BIT, CODE_FOR_tbm_bextri_di, "__builtin_ia32_bextri_u64", IX86_BUILTIN_BEXTRI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
>
> /* F16C */
> { OPTION_MASK_ISA_F16C, CODE_FOR_vcvtph2ps, "__builtin_ia32_vcvtph2ps", IX86_BUILTIN_CVTPH2PS, UNKNOWN, (int) V4SF_FTYPE_V8HI },
> @@ -33948,11 +33948,11 @@ static const struct builtin_description
>
> /* BMI2 */
> { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_bzhi_si3, "__builtin_ia32_bzhi_si", IX86_BUILTIN_BZHI32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
> - { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_bzhi_di3, "__builtin_ia32_bzhi_di", IX86_BUILTIN_BZHI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
> + { OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi2_bzhi_di3, "__builtin_ia32_bzhi_di", IX86_BUILTIN_BZHI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
> { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pdep_si3, "__builtin_ia32_pdep_si", IX86_BUILTIN_PDEP32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
> - { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pdep_di3, "__builtin_ia32_pdep_di", IX86_BUILTIN_PDEP64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
> + { OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi2_pdep_di3, "__builtin_ia32_pdep_di", IX86_BUILTIN_PDEP64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
> { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pext_si3, "__builtin_ia32_pext_si", IX86_BUILTIN_PEXT32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
> - { OPTION_MASK_ISA_BMI2, CODE_FOR_bmi2_pext_di3, "__builtin_ia32_pext_di", IX86_BUILTIN_PEXT64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
> + { OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi2_pext_di3, "__builtin_ia32_pext_di", IX86_BUILTIN_PEXT64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
>
> /* AVX512F */
> { OPTION_MASK_ISA_AVX512F, CODE_FOR_avx512f_si512_256si, "__builtin_ia32_si512_256si", IX86_BUILTIN_SI512_SI256, UNKNOWN, (int) V16SI_FTYPE_V8SI },
> --- gcc/testsuite/gcc.target/i386/pr70858.c.jj 2016-04-28 18:59:23.160568289 +0200
> +++ gcc/testsuite/gcc.target/i386/pr70858.c 2016-04-28 19:00:07.529969908 +0200
> @@ -0,0 +1,45 @@
> +/* PR target/70858 */
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mlwp -mbmi -mtbm -mbmi2 -std=gnu11" } */
> +
> +void
> +f1 (unsigned long long x, unsigned int y)
> +{
> + __builtin_ia32_lwpval64 (x, y, 1); /* { dg-warning "implicit declaration of function .__builtin_ia32_lwpval64." "" { target ia32 } } */
> +}
> +
> +char
> +f2 (unsigned long long x, unsigned int y)
> +{
> + return __builtin_ia32_lwpins64 (x, y, 1); /* { dg-warning "implicit declaration of function .__builtin_ia32_lwpins64." "" { target ia32 } } */
> +}
> +
> +unsigned long long
> +f3 (unsigned long long x, unsigned long long y)
> +{
> + return __builtin_ia32_bextr_u64 (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_bextr_u64." "" { target ia32 } } */
> +}
> +
> +unsigned long long
> +f4 (unsigned long long x)
> +{
> + return __builtin_ia32_bextri_u64 (x, 1); /* { dg-warning "implicit declaration of function .__builtin_ia32_bextri_u64." "" { target ia32 } } */
> +}
> +
> +unsigned long long
> +f5 (unsigned long long x, unsigned long long y)
> +{
> + return __builtin_ia32_bzhi_di (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_bzhi_di." "" { target ia32 } } */
> +}
> +
> +unsigned long long
> +f6 (unsigned long long x, unsigned long long y)
> +{
> + return __builtin_ia32_pdep_di (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_pdep_di." "" { target ia32 } } */
> +}
> +
> +unsigned long long
> +f7 (unsigned long long x, unsigned long long y)
> +{
> + return __builtin_ia32_pext_di (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_pext_di." "" { target ia32 } } */
> +}
>
> Jakub
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