From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 24269 invoked by alias); 23 Sep 2014 10:51:11 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 24259 invoked by uid 89); 23 Sep 2014 10:51:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL,BAYES_00,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-ob0-f196.google.com Received: from mail-ob0-f196.google.com (HELO mail-ob0-f196.google.com) (209.85.214.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 23 Sep 2014 10:51:09 +0000 Received: by mail-ob0-f196.google.com with SMTP id wp4so478323obc.3 for ; Tue, 23 Sep 2014 03:51:07 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.182.224.227 with SMTP id rf3mr9051347obc.70.1411469467554; Tue, 23 Sep 2014 03:51:07 -0700 (PDT) Received: by 10.60.125.98 with HTTP; Tue, 23 Sep 2014 03:51:07 -0700 (PDT) In-Reply-To: References: <54206D2C.708@redhat.com> Date: Tue, 23 Sep 2014 10:51:00 -0000 Message-ID: Subject: Re: [PATCH IRA] update_equiv_regs fails to set EQUIV reg-note for pseudo with more than one definition From: Felix Yang To: "Yangfei (Felix)" Cc: Jeff Law , GCC Patches , "vmakarov@redhat.com" Content-Type: multipart/mixed; boundary=089e013a05de39dda30503b95811 X-SW-Source: 2014-09/txt/msg01931.txt.bz2 --089e013a05de39dda30503b95811 Content-Type: text/plain; charset=UTF-8 Content-length: 5085 Hi, Ignore the previous message. Attached please find the updated patch. Bootstrapped on x86_64-suse-linux. Please apply this patch if OK for trunk. Index: gcc/ChangeLog =================================================================== --- gcc/ChangeLog (revision 215500) +++ gcc/ChangeLog (working copy) @@ -1,3 +1,8 @@ +2014-09-23 Felix Yang + + * ira.c (update_equiv_regs): Check all definitions for a multiple-set + register to make sure that the RHS have the same value. + 2014-09-23 Ilya Enkovich * cfgcleanup.c (try_optimize_cfg): Do not remove label Index: gcc/ira.c =================================================================== --- gcc/ira.c (revision 215500) +++ gcc/ira.c (working copy) @@ -3467,16 +3467,43 @@ update_equiv_regs (void) if (note && GET_CODE (XEXP (note, 0)) == EXPR_LIST) note = NULL_RTX; - if (DF_REG_DEF_COUNT (regno) != 1 - && (! note + if (DF_REG_DEF_COUNT (regno) != 1) + { + rtx list; + bool equal_p = true; + + if (! note || rtx_varies_p (XEXP (note, 0), 0) || (reg_equiv[regno].replacement && ! rtx_equal_p (XEXP (note, 0), - reg_equiv[regno].replacement)))) - { - no_equiv (dest, set, NULL); - continue; + reg_equiv[regno].replacement))) + { + no_equiv (dest, set, NULL); + continue; + } + + list = reg_equiv[regno].init_insns; + for (; list; list = XEXP (list, 1)) + { + rtx note_tmp, insn_tmp; + insn_tmp = XEXP (list, 0); + note_tmp = find_reg_note (insn_tmp, REG_EQUAL, NULL_RTX); + + if (note_tmp == 0 + || ! rtx_equal_p (XEXP (note, 0), XEXP (note_tmp, 0))) + { + equal_p = false; + break; + } + } + + if (! equal_p) + { + no_equiv (dest, set, NULL); + continue; + } } + /* Record this insn as initializing this register. */ reg_equiv[regno].init_insns = gen_rtx_INSN_LIST (VOIDmode, insn, reg_equiv[regno].init_insns); Cheers, Felix On Tue, Sep 23, 2014 at 6:45 PM, Felix Yang wrote: > Hi, > Attached please fined the updated patch. > > Cheers, > Felix > > > On Tue, Sep 23, 2014 at 10:48 AM, Yangfei (Felix) wrote: >>> On 09/22/14 08:40, Felix Yang wrote: >>> > Hi, >>> > >>> > I find that update_equiv_regs in ira.c sets the wrong EQUIV >>> > reg-note for pseudo with more than one definiton in certain situation. >>> > Here is a simplified RTL snippet after this function finishs handling: >>> > >>> > (insn 77 37 78 2 (set (reg:SI 171) >>> > (const_int 0 [0])) ticket151.c:33 52 {movsi_internal_dsp} >>> > (expr_list:REG_EQUAL (const_int 0 [0]) >>> > (nil))) >>> > >>> > ...... >>> > >>> > (insn 79 50 53 2 (set (mem/c:SI (reg/f:SI 136) [2 g_728+0 S4 A64]) >>> > (reg:SI 171)) ticket151.c:33 52 {movsi_internal_dsp} >>> > (expr_list:REG_DEAD (reg:SI 171) >>> > (nil))) >>> > (insn 53 79 54 2 (set (mem/c:SI (reg/f:SI 162) [4 g_163+0 S4 A32]) >>> > (reg:SI 163)) 52 {movsi_internal_dsp} >>> > (expr_list:REG_DEAD (reg:SI 163) >>> > (expr_list:REG_DEAD (reg/f:SI 162) >>> > (nil)))) >>> > (insn 54 53 14 2 (set (reg:SI 171) >>> > (mem/u/c:SI (symbol_ref/u:SI ("*.LC8") [flags 0x2]) [4 S4 >>> > A32])) ticket151.c:49 52 {movsi_internal_dsp} >>> > (expr_list:REG_EQUIV (mem/u/c:SI (symbol_ref/u:SI ("*.LC8") >>> > [flags 0x2]) [4 S4 A32]) >>> > (expr_list:REG_EQUAL (mem/u/c:SI (symbol_ref/u:SI ("*.LC8") >>> > [flags 0x2]) [4 S4 A32]) >>> > (nil)))) >>> > >>> > >>> > The REG_EQUIV of insn 54 is not correct as pseudo 171 is defined >>> > in insn 77 with a differerent value. >>> > This may causes reload replacing pseudo 171 with mem/u/c:SI >>> > (symbol_ref/u:SI ("*.LC8"), which is wrong. >>> > A proposed patch for this issue, please comment: >>> Is it possible it's the conditional just above this one that is incorrect? >>> >>> if (DF_REG_DEF_COUNT (regno) != 1 >>> && (! note >>> || rtx_varies_p (XEXP (note, 0), 0) >>> || (reg_equiv[regno].replacement >>> && ! rtx_equal_p (XEXP (note, 0), >>> >>> reg_equiv[regno].replacement)))) >>> { >>> no_equiv (dest, set, NULL); >>> continue; >>> } >>> >>> >>> ISTM the only time a multiply-set register can have a valid REG_EQUIV note is if >>> each and every assignment to that pseudo has the same RHS. >>> >>> Jeff >> >> >> Thanks Jeff. Yes, I agree that this is a better place to consider. I am thinking of a better way to fix this. >> >> Vladimir, can you shed light on this and give me some suggestions? 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