From: Richard Biener <richard.guenther@gmail.com>
To: SenthilKumar.Selvaraj@microchip.com
Cc: gcc-patches@gcc.gnu.org, chertykov@gmail.com
Subject: Re: [PATCH, PR110086] avr: Fix ICE on optimize attribute
Date: Mon, 5 Jun 2023 07:57:41 +0200 [thread overview]
Message-ID: <CAFiYyc0OwZ-ATtT8e2BMW1k0qb-pf+ZQjnWGWK1TCU1zuV037A@mail.gmail.com> (raw)
In-Reply-To: <9ff071e705550749d0d05e4adabd0ba0f07e8f45.camel@microchip.com>
On Fri, Jun 2, 2023 at 11:54 AM SenthilKumar.Selvaraj--- via
Gcc-patches <gcc-patches@gcc.gnu.org> wrote:
>
> Hi,
>
> This patch fixes an ICE when an optimize attribute changes the prevailing
> optimization level.
>
> I found https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105069 describing the
> same ICE for the sh target, where the fix was to enable save/restore of
> target specific options modified via TARGET_OPTIMIZATION_TABLE hook.
>
> For the AVR target, mgas-isr-prologues and -mmain-is-OS_task are those
> target specific options. As they enable generation of more optimal code,
> this patch adds the Optimization option property to those option records,
> and that fixes the ICE.
>
> Regression run shows no regressions, and >100 new PASSes.
> Ok to commit to master?
LGTM
Richard.
> Regards
> Senthil
>
>
> PR 110086
>
> gcc/ChangeLog:
>
> * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
> Add Optimization option property.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/avr/pr110086.c: New test.
>
> diff --git gcc/config/avr/avr.opt gcc/config/avr/avr.opt
> index f62d746..5a0b465 100644
> --- gcc/config/avr/avr.opt
> +++ gcc/config/avr/avr.opt
> @@ -27,7 +27,7 @@ Target RejectNegative Joined Var(avr_mmcu) MissingArgError(missing device or arc
> -mmcu=MCU Select the target MCU.
>
> mgas-isr-prologues
> -Target Var(avr_gasisr_prologues) UInteger Init(0)
> +Target Var(avr_gasisr_prologues) UInteger Init(0) Optimization
> Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues.
>
> mn-flash=
> @@ -65,7 +65,7 @@ Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0)
> Set the branch costs for conditional branch instructions. Reasonable values are small, non-negative integers. The default
> branch cost is 0.
>
> mmain-is-OS_task
> -Target Mask(MAIN_IS_OS_TASK)
> +Target Mask(MAIN_IS_OS_TASK) Optimization
> Treat main as if it had attribute OS_task.
>
> morder1
> diff --git gcc/testsuite/gcc.target/avr/pr110086.c gcc/testsuite/gcc.target/avr/pr110086.c
> new file mode 100644
> index 0000000..6b97620
> --- /dev/null
> +++ gcc/testsuite/gcc.target/avr/pr110086.c
> @@ -0,0 +1,5 @@
> +/* { dg-do compile } */
> +/* { dg-options "-Os" } */
> +
> +void __attribute__((optimize("O0"))) foo(void) {
> +}
prev parent reply other threads:[~2023-06-05 5:57 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-02 9:53 SenthilKumar.Selvaraj
2023-06-05 5:57 ` Richard Biener [this message]
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