From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lj1-x232.google.com (mail-lj1-x232.google.com [IPv6:2a00:1450:4864:20::232]) by sourceware.org (Postfix) with ESMTPS id BE5AC3858C62 for ; Fri, 2 Jun 2023 09:37:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org BE5AC3858C62 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-lj1-x232.google.com with SMTP id 38308e7fff4ca-2af189d323fso39672411fa.1 for ; Fri, 02 Jun 2023 02:37:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1685698631; x=1688290631; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=mi7fLgbhMSuSnirGDIb51LL1r2USoAsloCviGR4cH34=; b=RsF35Ww7m0xku3enYhVQWnaIlqkEwvamNnQ5aq4LdBwJwQWrV0aSYKMZFOxmB8QtMi wIjahrTt4V3m5HIxih06m8+mIrizPggH+wTPH6C0t91uUeigQQQ+dSnCBpT8GnxtdRQD sZxmj+BDg4hi7XiRcNuzkrEldZ3cyWkZCPr/ksz6mgWqhFHCtilpCWe0hYjXOxIBYmZz mvtF13+pSanmncfvkhwW+G72sAqI9prq8GOK5sf3clGf02fWg4wOlXYOgy5Xvgd+7f5o QHZBDmK92vvJthO4uHUnKqKAV76NPBzWXa8JdaIHWLGVMn3CwecZVB4uwz/YzELVgqAF CNUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685698631; x=1688290631; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mi7fLgbhMSuSnirGDIb51LL1r2USoAsloCviGR4cH34=; b=fvKN9SszOJZjeX5D4tpNYvKojgxh05wc35E6ZgJ47d2PuP1NUH1/xTX+GamVJfM22B yMEV+1rhsCphGd7Zn7WXL9QLMtYeS3nJ69yeqcvwN/wTgoY0K8o6OJ4viB0fm9iUFN3r rlNHiz5KN7cchG5mjONB6IEu5XvLQ/U55Ax6lINQ1eyF0DAqeA9V3WLgk1rDYwaYgtfi jRS/kJylkEYGxhB77xyA695qvLpSgRj4ePN8EFhXztyjB8nOGue2T0Ib8I4H3p3cYi/1 rIFTdj2D/ZoqNo7PgkVxdTyP1mH3Wew+1vRKMMgGQU/Uk0DeysUL0nwu7+0S2ZRNCKBN fwdw== X-Gm-Message-State: AC+VfDxTrnUsKBKQHtKbP6glrM9k3pvywPQz0MxoMr0CL1tVFUe/lidU m4UUNMW0uaesOSVKZBUVmjKoKZl6DnvZA7DMrUk= X-Google-Smtp-Source: ACHHUZ4wJ0gys7Gw6e+yQkzHoXBCDwD7ybsBJhOQ8IgkGUotKKCTtZekKII1xydEqfMI81VorsuYQVTPqJHNgzuFpus= X-Received: by 2002:a2e:9947:0:b0:2aa:e7cd:69f8 with SMTP id r7-20020a2e9947000000b002aae7cd69f8mr523415ljj.9.1685698631148; Fri, 02 Jun 2023 02:37:11 -0700 (PDT) MIME-Version: 1.0 References: <4506760.44csPzL39Z@minbar> <83e84153-b9e4-ecc9-5b6c-58637f3c61e8@ispras.ru> <3125723.CQOukoFCf9@minbar> In-Reply-To: From: Richard Biener Date: Fri, 2 Jun 2023 11:36:58 +0200 Message-ID: Subject: Re: [PATCH] doc: clarify semantics of vector bitwise shifts To: Alexander Monakov Cc: Matthias Kretz , gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, Jun 2, 2023 at 11:24=E2=80=AFAM Alexander Monakov wrote: > > > On Fri, 2 Jun 2023, Matthias Kretz wrote: > > > > Okay, I see opinions will vary here. I was thinking about our immintr= in.h > > > which is partially implemented in terms of generic vectors. Imagine w= e > > > extend UBSan to trap on signed overflow for vector types. I expect th= at > > > will blow up on existing code that uses Intel intrinsics. > > > > _mm_add_epi32 is already implemented via __v4su addition (i.e. unsigned= ). So > > the intrinsic would continue to wrap on signed overflow. > > Ah, if our intrinsics take care of it, that alleviates my concern. Just to add when generic vectors are lowered to scalar operations then signed vector ops become signed scalar ops which means followup optimizations will assume undefined behavior on overflow. > > > I'm not sure what you consider a breaking change here. Is that the im= plied > > > threat to use undefinedness for range deduction and other optimizatio= ns? > > > > Consider the stdx::simd implementation. It currently follows semantics = of the > > builtin types. So simd can be shifted by 30 without UB. The > > implementation of the shift operator depends on the current behavior, e= ven if > > it is target-dependent. For PPC the simd implementation adds extra code= to > > avoid the "UB". With nailing down shifts > sizeof(T) as UB this extra c= ode now > > needs to be added for all targets. > > What does stdx::simd do on LLVM, where that has always been UB even on x8= 6? > > Alexander