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From: Richard Biener <richard.guenther@gmail.com>
To: Uros Bizjak <ubizjak@gmail.com>
Cc: Joseph Myers <joseph@codesourcery.com>,
	Jan Hubicka <hubicka@ucw.cz>,
		"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: Re: Add option for whether ceil etc. can raise "inexact", adjust x86 conditions
Date: Wed, 16 Aug 2017 13:40:00 -0000	[thread overview]
Message-ID: <CAFiYyc0S3ZwnCQi08rKw+5z8beqBpDaJGi0Nf+cbKpTVD57oUA@mail.gmail.com> (raw)
In-Reply-To: <CAFULd4Z8-UcfJ=go+7c7VXrL-Tduu=tHcYfVPfWJGj2n6-riLQ@mail.gmail.com>

On Wed, Aug 16, 2017 at 12:51 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Wed, Aug 16, 2017 at 12:48 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
>> On Wed, Aug 16, 2017 at 12:43 PM, Richard Biener
>> <richard.guenther@gmail.com> wrote:
>>> On Tue, Aug 15, 2017 at 9:21 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
>>>> On Tue, Aug 15, 2017 at 4:59 PM, Richard Biener
>>>> <richard.guenther@gmail.com> wrote:
>>>>
>>>>> So I'd try the "easy" way of expanding if (__builtin_cpu_supports ("sse4.1"))
>>>>> as the sse4.1 sequence is just a single instruction.  The interesting part
>>>>> of the story will be to make sure we can emit that even if ! TARGET_ROUND ...
>>>>>
>>>>> Uros, any idea how to accomplish this?  Or is the idea of a "local" ifunc
>>>>> better?  Note the ABI boundary will be expensive but I guess the conditional
>>>>> sequence as well (and it will disturb RA even if predicted to have SSE 4.1).
>>>>
>>>> TARGET_ROUND is just:
>>>>
>>>> /* SSE4.1 defines round instructions */
>>>> #define    OPTION_MASK_ISA_ROUND    OPTION_MASK_ISA_SSE4_1
>>>> #define    TARGET_ISA_ROUND    ((ix86_isa_flags & OPTION_MASK_ISA_ROUND) != 0)
>>>>
>>>> I don't remember the history around the #define, once upon a time
>>>> probably made sense, but nowadays it looks that it can be simply
>>>> substituted with TARGET_SSE4_1.
>>>
>>> Sure but we want the backend to use a TARGET_ROUND guarded define_insn
>>> when TARGET_ROUND is false but inside a runtime conditional ensuring that
>>> TARGET_ROUND is satisfied.  With doing this with ifuncs we'd mark the function
>>> with a proper target attribute but within a function?
>>
>> How about something intrinsic headers are using?
>
> (... somehow managed to press send too early ...)
>
> There we use GCC_push_options and GCC_target pragmas. Maybe we also
> need corresponding __ROUND__ define defined by the compiler.

Those don't work inside a function.  Remember I want to change the expander
of ceil () to

 if (__builtin_cpu_supports ("sse4.1"))
   ceil_for_sse4.1 ();
 else
   ceil ();

from the x86 target code that expands ceil for ! TARGET_ROUND.  I suppose
we could simply use a separate pattern for SSE 4.1 roundsd here (does it
have to be an unspec?  I suppose so to prevent it from being generated by
other means and to prevent code motion out of the conditional?)

Or forgo with the idea to use inline conditional code and emit an ifunc
dispatcher, a function with the sse4.1 instruction, and a call to the dispatcher
ourselves.

Richard.

> Uros.

  reply	other threads:[~2017-08-16 10:56 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-26  8:32 Joseph Myers
2016-05-26 17:39 ` Uros Bizjak
2016-05-27  6:14   ` Jan Hubicka
2016-05-27  9:03     ` Joseph Myers
2016-06-02 11:54       ` Ping " Joseph Myers
2016-06-02 12:00         ` Jan Hubicka
2016-06-02 12:24           ` Bernd Schmidt
2016-06-02 12:29             ` Joseph Myers
2016-06-02 12:32           ` Joseph Myers
2017-08-15 14:11       ` Martin Jambor
2017-08-15 14:52         ` Joseph Myers
2017-09-13 17:34           ` Martin Jambor
2017-09-13 17:47             ` Joseph Myers
2017-09-14 10:04             ` Richard Biener
2017-09-14 16:50               ` Jan Hubicka
2017-08-15 15:01         ` Richard Biener
2017-08-15 16:10           ` Richard Biener
2017-08-15 16:26             ` Richard Biener
2017-08-15 21:20               ` Uros Bizjak
2017-08-16 10:51                 ` Richard Biener
2017-08-16 11:04                   ` Uros Bizjak
2017-08-16 13:32                     ` Uros Bizjak
2017-08-16 13:40                       ` Richard Biener [this message]
2017-08-16 14:01                         ` Uros Bizjak

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