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From: Richard Biener <>
To: Andrew Stubbs <>,
	Richard Sandiford <>
Cc: "" <>
Subject: Re: [PATCH] vect: while_ult for integer mask
Date: Thu, 29 Sep 2022 09:52:34 +0200	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

On Wed, Sep 28, 2022 at 5:06 PM Andrew Stubbs <> wrote:
> This patch is a prerequisite for some amdgcn patches I'm working on to
> support shorter vector lengths (having fixed 64 lanes tends to miss
> optimizations, and masking is not supported everywhere yet).
> The problem is that, unlike AArch64, I'm not using different mask modes
> for different sized vectors, so all loops end up using the while_ultsidi
> pattern, regardless of vector length.  In theory I could use SImode for
> V32, HImode for V16, etc., but there's no mode to fit V4 or V2 so
> something else is needed.  Moving to using vector masks in the backend
> is not a natural fit for GCN, and would be a huge task in any case.
> This patch adds an additional length operand so that we can distinguish
> the different uses in the back end and don't end up with more lanes
> enabled than there ought to be.
> I've made the extra operand conditional on the mode so that I don't have
> to modify the AArch64 backend; that uses while_<cond> family of
> operators in a lot of places and uses iterators, so it would end up
> touching a lot of code just to add an inactive operand, plus I don't
> have a way to test it properly.  I've confirmed that AArch64 builds and
> expands while_ult correctly in a simple example.
> OK for mainline?

Hmm, but you could introduce BI4mode and BI2mode for V4 and V2, no?
Not sure if it is possible to have two partial integer modes and use those.


> Thanks
> Andrew

  reply	other threads:[~2022-09-29  7:52 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-28 15:05 Andrew Stubbs
2022-09-29  7:52 ` Richard Biener [this message]
2022-09-29  9:24   ` Richard Sandiford
2022-09-29  9:37     ` Richard Biener
2022-09-29  9:38     ` juzhe.zhong
2022-09-29  9:56     ` Andrew Stubbs
2022-09-29 10:17       ` Richard Sandiford
2022-09-29 13:46         ` Richard Biener
2022-10-03 14:27           ` Andrew Stubbs
2022-09-29  9:50   ` Andrew Stubbs

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