From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by sourceware.org (Postfix) with ESMTPS id 3F4963858402 for ; Wed, 13 Oct 2021 08:29:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 3F4963858402 Received: by mail-ed1-x52a.google.com with SMTP id z20so6713233edc.13 for ; Wed, 13 Oct 2021 01:29:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=85tirl5GHHSEfBYsSrysJ6wW6GeemdPf/44Vhy7sZU8=; b=3AzHJmhFgMqnkDkKJxMt7Q0LSaV59ii3LgtdE7K67gqunrOFrKxK+GPtn2mQ1VHLJa u1rCRmyEA/nsdoMOqI1LlV+84VdwZOgp8O/k5oiuS6bBRqpQaj99GOUB15oeOrqhEiJe 67ed/Ni8lEeszOkfFEAIxtBp5jFfBP+GXQ/113VmCEz4679ir1ThLsL8uf86l1A4PMw0 v6w0kPYgStdYnAzbG5oWfi0eEC8IfF6eooHv8dt8jkC3yqcM5+u0at64ORUxLZNyH9UE 51FJ3/+USfVV12g0RRZTmpYxwRM/uFHAWjleJ2mTM0IioVVNCuXqgyeK0LviZtcJQfy+ SysQ== X-Gm-Message-State: AOAM531E+52rB993judpAnLgDMSI1B2S2MPbglZLy2dKOJG3WKymgD0P olHymAdr91AEEB0hpClo/Y0DeGQoF6/Sj/j1TZBOH6IA X-Google-Smtp-Source: ABdhPJw/7fbtRftFI2Y3SPq8k3Cj/fWkDESSb4XHlumfDMk3uliUOdoR03J2V7WIlnRMNIX0HwoQamhu7serbgLmqfM= X-Received: by 2002:a05:6402:35cb:: with SMTP id z11mr7895399edc.342.1634113777039; Wed, 13 Oct 2021 01:29:37 -0700 (PDT) MIME-Version: 1.0 References: <6bb3303f-2a46-22fb-2257-a4e8eec6ffb4@linux.ibm.com> In-Reply-To: <6bb3303f-2a46-22fb-2257-a4e8eec6ffb4@linux.ibm.com> From: Richard Biener Date: Wed, 13 Oct 2021 10:29:26 +0200 Message-ID: Subject: Re: [PATCH, rs6000] Disable gimple fold for float or double vec_minmax when fast-math is not set To: HAO CHEN GUI Cc: gcc-patches , Bill Schmidt , Segher Boessenkool Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 13 Oct 2021 08:29:40 -0000 On Wed, Oct 13, 2021 at 9:43 AM HAO CHEN GUI wrote: > > Richard, > > Thanks so much for your comments. > > As far as I know, VSX/altivec min/max instructions don't conform with = C-Sytle Min/Max Macro. The fold converts it to MIN/MAX_EXPR then it has a c= hance to be implemented by scalar min/max instructions which conform with C= -Sytle Min/Max Macro. That's why I made this patch. > > As to IEEE behavior, do you mean "Minimum and maximum operations" defi= ned in IEEE-754 2019? If so, I think VSX/altivec min/max instructions don'= t conform with it. It demands a quite NaN if either operand is a NaN while = our instructions don't. > > IEEE-754 2019 maximum(x, y) is xif x>y, yif y>x, and a quiet NaN if eithe= r operand is a NaN, according to 6.2. For this operation, +0 compares great= er than =E2=88=920. Otherwise (i.e., when x=3Dy and signs are the same) it = is either xor y. Actions for xvmaxdp Hmm, then I do not understand the reason for the patch - people using the intrinsics cannot expect IEEE semantics then. So you are concerned that people don't get the 1:1 machine instruction but eventually the IEEE conforming MIN/MAX_EXPR? But that can then still happen with -ffast-math so I wonder what's the poin= t. Richard. > On 12/10/2021 =E4=B8=8B=E5=8D=88 5:57, Richard Biener wrote: > > On Tue, Oct 12, 2021 at 10:59 AM HAO CHEN GUI via Gcc-patches > > wrote: > >> Hi, > >> > >> This patch disables gimple folding for float or double vec_min/ma= x when fast-math is not set. It makes vec_min/max conform with the guide. > >> > >> Bootstrapped and tested on powerpc64le-linux with no regressions. Is t= his okay for trunk? Any recommendations? Thanks a lot. > >> > >> I re-send the patch as previous one is messed up in email thread.= Sorry for that. > > If the VSX/altivec min/max instructions conform to IEEE behavior then > > you could instead fold > > to .F{MIN,MAX} internal functions and define the f{min,max} optabs. > > > > Otherwise the patch looks correct to me - MIN_EXPR and MAX_EXPR are > > not IEEE conforming. > > Note a better check would be to use HONOR_NANS/HONOR_SIGNED_ZEROS on > > the argument type > > (that also works for the integer types with the obvious answer). > > > > Richard. > > > >> ChangeLog > >> > >> 2021-08-25 Haochen Gui > >> > >> gcc/ > >> * config/rs6000/rs6000-call.c (rs6000_gimple_fold_builtin): > >> Modify the VSX_BUILTIN_XVMINDP, ALTIVEC_BUILTIN_VMINFP, > >> VSX_BUILTIN_XVMAXDP, ALTIVEC_BUILTIN_VMAXFP expansions. > >> > >> gcc/testsuite/ > >> * gcc.target/powerpc/vec-minmax-1.c: New test. > >> * gcc.target/powerpc/vec-minmax-2.c: Likewise. > >> > >> > >> patch.diff > >> > >> diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs600= 0-call.c > >> index b4e13af4dc6..90527734ceb 100644 > >> --- a/gcc/config/rs6000/rs6000-call.c > >> +++ b/gcc/config/rs6000/rs6000-call.c > >> @@ -12159,6 +12159,11 @@ rs6000_gimple_fold_builtin (gimple_stmt_itera= tor *gsi) > >> return true; > >> /* flavors of vec_min. */ > >> case VSX_BUILTIN_XVMINDP: > >> + case ALTIVEC_BUILTIN_VMINFP: > >> + if (!flag_finite_math_only || flag_signed_zeros) > >> + return false; > >> + /* Fall through to MIN_EXPR. */ > >> + gcc_fallthrough (); > >> case P8V_BUILTIN_VMINSD: > >> case P8V_BUILTIN_VMINUD: > >> case ALTIVEC_BUILTIN_VMINSB: > >> @@ -12167,7 +12172,6 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterat= or *gsi) > >> case ALTIVEC_BUILTIN_VMINUB: > >> case ALTIVEC_BUILTIN_VMINUH: > >> case ALTIVEC_BUILTIN_VMINUW: > >> - case ALTIVEC_BUILTIN_VMINFP: > >> arg0 =3D gimple_call_arg (stmt, 0); > >> arg1 =3D gimple_call_arg (stmt, 1); > >> lhs =3D gimple_call_lhs (stmt); > >> @@ -12177,6 +12181,11 @@ rs6000_gimple_fold_builtin (gimple_stmt_itera= tor *gsi) > >> return true; > >> /* flavors of vec_max. */ > >> case VSX_BUILTIN_XVMAXDP: > >> + case ALTIVEC_BUILTIN_VMAXFP: > >> + if (!flag_finite_math_only || flag_signed_zeros) > >> + return false; > >> + /* Fall through to MAX_EXPR. */ > >> + gcc_fallthrough (); > >> case P8V_BUILTIN_VMAXSD: > >> case P8V_BUILTIN_VMAXUD: > >> case ALTIVEC_BUILTIN_VMAXSB: > >> @@ -12185,7 +12194,6 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterat= or *gsi) > >> case ALTIVEC_BUILTIN_VMAXUB: > >> case ALTIVEC_BUILTIN_VMAXUH: > >> case ALTIVEC_BUILTIN_VMAXUW: > >> - case ALTIVEC_BUILTIN_VMAXFP: > >> arg0 =3D gimple_call_arg (stmt, 0); > >> arg1 =3D gimple_call_arg (stmt, 1); > >> lhs =3D gimple_call_lhs (stmt); > >> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c b/gcc/tes= tsuite/gcc.target/powerpc/vec-minmax-1.c > >> new file mode 100644 > >> index 00000000000..547798fd65c > >> --- /dev/null > >> +++ b/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c > >> @@ -0,0 +1,53 @@ > >> +/* { dg-do compile { target { powerpc*-*-* } } } */ > >> +/* { dg-require-effective-target powerpc_p9vector_ok } */ > >> +/* { dg-options "-O2 -mdejagnu-cpu=3Dpower9" } */ > >> +/* { dg-final { scan-assembler-times {\mxvmaxdp\M} 1 } } */ > >> +/* { dg-final { scan-assembler-times {\mxvmaxsp\M} 1 } } */ > >> +/* { dg-final { scan-assembler-times {\mxvmindp\M} 1 } } */ > >> +/* { dg-final { scan-assembler-times {\mxvminsp\M} 1 } } */ > >> + > >> +/* This test verifies that float or double vec_min/max are bound to > >> + xv[min|max][d|s]p instructions when fast-math is not set. */ > >> + > >> + > >> +#include > >> + > >> +#ifdef _BIG_ENDIAN > >> + const int PREF_D =3D 0; > >> +#else > >> + const int PREF_D =3D 1; > >> +#endif > >> + > >> +double vmaxd (double a, double b) > >> +{ > >> + vector double va =3D vec_promote (a, PREF_D); > >> + vector double vb =3D vec_promote (b, PREF_D); > >> + return vec_extract (vec_max (va, vb), PREF_D); > >> +} > >> + > >> +double vmind (double a, double b) > >> +{ > >> + vector double va =3D vec_promote (a, PREF_D); > >> + vector double vb =3D vec_promote (b, PREF_D); > >> + return vec_extract (vec_min (va, vb), PREF_D); > >> +} > >> + > >> +#ifdef _BIG_ENDIAN > >> + const int PREF_F =3D 0; > >> +#else > >> + const int PREF_F =3D 3; > >> +#endif > >> + > >> +float vmaxf (float a, float b) > >> +{ > >> + vector float va =3D vec_promote (a, PREF_F); > >> + vector float vb =3D vec_promote (b, PREF_F); > >> + return vec_extract (vec_max (va, vb), PREF_F); > >> +} > >> + > >> +float vminf (float a, float b) > >> +{ > >> + vector float va =3D vec_promote (a, PREF_F); > >> + vector float vb =3D vec_promote (b, PREF_F); > >> + return vec_extract (vec_min (va, vb), PREF_F); > >> +} > >> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c b/gcc/tes= tsuite/gcc.target/powerpc/vec-minmax-2.c > >> new file mode 100644 > >> index 00000000000..4c6f4365830 > >> --- /dev/null > >> +++ b/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c > >> @@ -0,0 +1,51 @@ > >> +/* { dg-do compile { target { powerpc*-*-* } } } */ > >> +/* { dg-require-effective-target powerpc_p9vector_ok } */ > >> +/* { dg-options "-O2 -mdejagnu-cpu=3Dpower9 -ffast-math" } */ > >> +/* { dg-final { scan-assembler-times {\mxsmaxcdp\M} 2 } } */ > >> +/* { dg-final { scan-assembler-times {\mxsmincdp\M} 2 } } */ > >> + > >> +/* This test verifies that float or double vec_min/max can be convert= ed > >> + to scalar comparison when fast-math is set. */ > >> + > >> + > >> +#include > >> + > >> +#ifdef _BIG_ENDIAN > >> + const int PREF_D =3D 0; > >> +#else > >> + const int PREF_D =3D 1; > >> +#endif > >> + > >> +double vmaxd (double a, double b) > >> +{ > >> + vector double va =3D vec_promote (a, PREF_D); > >> + vector double vb =3D vec_promote (b, PREF_D); > >> + return vec_extract (vec_max (va, vb), PREF_D); > >> +} > >> + > >> +double vmind (double a, double b) > >> +{ > >> + vector double va =3D vec_promote (a, PREF_D); > >> + vector double vb =3D vec_promote (b, PREF_D); > >> + return vec_extract (vec_min (va, vb), PREF_D); > >> +} > >> + > >> +#ifdef _BIG_ENDIAN > >> + const int PREF_F =3D 0; > >> +#else > >> + const int PREF_F =3D 3; > >> +#endif > >> + > >> +float vmaxf (float a, float b) > >> +{ > >> + vector float va =3D vec_promote (a, PREF_F); > >> + vector float vb =3D vec_promote (b, PREF_F); > >> + return vec_extract (vec_max (va, vb), PREF_F); > >> +} > >> + > >> +float vminf (float a, float b) > >> +{ > >> + vector float va =3D vec_promote (a, PREF_F); > >> + vector float vb =3D vec_promote (b, PREF_F); > >> + return vec_extract (vec_min (va, vb), PREF_F); > >> +} > >>