From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by sourceware.org (Postfix) with ESMTPS id E23823861860 for ; Thu, 15 Feb 2024 10:08:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E23823861860 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E23823861860 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::12d ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707991713; cv=none; b=ij2Cuv7Ysf9uGZ57FqYy9/akZcAdUX9ZJtS4oS4d1rlYwaZf5xPcxUUlLmvMIcz6AQOWuO+PzfSrlfmWVgHiOwNQzME6Yrn6sB28n6w4SxAleZuBbsah1WCH4UUBmYJq+7Y3QAhD65PXT1H+FgmLnNsK2Ca1aqxvoQothDiSPss= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707991713; c=relaxed/simple; bh=hZrs1p0VSvXlE9EEZO4uBVeogTzQhDdSvg0OQDLcyOQ=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=dPaRIPxyvR2Bk1fOXWW/d6IpEFrEAoggME34KQUnbfXCyn1tYRYgVrw1PIfPLSD8snokScQzndi5X/ebJP96ne/eDlnXghjLhNj+ib8KVzfhqmp0YxoRRD0bPeNPVa2Cs4oxcvJjRxQvi3oH822yES8WM9UVO38OFcTq63Yp3cU= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-51182ece518so788366e87.3 for ; Thu, 15 Feb 2024 02:08:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1707991708; x=1708596508; darn=gcc.gnu.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=nZ7phSLt5IaRzDeuBrTGKO85md92wezKsm8/b4eAfiQ=; b=D2npK5qYd+U4SjakyMKOfRPl+t6eTKdaR6kawryWIKPDWmh++uO+djvKLkGumXGgTX l+tPjGwvhYSzUukXbmSPqDIoJ4pYqkoSniwbtWWcgkHEtjPLSPTUC9OQp6tfMksxBvRT JDlJ6OaosLE0NgtBH8nKKLDBhjF23/LuWxkmtHSVWQdCstE0Ia/Dx5CCux5WuVmL4HS6 v/I4/F1ceZqlAuQ/byWoMqBb9rUEC1ZHf3rRLRgzMcRF17tMV62CDeWosTW0OhVKeE2W ur7rgo/1KTAWV2c1H5Vc8VXxJEti2NButt1mSihjnX/BvUzLS+X/lrLmD8TAkSgDDY14 lCAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707991708; x=1708596508; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nZ7phSLt5IaRzDeuBrTGKO85md92wezKsm8/b4eAfiQ=; b=Y9cwToPo1AY45usScgEcAvTUtqAOHKXW71umlCBbpdNPPrGqD8L8OTy4kKsvPxcVsT 4EE78bVT/g2pHa1SOKr8g9TC9Ovz8xhgmFIeM/H3qcfMoYB4jHP0Tf/gijTWmNGDIfL2 /W12Txfucbasl6Y0PHHYqI03cu3Hj2Jo/4kj5TCxuzR4C9li5/H2hs2w5FmsNH+DKH+W WkLi3fB4DgVNbLX1F7sk/H3WYUXiM1X4ZGgd/sDOZnCP/ZRgNHGASiL+0p2YUDIMbb8s 3lhludcDzNP/phKmmphpZwMsi8qSc/anMLeg95bHxxgChn14beXNIzLhOWJ2lgfOPqsy yx4Q== X-Gm-Message-State: AOJu0YzXW34dYNiKlKcEPX2M/y2Jc2f0tF1/sG4nr370Pf0CNgcipAdH piMMs5icsOooEXiCjuEKlRQ35LAtLXOUSz8fJ2HoVAvJxZtOhWdRagNcgg2f2UwuXg1kqsrWpOY UZ9dZpl+Zi3IYKcldTtIh8g/bcngPoRNS X-Google-Smtp-Source: AGHT+IE6YODIeZhYTNExo3dLuIsdvsG6gDpL8i4eq3lANOyzXehyXrNmf6YhbTdq6rjKm5Ea1eMoVpHV5+HwwYV7MXM= X-Received: by 2002:a05:651c:1a06:b0:2d2:d8c:d7f0 with SMTP id by6-20020a05651c1a0600b002d20d8cd7f0mr629143ljb.25.1707991708003; Thu, 15 Feb 2024 02:08:28 -0800 (PST) MIME-Version: 1.0 References: <20240214231521.1995779-1-quic_apinski@quicinc.com> <20240214231521.1995779-2-quic_apinski@quicinc.com> In-Reply-To: <20240214231521.1995779-2-quic_apinski@quicinc.com> From: Richard Biener Date: Thu, 15 Feb 2024 11:08:16 +0100 Message-ID: Subject: Re: [PATCH 1/2] doc: Fix some standard named pattern documentation modes To: Andrew Pinski Cc: gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, Feb 15, 2024 at 12:16=E2=80=AFAM Andrew Pinski wrote: > > Currently these use `@var{m3}` but the 3 here is a literal 3 > and not part of the mode itself so it should not be inside > the var. Fixed as such. > > Built the documentation to make sure it looks correct now. OK > gcc/ChangeLog: > > * doc/md.texi (widen_ssum, widen_usum, smulhs, umulhs, > smulhrs, umulhrs, sdiv_pow2): Move the 3 outside of the > var. > > Signed-off-by: Andrew Pinski > --- > gcc/doc/md.texi | 32 ++++++++++++++++---------------- > 1 file changed, 16 insertions(+), 16 deletions(-) > > diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi > index b0c61925120..274dd03d419 100644 > --- a/gcc/doc/md.texi > +++ b/gcc/doc/md.texi > @@ -5798,19 +5798,19 @@ is of a wider mode, is computed and added to oper= and 3. Operand 3 is of a mode > equal or wider than the mode of the absolute difference. The result is p= laced > in operand 0, which is of the same mode as operand 3. > > -@cindex @code{widen_ssum@var{m3}} instruction pattern > -@cindex @code{widen_usum@var{m3}} instruction pattern > -@item @samp{widen_ssum@var{m3}} > -@itemx @samp{widen_usum@var{m3}} > +@cindex @code{widen_ssum@var{m}3} instruction pattern > +@cindex @code{widen_usum@var{m}3} instruction pattern > +@item @samp{widen_ssum@var{m}3} > +@itemx @samp{widen_usum@var{m}3} > Operands 0 and 2 are of the same mode, which is wider than the mode of > operand 1. Add operand 1 to operand 2 and place the widened result in > operand 0. (This is used express accumulation of elements into an accumu= lator > of a wider mode.) > > -@cindex @code{smulhs@var{m3}} instruction pattern > -@cindex @code{umulhs@var{m3}} instruction pattern > -@item @samp{smulhs@var{m3}} > -@itemx @samp{umulhs@var{m3}} > +@cindex @code{smulhs@var{m}3} instruction pattern > +@cindex @code{umulhs@var{m}3} instruction pattern > +@item @samp{smulhs@var{m}3} > +@itemx @samp{umulhs@var{m}3} > Signed/unsigned multiply high with scale. This is equivalent to the C co= de: > @smallexample > narrow op0, op1, op2; > @@ -5820,10 +5820,10 @@ op0 =3D (narrow) (((wide) op1 * (wide) op2) >> (N= / 2 - 1)); > where the sign of @samp{narrow} determines whether this is a signed > or unsigned operation, and @var{N} is the size of @samp{wide} in bits. > > -@cindex @code{smulhrs@var{m3}} instruction pattern > -@cindex @code{umulhrs@var{m3}} instruction pattern > -@item @samp{smulhrs@var{m3}} > -@itemx @samp{umulhrs@var{m3}} > +@cindex @code{smulhrs@var{m}3} instruction pattern > +@cindex @code{umulhrs@var{m}3} instruction pattern > +@item @samp{smulhrs@var{m}3} > +@itemx @samp{umulhrs@var{m}3} > Signed/unsigned multiply high with round and scale. This is > equivalent to the C code: > @smallexample > @@ -5834,10 +5834,10 @@ op0 =3D (narrow) (((((wide) op1 * (wide) op2) >> = (N / 2 - 2)) + 1) >> 1); > where the sign of @samp{narrow} determines whether this is a signed > or unsigned operation, and @var{N} is the size of @samp{wide} in bits. > > -@cindex @code{sdiv_pow2@var{m3}} instruction pattern > -@cindex @code{sdiv_pow2@var{m3}} instruction pattern > -@item @samp{sdiv_pow2@var{m3}} > -@itemx @samp{sdiv_pow2@var{m3}} > +@cindex @code{sdiv_pow2@var{m}3} instruction pattern > +@cindex @code{sdiv_pow2@var{m}3} instruction pattern > +@item @samp{sdiv_pow2@var{m}3} > +@itemx @samp{sdiv_pow2@var{m}3} > Signed division by power-of-2 immediate. Equivalent to: > @smallexample > signed op0, op1; > -- > 2.43.0 >