From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by sourceware.org (Postfix) with ESMTPS id DD2AE3858D20 for ; Fri, 31 Mar 2023 08:52:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DD2AE3858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-lf1-x12b.google.com with SMTP id g17so27991607lfv.4 for ; Fri, 31 Mar 2023 01:52:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1680252732; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=3VscPaeZnYiyOyS0L38vN7wKEmuFp8vR/3eueC3gvUc=; b=p/qETd8/syJ1L/m5WXJBsP8px7yjG5y94i/AinmXbbwa00ZOCWCRpdE7+arXU4voGC lXyrVUyA4C1G938VMcwE3+9pik56qtfsl0PunxEYKPhyhzTCJ1o2Gw+Qv9HeiRh/1d0S L2/q3OVOsby91swqHkfc4xfpApZmCb9NwfA5sEj8I7+54jC6vbF1ZCNGFMQ8Qutv8biS 8nQlc2mQxbuR9Ft1fGRqfGEpz3FBRl/N1tFaKAEYapaxFkrPu+ujHPnzZ/Wwtdgt/uk4 2LEj/6DqjvgJklhDQdVFZVSKjFzZNB1I6YkMNn6O2xMPnPPRL2zqNVvPUBo8MCyR3o8N prqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680252732; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3VscPaeZnYiyOyS0L38vN7wKEmuFp8vR/3eueC3gvUc=; b=i7l0LYD5ucBE6+T5v+LTeM/yJj0P7iyCZP/c+Xk1JdTb2V0qr60Q0zs8mS9l9JfXJY ezhRXklXM4Hn+eHvFDOkv0TqeLN7HEjmlNS3HAFQD/U4sYHpkjtqSh6/WETt1lA/cPg7 i9DcLC3Z6d/1ab5UW44Va+tGV7NVSAY3ecEA+jwjZQvvtP/itzLXaqV63oGkkMNfwCvF 1MCXjkjLTypyAn+2/k8gpa7gNLlKgaPgG+gKBC9XLDOlZziES24K4XWP2qMR1ZE0cUJu /yYyXH0PwlMJBICYfRtaZz8NNl65ddqV3v7wg26ho1BmUR4hp8+QyZTeHfWosApxva6u iehQ== X-Gm-Message-State: AAQBX9doWeQwFWHjiSVnJZUxZgEJnvQegCr3Z1wqAwxIJeHYBUfOCaTm Ry8+OFRrXIk0SwKRSlENGweldqSEVGi8XTfVuGQ= X-Google-Smtp-Source: AKy350bMBpf7dFcCiy1oVz2AexYCLUw8uFcPxa2kj/N4LO6w7LHsYrTMm5QjRHTkFhXlmEvhhNMMOm82TPSvKhScqaA= X-Received: by 2002:a05:6512:3703:b0:4e8:6261:7dd0 with SMTP id z3-20020a056512370300b004e862617dd0mr3927173lfr.4.1680252731970; Fri, 31 Mar 2023 01:52:11 -0700 (PDT) MIME-Version: 1.0 References: <20230331065810.4012545-1-hongtao.liu@intel.com> In-Reply-To: <20230331065810.4012545-1-hongtao.liu@intel.com> From: Richard Biener Date: Fri, 31 Mar 2023 10:51:58 +0200 Message-ID: Subject: Re: [PATCH] Document signbitm2. To: liuhongt Cc: gcc-patches@gcc.gnu.org, crazylht@gmail.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, Mar 31, 2023 at 8:59=E2=80=AFAM liuhongt via Gcc-patches wrote: > > Look through all backends which defined signbitm2. > 1. When m is a scalar mode, the dest is SImode. > 2. When m is a vector mode, the dest mode is the vector integer > mode has the same size and elements number as m. > > Ok for trunk? OK. > gcc/ChangeLog: > > * doc/md.texi: Document signbitm2. > --- > gcc/doc/md.texi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi > index 8e3113599fd..edfa51e867a 100644 > --- a/gcc/doc/md.texi > +++ b/gcc/doc/md.texi > @@ -6030,6 +6030,17 @@ floating-point mode. > > This pattern is not allowed to @code{FAIL}. > > +@cindex @code{signbit@var{m}2} instruction pattern > +@item @samp{signbit@var{m}2} > +Store the sign bit of floating-point operand 1 in operand 0. > +@var{m} is either a scalar or vector mode. When it is a scalar, > +operand 1 has mode @var{m} but operand 0 must have mode @code{SImode}. > +When @var{m} is a vector, operand 1 has the mode @var{m}. > +operand 0's mode should be an vector integer mode which has > +the same number of elements and the same size as mode @var{m}. > + > +This pattern is not allowed to @code{FAIL}. > + > @cindex @code{significand@var{m}2} instruction pattern > @item @samp{significand@var{m}2} > Store the significand of floating-point operand 1 in operand 0. > -- > 2.39.1.388.g2fc9e9ca3c >