From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by sourceware.org (Postfix) with ESMTPS id 9EE9F3858C00 for ; Thu, 29 Jun 2023 11:25:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 9EE9F3858C00 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-lj1-x22c.google.com with SMTP id 38308e7fff4ca-2b69ea3b29fso8074891fa.3 for ; Thu, 29 Jun 2023 04:25:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688037932; x=1690629932; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=F+cEdw0FhZt/lWy/vhzoQbVSaXnj/vR8LPdbsZJM08w=; b=NF4ufE3Hl03tQ8xLHPw1QVw1OBJimecwcDD+AVdnPNZmpx4SMUCO9nrXXi1EKrvnMa QbdfaCHpIEI1CMuiM5f+Qt+bpski0PHQguPdpQg/UctSJPs1rBOpij26/OfI2g7eYaia Bq8JNwu7MwYNK9wYnaZTag5nIlW3Fzy7gEzlpNRtY3guKxJRnoQ/Q+kbRI69Yh4Keaey s236o78R2YLMXZInCGlYPa2ew1V5B04wWuhq/2PO63H4J/83gWF6F+lWywuRnt8LY6U6 9b6y8VHD/+vrRgIAdqBtnLQNo3J0PO9fkDfPS5h5glFJFtMye4VDHFPActOXCWe7WxAH j7MQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688037932; x=1690629932; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=F+cEdw0FhZt/lWy/vhzoQbVSaXnj/vR8LPdbsZJM08w=; b=GpIGE9HbROwzuuiUgN3+suE0qri49eKXuN36+AQL53yVIjB/dnqeBZobTessqm3Zpp owTa2ZyoDtaP3UfwSZTmXD72jiKZ8tEK4WsyyVgv8fRTNwzcsY8AUglQJ40tD4QL9L8u lwLxrZ3VpFSl17a+Xd65ivdIeA7nP1LFK/JRf2DYA1SErXiRMR3eRA4XyhTPmiwhcO06 O5Ix9lwrJbSF2RJqM41CsDRYUhoS2dytNnQruILIQSNL5kM7F8NVBzu17mGhEyvw9RwY Re2QT8FQyaHvfKPTFfdtxm6gE+Dq40gCZNVJdAfKEcqGClpLIo2r/fe0KN99Svzwe2vW GuqQ== X-Gm-Message-State: AC+VfDxcInAlbmtK1R5nvC6RJXUXh9NFup+AdHhy17qowGV4ngJSBPRP 9UHjpn8D0gcCaV7YKl0v6NrjNZdSsByvdaiX8X8= X-Google-Smtp-Source: ACHHUZ7FigugO+CTHuB6SNSiJ0Jh+qKaP9FZES43ItaEStlYsj9HFgqs4v6lLhJs4VH5j+5KzfoDP17+Ey7pkt/suJ8= X-Received: by 2002:a2e:9255:0:b0:2b6:9f4a:fce2 with SMTP id v21-20020a2e9255000000b002b69f4afce2mr7600816ljg.7.1688037931832; Thu, 29 Jun 2023 04:25:31 -0700 (PDT) MIME-Version: 1.0 References: <20230628094752.332289-1-juzhe.zhong@rivai.ai> <59DD619A76E2AC1A+2023062903025467496516@rivai.ai> <0f48c2b7-a24d-6223-3805-d755c8eb7a7c@gmail.com> <85bfdc0a-6b55-a72c-b8d8-656b40b0003a@gmail.com> In-Reply-To: From: Richard Biener Date: Thu, 29 Jun 2023 13:22:22 +0200 Message-ID: Subject: Re: [PATCH V3] RISC-V: Fix bug of pre-calculated const vector mask for VNx1BI, VNx2BI and VNx4BI To: Robin Dapp Cc: Robin Dapp via Gcc-patches , =?UTF-8?B?6ZKf5bGF5ZOy?= , Jeff Law , "kito.cheng" , "kito.cheng" , palmer , palmer , richard.sandiford@arm.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, Jun 29, 2023 at 11:10=E2=80=AFAM Robin Dapp via Gcc-patches wrote: > > > Yeah, that part is OK, and was the case I was thinking about when > > I said OK yesterday. But now that we allow BITSIZE !=3D PRECISION, > > it's possible for BITSIZE - PRECISION to be more than a full byte, > > in which case the new loop would not initialise every byte of > > the mode. > > Ah, I see, so when e.g. BITSIZE =3D=3D 16 and PRECISION =3D=3D 1. Luckil= y > this cannot happen with RVV as all we do is adjust the precision > of the modes that have BITSIZE =3D=3D 8. I'm going to add an assert. > Juzhe would rather work around that in the backend, though. > > The other thing I just noticed is > > tree > build_truth_vector_type_for_mode (poly_uint64 nunits, machine_mode mask_m= ode) > { > gcc_assert (mask_mode !=3D BLKmode); > > unsigned HOST_WIDE_INT esize; > if (VECTOR_MODE_P (mask_mode)) > { > poly_uint64 vsize =3D GET_MODE_BITSIZE (mask_mode); > esize =3D vector_element_size (vsize, nunits); > } > else > esize =3D 1; > > tree bool_type =3D build_nonstandard_boolean_type (esize); > > return make_vector_type (bool_type, nunits, mask_mode); > } > > which gives us wrong precision as we rely on the BITSIZE here as well. > This results in a precision of 1 for VNx8BI, 2 for VNx4BI and 4 for > VNx2BI. This should probably use GET_MODE_PRECISION as well. OK if it bootstraps/tests on both aarch64 and riscv. Richard. > > Maybe this isn't a problem per se but to me it appears > just wrong. > > Regards > Robin >