From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by sourceware.org (Postfix) with ESMTPS id 6B5F63858C20 for ; Fri, 28 Oct 2022 08:41:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6B5F63858C20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ed1-x52e.google.com with SMTP id a5so6838675edb.11 for ; Fri, 28 Oct 2022 01:41:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=sIQM9NiwAJizDyVqzkl32Yr+QK7CiflT/xoJIQJIBfo=; b=AErVpQwUm74pQQlJHG9yPxrtD9b8OamsICYeUMj+sD0NcAOjyOzv0SJ6HkRXyWpbrG y/qZa/d4Ii8ceKsY4Rgvsem+qeytY3CBfbUXZ3d4ggIO096Vs+Rj8/2S1dsSbcYZxQp0 TlMUQd+96dt+DeD5wfOYdr/wuTnrYuvhUP71NkPRyZbETnbRvMHUNF6i7Pd/kAACH9YP hvbjdBmjalBxFJt2ZRFpebHY4GTaCnD0aTxVb6ObgjYAkGjYIUZ2CiscY0QGpPZxOymp jIsrQEY7XL0uTvLfYlbxYoDJJKjLaggmp6Ao2tRTHfojCGor+rI7EXjppvMIgA0bVasF c9CA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sIQM9NiwAJizDyVqzkl32Yr+QK7CiflT/xoJIQJIBfo=; b=Dwrn+kOLO/F2dWu16Hw+XF0PBNtE/qu9ZOUGtpQt7+ebDKpX+BUCbi8qktwusVMBtf VxHnoKaw//3UwYv1tj+p6r78yPJT8KEN8h2M+gRL4Cjrh464uH4MVaRpexEvm8kvK71g ETfQXOmJxc03DbZr4YOGH1bRp6ZLGwLkdsYwDi+SyUn1jIwTUIF9vCsHREHTfeh23nm0 uT2Uio3Lh4Nv9fYow2OdAlsdqoC/Or/7lNVoA/vq/ZDvW6Mvrjo23N6MSCZZQz0Brl5z w+pqhjXNTRxs44tYCBekU8aw+qL0JC+mzAZut7os9Bqo4eId20Z0iX8IVFvVgULnIGoO ZqyA== X-Gm-Message-State: ACrzQf0yUNXs5wl0qUm/17gbVLpRnxANAv2TTSB+kOhViFvoresh4BGX Kem/lZTPBEF5XJzkPJGtuZuyqGvhRMZHNk/JD3E= X-Google-Smtp-Source: AMsMyM4+MqNsX1YFlrnckD84NZwNZrTfBQMEBqLw8nCQXfuFsys2C7Q+OQaAMlN+6RaChF6XBpxjW7foph1zOV8eb5I= X-Received: by 2002:a05:6402:3509:b0:45d:c25b:b80e with SMTP id b9-20020a056402350900b0045dc25bb80emr49939250edd.250.1666946501167; Fri, 28 Oct 2022 01:41:41 -0700 (PDT) MIME-Version: 1.0 References: <20221026055248.94100-1-hongyu.wang@intel.com> In-Reply-To: From: Richard Biener Date: Fri, 28 Oct 2022 10:41:29 +0200 Message-ID: Subject: Re: [PATCH] i386: Enable small loop unrolling for O2 To: Hongyu Wang Cc: Hongyu Wang , hongtao.liu@intel.com, gcc-patches@gcc.gnu.org, Andreas Krebbel , "Kewen.Lin" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-6.1 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_NUMSUBJECT,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, Oct 28, 2022 at 10:08 AM Hongyu Wang wrote= : > > > Ugh, that's all quite ugly and unmaintainable, no? > Agreed, I have the same feeling. > > > I'm quite sure that if this works it's not by intention. Doesn't this > > also disable > > register renaming and web when the user explicitely specifies -funroll-= loops? > > > > Doesn't this change -funroll-loops behavior everywhere, only unrolling = small > > loops? > > The ugly part ensures that -funroll-loops would not be affected at all > by -munroll-only-small-loops. > > > > > I'd like to see a -munroll-only-small-loops addition that doesn't have = any such > > effects. Note RTL unrolling could also > > conditionally enabled on a new -funroll-small-loops which wouldn't enab= le > > register renaming or web. > > Did you mean something like > > index b9e07973dd6..b707d4afb84 100644 > --- a/gcc/loop-init.cc > +++ b/gcc/loop-init.cc > @@ -567,7 +567,8 @@ public: > /* opt_pass methods: */ > bool gate (function *) final override > { > - return (flag_unroll_loops || flag_unroll_all_loops || cfun->has_un= roll); > + return (flag_unroll_loops || flag_unroll_all_loops || cfun->has_un= roll > + || flag_unroll_only_small_loops); > } > > then the backend can turn it on by default in O2? > I don't know if there is a way to turn on middle-end pass by > target-specific flags. There isn't, it would need to be a target hook. Currently only i386, rs600= 0 and s390 have loop_unroll_adjust. We could enable the pass conditional on implementing that hook (and optimize >=3D 2, hopefully the pass only unrolls loops that are optimized for speed)? > > Richard Biener via Gcc-patches =E4=BA=8E2022=E5= =B9=B410=E6=9C=8828=E6=97=A5=E5=91=A8=E4=BA=94 15:33=E5=86=99=E9=81=93=EF= =BC=9A > > > > On Wed, Oct 26, 2022 at 7:53 AM Hongyu Wang wro= te: > > > > > > Hi, > > > > > > Inspired by rs6000 and s390 port changes, this patch > > > enables loop unrolling for small size loop at O2 by default. > > > The default behavior is to unroll loop with unknown trip-count and > > > less than 4 insns by 1 time. > > > > > > This improves 548.exchange2 by 3.5% on icelake and 6% on zen3 with > > > 1.2% codesize increment. For other benchmarks the variants are minor > > > and overall codesize increased by 0.2%. > > > > > > The kernel image size increased by 0.06%, and no impact on eembc. > > > > > > Bootstrapped & regrtested on x86_64-pc-linux-gnu. > > > > > > Ok for trunk? > > > > > > gcc/ChangeLog: > > > > > > * common/config/i386/i386-common.cc (ix86_optimization_table)= : > > > Enable loop unroll and small loop unroll at O2 by default. > > > * config/i386/i386-options.cc > > > (ix86_override_options_after_change): > > > Disable small loop unroll when funroll-loops enabled, reset > > > cunroll_grow_size when it is not explicitly enabled. > > > (ix86_option_override_internal): Call > > > ix86_override_options_after_change instead of calling > > > ix86_recompute_optlev_based_flags and ix86_default_align > > > separately. > > > * config/i386/i386.cc (ix86_loop_unroll_adjust): Adjust unrol= l > > > factor if -munroll-only-small-loops enabled. > > > * config/i386/i386.opt: Add -munroll-only-small-loops, > > > -param=3Dx86-small-unroll-ninsns=3D for loop insn limit, > > > -param=3Dx86-small-unroll-factor=3D for unroll factor. > > > * doc/invoke.texi: Document -munroll-only-small-loops, > > > x86-small-unroll-ninsns and x86-small-unroll-factor. > > > > > > gcc/testsuite/ChangeLog: > > > > > > * gcc.target/i386/pr86270.c: Add -mno-unroll-only-small-loops= . > > > * gcc.target/i386/pr93002.c: Likewise. > > > --- > > > gcc/common/config/i386/i386-common.cc | 6 ++++ > > > gcc/config/i386/i386-options.cc | 40 ++++++++++++++++++++++-= -- > > > gcc/config/i386/i386.cc | 13 ++++++++ > > > gcc/config/i386/i386.opt | 13 ++++++++ > > > gcc/doc/invoke.texi | 14 +++++++++ > > > gcc/testsuite/gcc.target/i386/pr86270.c | 2 +- > > > gcc/testsuite/gcc.target/i386/pr93002.c | 2 +- > > > 7 files changed, 84 insertions(+), 6 deletions(-) > > > > > > diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/confi= g/i386/i386-common.cc > > > index d6a68dc9b1d..0e580b39d14 100644 > > > --- a/gcc/common/config/i386/i386-common.cc > > > +++ b/gcc/common/config/i386/i386-common.cc > > > @@ -1686,6 +1686,12 @@ static const struct default_options ix86_optio= n_optimization_table[] =3D > > > /* The STC algorithm produces the smallest code at -Os, for x86.= */ > > > { OPT_LEVELS_2_PLUS, OPT_freorder_blocks_algorithm_, NULL, > > > REORDER_BLOCKS_ALGORITHM_STC }, > > > + { OPT_LEVELS_2_PLUS_SPEED_ONLY, OPT_funroll_loops, NULL, 1 }, > > > + { OPT_LEVELS_2_PLUS_SPEED_ONLY, OPT_munroll_only_small_loops, NU= LL, 1 }, > > > + /* Turns off -frename-registers and -fweb which are enabled by > > > + funroll-loops. */ > > > + { OPT_LEVELS_ALL, OPT_frename_registers, NULL, 0 }, > > > + { OPT_LEVELS_ALL, OPT_fweb, NULL, 0 }, > > > > I'm quite sure that if this works it's not by intention. Doesn't this > > also disable > > register renaming and web when the user explicitely specifies -funroll-= loops? > > > > Doesn't this change -funroll-loops behavior everywhere, only unrolling = small > > loops? > > > > I'd like to see a -munroll-only-small-loops addition that doesn't have = any such > > effects. Note RTL unrolling could also > > conditionally enabled on a new -funroll-small-loops which wouldn't enab= le > > register renaming or web. > > > > > /* Turn off -fschedule-insns by default. It tends to make the > > > problem with not enough registers even worse. */ > > > { OPT_LEVELS_ALL, OPT_fschedule_insns, NULL, 0 }, > > > diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-o= ptions.cc > > > index acb2291e70f..6ea347c32e1 100644 > > > --- a/gcc/config/i386/i386-options.cc > > > +++ b/gcc/config/i386/i386-options.cc > > > @@ -1819,8 +1819,43 @@ ix86_recompute_optlev_based_flags (struct gcc_= options *opts, > > > void > > > ix86_override_options_after_change (void) > > > { > > > + /* Default align_* from the processor table. */ > > > ix86_default_align (&global_options); > > > + > > > ix86_recompute_optlev_based_flags (&global_options, &global_option= s_set); > > > + > > > + /* Disable unrolling small loops when there's explicit > > > + -f{,no}unroll-loop. */ > > > + if ((OPTION_SET_P (flag_unroll_loops)) > > > + || (OPTION_SET_P (flag_unroll_all_loops) > > > + && flag_unroll_all_loops)) > > > + { > > > + if (!OPTION_SET_P (ix86_unroll_only_small_loops)) > > > + ix86_unroll_only_small_loops =3D 0; > > > + /* Re-enable -frename-registers and -fweb if funroll-loops > > > + enabled. */ > > > + if (!OPTION_SET_P (flag_web)) > > > + flag_web =3D flag_unroll_loops; > > > + if (!OPTION_SET_P (flag_rename_registers)) > > > + flag_rename_registers =3D flag_unroll_loops; > > > + if (!OPTION_SET_P (flag_cunroll_grow_size)) > > > + flag_cunroll_grow_size =3D flag_unroll_loops > > > + || flag_peel_loops > > > + || optimize >=3D 3; > > > + } > > > + else > > > + { > > > + if (!OPTION_SET_P (flag_cunroll_grow_size)) > > > + flag_cunroll_grow_size =3D flag_peel_loops || optimize >=3D 3= ; > > > + /* Disables loop unrolling if -mno-unroll-only-small-loops is > > > + explicitly set and -funroll-loops is not enabled. */ > > > + if (OPTION_SET_P (ix86_unroll_only_small_loops) > > > + && !ix86_unroll_only_small_loops > > > + && !(OPTION_SET_P (flag_unroll_loops) > > > + || OPTION_SET_P (flag_unroll_all_loops))) > > > + flag_unroll_loops =3D flag_unroll_all_loops =3D 0; > > > + } > > > > Ugh, that's all quite ugly and unmaintainable, no? > > > > > + > > > } > > > > > > /* Clear stack slot assignments remembered from previous functions. > > > @@ -2332,7 +2367,7 @@ ix86_option_override_internal (bool main_args_p= , > > > > > > set_ix86_tune_features (opts, ix86_tune, opts->x_ix86_dump_tunes); > > > > > > - ix86_recompute_optlev_based_flags (opts, opts_set); > > > + ix86_override_options_after_change (); > > > > > > ix86_tune_cost =3D processor_cost_table[ix86_tune]; > > > /* TODO: ix86_cost should be chosen at instruction or function gra= nuality > > > @@ -2363,9 +2398,6 @@ ix86_option_override_internal (bool main_args_p= , > > > || TARGET_64BIT_P (opts->x_ix86_isa_flags)) > > > opts->x_ix86_regparm =3D REGPARM_MAX; > > > > > > - /* Default align_* from the processor table. */ > > > - ix86_default_align (opts); > > > - > > > /* Provide default for -mbranch-cost=3D value. */ > > > SET_OPTION_IF_UNSET (opts, opts_set, ix86_branch_cost, > > > ix86_tune_cost->branch_cost); > > > diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc > > > index 480db35f6cd..75829a5d0f4 100644 > > > --- a/gcc/config/i386/i386.cc > > > +++ b/gcc/config/i386/i386.cc > > > @@ -23820,6 +23820,19 @@ ix86_loop_unroll_adjust (unsigned nunroll, c= lass loop *loop) > > > unsigned i; > > > unsigned mem_count =3D 0; > > > > > > + /* Unroll small size loop when unroll factor is not explicitly > > > + specified. */ > > > + if (ix86_unroll_only_small_loops && !loop->unroll) > > > + { > > > + int small_unroll =3D 0; > > > + if (loop->ninsns <=3D (unsigned) ix86_small_unroll_ninsns) > > > + small_unroll =3D MIN ((unsigned) ix86_small_unroll_factor, > > > + nunroll); > > > + else > > > + small_unroll =3D 1; > > > + return small_unroll; > > > + } > > > + > > > if (!TARGET_ADJUST_UNROLL) > > > return nunroll; > > > > > > diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt > > > index 0dbaacb57ed..a724c73c0c4 100644 > > > --- a/gcc/config/i386/i386.opt > > > +++ b/gcc/config/i386/i386.opt > > > @@ -1214,3 +1214,16 @@ Do not use GOT to access external symbols. > > > -param=3Dx86-stlf-window-ninsns=3D > > > Target Joined UInteger Var(x86_stlf_window_ninsns) Init(64) Param > > > Instructions number above which STFL stall penalty can be compensate= d. > > > + > > > +munroll-only-small-loops > > > +Target Var(ix86_unroll_only_small_loops) Init(0) Save > > > +Enable conservative small loop unrolling. > > > + > > > +-param=3Dx86-small-unroll-ninsns=3D > > > +Target Joined UInteger Var(ix86_small_unroll_ninsns) Init(4) Param > > > +Insturctions number limit for loop to be unrolled under > > > +-munroll-only-small-loops. > > > + > > > +-param=3Dx86-small-unroll-factor=3D > > > +Target Joined UInteger Var(ix86_small_unroll_factor) Init(2) Param > > > +Unroll factor for -munroll-only-small-loops. > > > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi > > > index cd4d3c1d72c..b6fa79eccc3 100644 > > > --- a/gcc/doc/invoke.texi > > > +++ b/gcc/doc/invoke.texi > > > @@ -15779,6 +15779,14 @@ The following choices of @var{name} are avai= lable on i386 and x86_64 targets: > > > @item x86-stlf-window-ninsns > > > Instructions number above which STFL stall penalty can be compensate= d. > > > > > > +@item x86-small-unroll-ninsns > > > +If -munroll-only-small-loops is enabled, only unroll loops with inst= ruction > > > +count less than this parameter. The default value is 4. > > > + > > > +@item x86-small-unroll-factor > > > +If -munroll-only-small-loops is enabled, reset the unroll factor wit= h this > > > +value. The default value is 2 which means the loop will be unrolled = once. > > > + > > > @end table > > > > > > @end table > > > @@ -25186,6 +25194,12 @@ environments where no dynamic link is perfor= med, like firmwares, OS > > > kernels, executables linked with @option{-static} or @option{-static= -pie}. > > > @option{-mdirect-extern-access} is not compatible with @option{-fPIC= } or > > > @option{-fpic}. > > > + > > > +@item -munroll-only-small-loops > > > +@itemx -mno-unroll-only-small-loops > > > +@opindex munroll-only-small-loops > > > +Controls conservative small loop unrolling. It is default enbaled by > > > +O2, and unrolls loop with less than 4 insns by 1 time. > > > @end table > > > > > > @node M32C Options > > > diff --git a/gcc/testsuite/gcc.target/i386/pr86270.c b/gcc/testsuite/= gcc.target/i386/pr86270.c > > > index 81841ef5bd7..cbc9fbb0450 100644 > > > --- a/gcc/testsuite/gcc.target/i386/pr86270.c > > > +++ b/gcc/testsuite/gcc.target/i386/pr86270.c > > > @@ -1,5 +1,5 @@ > > > /* { dg-do compile } */ > > > -/* { dg-options "-O2" } */ > > > +/* { dg-options "-O2 -mno-unroll-only-small-loops" } */ > > > > > > int *a; > > > long len; > > > diff --git a/gcc/testsuite/gcc.target/i386/pr93002.c b/gcc/testsuite/= gcc.target/i386/pr93002.c > > > index 0248fcc00a5..f75a847f75d 100644 > > > --- a/gcc/testsuite/gcc.target/i386/pr93002.c > > > +++ b/gcc/testsuite/gcc.target/i386/pr93002.c > > > @@ -1,6 +1,6 @@ > > > /* PR target/93002 */ > > > /* { dg-do compile } */ > > > -/* { dg-options "-O2" } */ > > > +/* { dg-options "-O2 -mno-unroll-only-small-loops" } */ > > > /* { dg-final { scan-assembler-not "cmp\[^\n\r]*-1" } } */ > > > > > > volatile int sink; > > > -- > > > 2.18.1 > > >