From: Richard Biener <richard.guenther@gmail.com>
To: "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com>
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH 6/8] vect: Add vector_mode paramater to simd_clone_usable
Date: Wed, 30 Aug 2023 15:01:13 +0200 [thread overview]
Message-ID: <CAFiYyc16VQxt-MEn8sey9Gt7uq+kSuhS4uQOG1_Ee+csM1Lmmw@mail.gmail.com> (raw)
In-Reply-To: <4eda2924-2fe1-63ed-d6c5-2bdea8fd34d3@arm.com>
On Wed, Aug 30, 2023 at 11:15 AM Andre Vieira (lists) via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> This patch adds a machine_mode parameter to the TARGET_SIMD_CLONE_USABLE
> hook to enable rejecting SVE modes when the target architecture does not
> support SVE.
How does the graph node of the SIMD clone lack this information? That is, it
should have information on the types (and thus modes) for all formal arguments
and return values already, no? At least the target would know how to
instantiate
it if it's not readily available at the point of use.
> gcc/ChangeLog:
>
> * config/aarch64/aarch64.cc (aarch64_simd_clone_usable): Add mode
> parameter and use to to reject SVE modes when target architecture does
> not support SVE.
> * config/gcn/gcn.cc (gcn_simd_clone_usable): Add unused mode parameter.
> * config/i386/i386.cc (ix86_simd_clone_usable): Likewise.
> * doc/tm.texi (TARGET_SIMD_CLONE_USABLE): Document new parameter.
> * target.def (usable): Add new parameter.
> * tree-vect-stmts.cc (vectorizable_simd_clone_call): Pass vector mode
> to TARGET_SIMD_CLONE_CALL hook.
next prev parent reply other threads:[~2023-08-30 13:01 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-30 8:49 aarch64, vect, omp: Add SVE support for simd clones [PR 96342] Andre Vieira (lists)
2023-08-30 9:06 ` [PATCH 1/8] parloops: Copy target and optimizations when creating a function clone Andre Vieira (lists)
2023-08-30 12:31 ` Richard Biener
2023-10-18 14:40 ` Andre Vieira (lists)
2023-08-30 9:08 ` [Patch 2/8] parloops: Allow poly nit and bound Andre Vieira (lists)
2023-08-30 12:32 ` Richard Biener
2023-10-18 14:40 ` Andre Vieira (lists)
2023-08-30 9:10 ` [Patch 3/8] vect: Fix vect_get_smallest_scalar_type for simd clones Andre Vieira (lists)
2023-08-30 12:54 ` Richard Biener
2023-10-18 14:40 ` Andre Vieira (lists)
2023-10-19 12:07 ` Richard Biener
2023-08-30 9:11 ` [PATCH 4/8] vect: don't allow fully masked loops with non-masked simd clones [PR 110485] Andre Vieira (lists)
2023-08-30 12:54 ` Richard Biener
2023-10-18 14:40 ` Andre Vieira (lists)
2023-10-19 12:06 ` Richard Biener
2023-08-30 9:13 ` [PATCH 5/8] vect: Use inbranch simdclones in masked loops Andre Vieira (lists)
2023-10-18 14:41 ` Andre Vieira (lists)
2023-10-19 12:17 ` Richard Biener
2023-08-30 9:14 ` [PATCH 6/8] vect: Add vector_mode paramater to simd_clone_usable Andre Vieira (lists)
2023-08-30 9:17 ` Andre Vieira (lists)
2023-08-30 13:01 ` Richard Biener [this message]
2023-08-30 15:02 ` Andre Vieira (lists)
2023-08-31 6:39 ` Richard Biener
2023-09-28 15:57 ` Andre Vieira (lists)
2023-08-30 9:17 ` [PATCH7/8] vect: Add TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM Andre Vieira (lists)
2023-08-30 13:04 ` Richard Biener
2023-10-04 10:32 ` Andre Vieira (lists)
2023-10-04 10:41 ` Richard Biener
2023-10-04 12:40 ` Andre Vieira (lists)
2023-10-18 14:41 ` [PATCH6/8] omp: Reorder call for TARGET_SIMD_CLONE_ADJUST (was Re: [PATCH7/8] vect: Add TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM) Andre Vieira (lists)
2023-10-30 18:34 ` Andre Vieira (lists)
2023-10-31 7:59 ` Richard Biener
2023-12-08 10:35 ` Jakub Jelinek
2023-08-30 9:19 ` [PATCH 8/8] aarch64: Add SVE support for simd clones [PR 96342] Andre Vieira (lists)
2023-10-18 14:41 ` Andre Vieira (lists)
2023-11-29 17:01 ` Richard Sandiford
2023-12-01 16:39 ` Andre Vieira (lists)
2023-10-18 14:40 ` aarch64, vect, omp: " Andre Vieira (lists)
2023-10-18 14:41 ` [PATCH 0/8] omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS Andre Vieira (lists)
2023-10-19 7:10 ` Richard Biener
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