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From: Richard Biener <richard.guenther@gmail.com>
To: Aldy Hernandez <aldyh@redhat.com>
Cc: GCC patches <gcc-patches@gcc.gnu.org>,
	Andrew MacLeod <amacleod@redhat.com>
Subject: Re: [PATCH] CCP: handle division by a power of 2 as a right shift.
Date: Tue, 8 Nov 2022 16:04:26 +0100	[thread overview]
Message-ID: <CAFiYyc1QhU5bF-HL6Ws03LeV6=gLpWcqCbwc12g63pVZH_am4g@mail.gmail.com> (raw)
In-Reply-To: <20221108142458.862678-1-aldyh@redhat.com>

On Tue, Nov 8, 2022 at 3:25 PM Aldy Hernandez <aldyh@redhat.com> wrote:
>
> We have some code in range-ops that sets better maybe nonzero bits for
> TRUNC_DIV_EXPR by a power of 2 than CCP does, by just shifting the
> mask.  I'd like to offload this functionality into the CCP mask
> tracking code, which already does the right thing for right shifts.
>
> The testcase for this change is gcc.dg/tree-ssa/vrp123.c and
> gcc.dg/tree-ssa/pr107541.c.
>
> Tested on x86-64 Linux.
>
> OK?

LGTM

> gcc/ChangeLog:
>
>         * range-op.cc (operator_div::fold_range): Call
>         update_known_bitmask.
>         * tree-ssa-ccp.cc (bit_value_binop): Handle divisions by powers of
>         2 as a right shift.
> ---
>  gcc/range-op.cc     | 18 +-----------------
>  gcc/tree-ssa-ccp.cc | 12 ++++++++++++
>  2 files changed, 13 insertions(+), 17 deletions(-)
>
> diff --git a/gcc/range-op.cc b/gcc/range-op.cc
> index 846931ddcae..8ff5d5b4c78 100644
> --- a/gcc/range-op.cc
> +++ b/gcc/range-op.cc
> @@ -1995,23 +1995,7 @@ operator_div::fold_range (irange &r, tree type,
>    if (!cross_product_operator::fold_range (r, type, lh, rh, trio))
>      return false;
>
> -  if (lh.undefined_p ())
> -    return true;
> -
> -  tree t;
> -  if (code == TRUNC_DIV_EXPR
> -      && rh.singleton_p (&t)
> -      && !wi::neg_p (lh.lower_bound ()))
> -    {
> -      wide_int wi = wi::to_wide (t);
> -      int shift = wi::exact_log2 (wi);
> -      if (shift != -1)
> -       {
> -         wide_int nz = lh.get_nonzero_bits ();
> -         nz = wi::rshift (nz, shift, TYPE_SIGN (type));
> -         r.set_nonzero_bits (nz);
> -       }
> -    }
> +  update_known_bitmask (r, code, lh, rh);
>    return true;
>  }
>
> diff --git a/gcc/tree-ssa-ccp.cc b/gcc/tree-ssa-ccp.cc
> index 3a4b6bc1118..2bcd90646f6 100644
> --- a/gcc/tree-ssa-ccp.cc
> +++ b/gcc/tree-ssa-ccp.cc
> @@ -1934,6 +1934,18 @@ bit_value_binop (enum tree_code code, signop sgn, int width,
>        {
>         widest_int r1max = r1val | r1mask;
>         widest_int r2max = r2val | r2mask;
> +       if (r2mask == 0 && !wi::neg_p (r1max))
> +         {
> +           widest_int shift = wi::exact_log2 (r2val);
> +           if (shift != -1)
> +             {
> +               // Handle division by a power of 2 as an rshift.
> +               bit_value_binop (RSHIFT_EXPR, sgn, width, val, mask,
> +                                r1type_sgn, r1type_precision, r1val, r1mask,
> +                                r2type_sgn, r2type_precision, shift, r2mask);
> +               return;
> +             }
> +         }
>         if (sgn == UNSIGNED
>             || (!wi::neg_p (r1max) && !wi::neg_p (r2max)))
>           {
> --
> 2.38.1
>

      reply	other threads:[~2022-11-08 15:04 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-08 14:24 Aldy Hernandez
2022-11-08 15:04 ` Richard Biener [this message]

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