From: Richard Biener <richard.guenther@gmail.com>
To: GCC Patches <gcc-patches@gcc.gnu.org>,
Richard Sandiford <richard.sandiford@linaro.org>
Subject: Re: [16/nn] Factor out the mode handling in lower-subreg.c
Date: Thu, 26 Oct 2017 12:09:00 -0000 [thread overview]
Message-ID: <CAFiYyc23hwYZn1cuf+X5SFSMAWjEQi=21RWe+hKa_93Dm5YC1g@mail.gmail.com> (raw)
In-Reply-To: <87zi8iumsp.fsf@linaro.org>
On Mon, Oct 23, 2017 at 1:27 PM, Richard Sandiford
<richard.sandiford@linaro.org> wrote:
> This patch adds a helper routine (interesting_mode_p) to lower-subreg.c,
> to make the decision about whether a mode can be split and, if so,
> calculate the number of bytes and words in the mode. At present this
> function always returns true; a later patch will add cases in which it
> can return false.
Ok.
Richard.
>
> 2017-10-23 Richard Sandiford <richard.sandiford@linaro.org>
> Alan Hayward <alan.hayward@arm.com>
> David Sherwood <david.sherwood@arm.com>
>
> gcc/
> * lower-subreg.c (interesting_mode_p): New function.
> (compute_costs, find_decomposable_subregs, decompose_register)
> (simplify_subreg_concatn, can_decompose_p, resolve_simple_move)
> (resolve_clobber, dump_choices): Use it.
>
> Index: gcc/lower-subreg.c
> ===================================================================
> --- gcc/lower-subreg.c 2017-10-23 11:47:11.274393237 +0100
> +++ gcc/lower-subreg.c 2017-10-23 11:47:23.555013148 +0100
> @@ -103,6 +103,18 @@ #define twice_word_mode \
> #define choices \
> this_target_lower_subreg->x_choices
>
> +/* Return true if MODE is a mode we know how to lower. When returning true,
> + store its byte size in *BYTES and its word size in *WORDS. */
> +
> +static inline bool
> +interesting_mode_p (machine_mode mode, unsigned int *bytes,
> + unsigned int *words)
> +{
> + *bytes = GET_MODE_SIZE (mode);
> + *words = CEIL (*bytes, UNITS_PER_WORD);
> + return true;
> +}
> +
> /* RTXes used while computing costs. */
> struct cost_rtxes {
> /* Source and target registers. */
> @@ -199,10 +211,10 @@ compute_costs (bool speed_p, struct cost
> for (i = 0; i < MAX_MACHINE_MODE; i++)
> {
> machine_mode mode = (machine_mode) i;
> - int factor = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
> - if (factor > 1)
> + unsigned int size, factor;
> + if (interesting_mode_p (mode, &size, &factor) && factor > 1)
> {
> - int mode_move_cost;
> + unsigned int mode_move_cost;
>
> PUT_MODE (rtxes->target, mode);
> PUT_MODE (rtxes->source, mode);
> @@ -469,10 +481,10 @@ find_decomposable_subregs (rtx *loc, enu
> continue;
> }
>
> - outer_size = GET_MODE_SIZE (GET_MODE (x));
> - inner_size = GET_MODE_SIZE (GET_MODE (inner));
> - outer_words = (outer_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
> - inner_words = (inner_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
> + if (!interesting_mode_p (GET_MODE (x), &outer_size, &outer_words)
> + || !interesting_mode_p (GET_MODE (inner), &inner_size,
> + &inner_words))
> + continue;
>
> /* We only try to decompose single word subregs of multi-word
> registers. When we find one, we return -1 to avoid iterating
> @@ -507,7 +519,7 @@ find_decomposable_subregs (rtx *loc, enu
> }
> else if (REG_P (x))
> {
> - unsigned int regno;
> + unsigned int regno, size, words;
>
> /* We will see an outer SUBREG before we see the inner REG, so
> when we see a plain REG here it means a direct reference to
> @@ -527,7 +539,8 @@ find_decomposable_subregs (rtx *loc, enu
>
> regno = REGNO (x);
> if (!HARD_REGISTER_NUM_P (regno)
> - && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
> + && interesting_mode_p (GET_MODE (x), &size, &words)
> + && words > 1)
> {
> switch (*pcmi)
> {
> @@ -567,15 +580,15 @@ find_decomposable_subregs (rtx *loc, enu
> decompose_register (unsigned int regno)
> {
> rtx reg;
> - unsigned int words, i;
> + unsigned int size, words, i;
> rtvec v;
>
> reg = regno_reg_rtx[regno];
>
> regno_reg_rtx[regno] = NULL_RTX;
>
> - words = GET_MODE_SIZE (GET_MODE (reg));
> - words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
> + if (!interesting_mode_p (GET_MODE (reg), &size, &words))
> + gcc_unreachable ();
>
> v = rtvec_alloc (words);
> for (i = 0; i < words; ++i)
> @@ -599,25 +612,29 @@ decompose_register (unsigned int regno)
> simplify_subreg_concatn (machine_mode outermode, rtx op,
> unsigned int byte)
> {
> - unsigned int inner_size;
> + unsigned int outer_size, outer_words, inner_size, inner_words;
> machine_mode innermode, partmode;
> rtx part;
> unsigned int final_offset;
>
> + innermode = GET_MODE (op);
> + if (!interesting_mode_p (outermode, &outer_size, &outer_words)
> + || !interesting_mode_p (innermode, &inner_size, &inner_words))
> + gcc_unreachable ();
> +
> gcc_assert (GET_CODE (op) == CONCATN);
> - gcc_assert (byte % GET_MODE_SIZE (outermode) == 0);
> + gcc_assert (byte % outer_size == 0);
>
> - innermode = GET_MODE (op);
> - gcc_assert (byte < GET_MODE_SIZE (innermode));
> - if (GET_MODE_SIZE (outermode) > GET_MODE_SIZE (innermode))
> + gcc_assert (byte < inner_size);
> + if (outer_size > inner_size)
> return NULL_RTX;
>
> - inner_size = GET_MODE_SIZE (innermode) / XVECLEN (op, 0);
> + inner_size /= XVECLEN (op, 0);
> part = XVECEXP (op, 0, byte / inner_size);
> partmode = GET_MODE (part);
>
> final_offset = byte % inner_size;
> - if (final_offset + GET_MODE_SIZE (outermode) > inner_size)
> + if (final_offset + outer_size > inner_size)
> return NULL_RTX;
>
> /* VECTOR_CSTs in debug expressions are expanded into CONCATN instead of
> @@ -801,9 +818,10 @@ can_decompose_p (rtx x)
>
> if (HARD_REGISTER_NUM_P (regno))
> {
> - unsigned int byte, num_bytes;
> + unsigned int byte, num_bytes, num_words;
>
> - num_bytes = GET_MODE_SIZE (GET_MODE (x));
> + if (!interesting_mode_p (GET_MODE (x), &num_bytes, &num_words))
> + return false;
> for (byte = 0; byte < num_bytes; byte += UNITS_PER_WORD)
> if (simplify_subreg_regno (regno, GET_MODE (x), byte, word_mode) < 0)
> return false;
> @@ -826,14 +844,15 @@ resolve_simple_move (rtx set, rtx_insn *
> rtx src, dest, real_dest;
> rtx_insn *insns;
> machine_mode orig_mode, dest_mode;
> - unsigned int words;
> + unsigned int orig_size, words;
> bool pushing;
>
> src = SET_SRC (set);
> dest = SET_DEST (set);
> orig_mode = GET_MODE (dest);
>
> - words = (GET_MODE_SIZE (orig_mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
> + if (!interesting_mode_p (orig_mode, &orig_size, &words))
> + gcc_unreachable ();
> gcc_assert (words > 1);
>
> start_sequence ();
> @@ -964,7 +983,7 @@ resolve_simple_move (rtx set, rtx_insn *
> {
> unsigned int i, j, jinc;
>
> - gcc_assert (GET_MODE_SIZE (orig_mode) % UNITS_PER_WORD == 0);
> + gcc_assert (orig_size % UNITS_PER_WORD == 0);
> gcc_assert (GET_CODE (XEXP (dest, 0)) != PRE_MODIFY);
> gcc_assert (GET_CODE (XEXP (dest, 0)) != POST_MODIFY);
>
> @@ -1059,7 +1078,7 @@ resolve_clobber (rtx pat, rtx_insn *insn
> {
> rtx reg;
> machine_mode orig_mode;
> - unsigned int words, i;
> + unsigned int orig_size, words, i;
> int ret;
>
> reg = XEXP (pat, 0);
> @@ -1067,8 +1086,8 @@ resolve_clobber (rtx pat, rtx_insn *insn
> return false;
>
> orig_mode = GET_MODE (reg);
> - words = GET_MODE_SIZE (orig_mode);
> - words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
> + if (!interesting_mode_p (orig_mode, &orig_size, &words))
> + gcc_unreachable ();
>
> ret = validate_change (NULL_RTX, &XEXP (pat, 0),
> simplify_gen_subreg_concatn (word_mode, reg,
> @@ -1332,12 +1351,13 @@ dump_shift_choices (enum rtx_code code,
> static void
> dump_choices (bool speed_p, const char *description)
> {
> - unsigned int i;
> + unsigned int size, factor, i;
>
> fprintf (dump_file, "Choices when optimizing for %s:\n", description);
>
> for (i = 0; i < MAX_MACHINE_MODE; i++)
> - if (GET_MODE_SIZE ((machine_mode) i) > UNITS_PER_WORD)
> + if (interesting_mode_p ((machine_mode) i, &size, &factor)
> + && factor > 1)
> fprintf (dump_file, " %s mode %s for copy lowering.\n",
> choices[speed_p].move_modes_to_split[i]
> ? "Splitting"
next prev parent reply other threads:[~2017-10-26 12:08 UTC|newest]
Thread overview: 90+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-23 11:16 [00/nn] Patches preparing for runtime offsets and sizes Richard Sandiford
2017-10-23 11:17 ` [01/nn] Add gen_(const_)vec_duplicate helpers Richard Sandiford
2017-10-25 16:29 ` Jeff Law
2017-10-27 16:12 ` Richard Sandiford
2017-10-23 11:19 ` [02/nn] Add more vec_duplicate simplifications Richard Sandiford
2017-10-25 16:35 ` Jeff Law
2017-11-10 9:42 ` Christophe Lyon
2017-10-23 11:19 ` [03/nn] Allow vector CONSTs Richard Sandiford
2017-10-25 16:59 ` Jeff Law
2017-10-27 16:19 ` Richard Sandiford
2017-10-23 11:20 ` [04/nn] Add a VEC_SERIES rtl code Richard Sandiford
2017-10-26 11:49 ` Richard Biener
2017-10-23 11:21 ` [05/nn] Add VEC_DUPLICATE_{CST,EXPR} and associated optab Richard Sandiford
2017-10-26 11:53 ` Richard Biener
2017-11-06 15:09 ` Richard Sandiford
2017-11-07 10:37 ` Richard Biener
2017-12-15 0:29 ` Richard Sandiford
2017-12-15 8:58 ` Richard Biener
2017-12-15 12:52 ` Richard Sandiford
2017-12-15 13:20 ` Richard Biener
2017-10-23 11:22 ` [08/nn] Add a fixed_size_mode class Richard Sandiford
2017-10-26 11:57 ` Richard Biener
2017-10-23 11:22 ` [07/nn] Add unique CONSTs Richard Sandiford
2017-10-27 15:51 ` Jeff Law
2017-10-27 15:58 ` Richard Sandiford
2017-10-30 14:49 ` Jeff Law
2017-10-23 11:22 ` [06/nn] Add VEC_SERIES_{CST,EXPR} and associated optab Richard Sandiford
2017-10-26 12:26 ` Richard Biener
2017-10-26 12:43 ` Richard Biener
2017-11-06 15:21 ` Richard Sandiford
2017-11-07 10:38 ` Richard Biener
2017-12-15 0:34 ` Richard Sandiford
2017-12-15 9:03 ` Richard Biener
2017-10-23 11:23 ` [09/nn] Add a fixed_size_mode_pod class Richard Sandiford
2017-10-26 11:59 ` Richard Biener
2017-10-26 12:18 ` Richard Sandiford
2017-10-26 12:46 ` Richard Biener
2017-10-26 19:42 ` Eric Botcazou
2017-10-27 8:34 ` Richard Biener
2017-10-27 9:28 ` Eric Botcazou
2017-10-30 3:14 ` Trevor Saunders
2017-10-30 8:52 ` Richard Sandiford
2017-10-30 10:13 ` Eric Botcazou
2017-10-31 10:39 ` Trevor Saunders
2017-10-31 17:29 ` Eric Botcazou
2017-10-31 17:57 ` Jeff Law
2017-11-01 2:50 ` Trevor Saunders
2017-11-01 16:30 ` Jeff Law
2017-11-02 4:28 ` Trevor Saunders
2017-10-26 19:44 ` Richard Sandiford
2017-10-26 19:45 ` Jakub Jelinek
2017-10-27 8:43 ` Richard Biener
2017-10-27 8:45 ` Jakub Jelinek
2017-10-27 10:19 ` Pedro Alves
2017-10-27 15:23 ` Jeff Law
2017-10-23 11:24 ` [11/nn] Add narrower_subreg_mode helper function Richard Sandiford
2017-10-30 15:06 ` Jeff Law
2017-10-23 11:24 ` [10/nn] Widening optab cleanup Richard Sandiford
2017-10-30 18:32 ` Jeff Law
2017-10-23 11:25 ` [12/nn] Add an is_narrower_int_mode helper function Richard Sandiford
2017-10-26 11:59 ` Richard Biener
2017-10-23 11:25 ` [13/nn] More is_a <scalar_int_mode> Richard Sandiford
2017-10-26 12:03 ` Richard Biener
2017-10-23 11:26 ` [14/nn] Add helpers for shift count modes Richard Sandiford
2017-10-26 12:07 ` Richard Biener
2017-10-26 12:07 ` Richard Biener
2017-11-20 21:04 ` Richard Sandiford
2017-11-21 15:00 ` Richard Biener
2017-12-15 0:48 ` Richard Sandiford
2017-12-15 9:06 ` Richard Biener
2017-12-15 15:17 ` Richard Sandiford
2017-12-19 19:13 ` Richard Sandiford
2017-12-20 0:27 ` Jeff Law
2017-10-30 15:03 ` Jeff Law
2017-10-23 11:27 ` [15/nn] Use more specific hash functions in rtlhash.c Richard Sandiford
2017-10-26 12:08 ` Richard Biener
2017-10-23 11:27 ` [16/nn] Factor out the mode handling in lower-subreg.c Richard Sandiford
2017-10-26 12:09 ` Richard Biener [this message]
2017-10-23 11:28 ` [17/nn] Turn var-tracking.c:INT_MEM_OFFSET into a function Richard Sandiford
2017-10-26 12:10 ` Richard Biener
2017-10-23 11:29 ` [19/nn] Don't treat zero-sized ranges as overlapping Richard Sandiford
2017-10-26 12:14 ` Richard Biener
2017-10-23 11:29 ` [18/nn] Use (CONST_VECTOR|GET_MODE)_NUNITS in simplify-rtx.c Richard Sandiford
2017-10-26 12:13 ` Richard Biener
2017-10-23 11:30 ` [20/nn] Make tree-ssa-dse.c:normalize_ref return a bool Richard Sandiford
2017-10-30 17:49 ` Jeff Law
2017-10-23 11:31 ` [21/nn] Minor vn_reference_lookup_3 tweak Richard Sandiford
2017-10-26 12:18 ` Richard Biener
2017-10-23 11:45 ` [22/nn] Make dse.c use offset/width instead of start/end Richard Sandiford
2017-10-26 12:18 ` Richard Biener
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