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From: Richard Biener <richard.guenther@gmail.com>
To: "Maciej W. Rozycki" <macro@linux-mips.org>
Cc: Steve Ellcey <sellcey@imgtec.com>,
	Matthew Fortune <Matthew.Fortune@imgtec.com>,
		Richard Sandiford <rdsandiford@googlemail.com>,
	Richard Sandiford <richard.sandiford@arm.com>,
		Joseph Myers <joseph@codesourcery.com>,
		"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
	Catherine Moore <clm@codesourcery.com>
Subject: Re: [Patch, MIPS] Enable fp-contract on MIPS and update -mfused-madd
Date: Tue, 30 Jun 2015 07:35:00 -0000	[thread overview]
Message-ID: <CAFiYyc26xJtS2NqUPk0Yv0dZ7hEkFCbc+s4g_7Zgb_Nby1t=Yw@mail.gmail.com> (raw)
In-Reply-To: <alpine.LFD.2.11.1506291516310.31747@eddie.linux-mips.org>

On Mon, Jun 29, 2015 at 6:08 PM, Maciej W. Rozycki <macro@linux-mips.org> wrote:
> Richard, please have a look at my question below in a reference to your
> previous statement.
>
> On Thu, 18 Jun 2015, Steve Ellcey wrote:
>
>> OK, I checked in the prequel patch and here is a new copy of the
>> original patch based off of that (and with no HONOR_NAN checks in the
>> fma/madd instructions).
>>
>> OK for checkin?
>
>  Please see below for my notes.
>
>> 2015-06-18  Steve Ellcey  <sellcey@imgtec.com>
>>
>>       * config.gcc (mips*-*-*): Add fused-madd.opt.
>
>  Please use angle brackets as per
> <https://www.gnu.org/prep/standards/html_node/Indicating-the-Part-Changed.html>,
> i.e.:
>
>         * config.gcc <mips*-*-*>: Add fused-madd.opt.
>
> There's no function or similar entity involved here and `mips*-*-*' is a
> case value like with the C language's `switch' statement where you'd use
> angle brackets too to refer to individual cases.
>
>>       (*nmsub4<mode>_fastmath)  Update condition.
>
>  Extraneous space here.
>
>> diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
>> index f6912e1..4f5692c 100644
>> --- a/gcc/config/mips/mips.md
>> +++ b/gcc/config/mips/mips.md
> [...]
>> +;; fnma is defined in GCC as (fma (neg op1) op2 op3)
>> +;; (-op1 * op2) + op3 ==> -(op1 * op2) + op3 ==> -((op1 * op2) - op3)
>> +;; The mips nmsub instructions implement -((op1 * op2) - op3)
>> +;; This transformation means we may return the wrong signed zero
>> +;; so we check HONOR_SIGNED_ZEROS.
>> +
>> +(define_expand "fnma<mode>4"
>> +  [(set (match_operand:ANYF 0 "register_operand")
>> +     (fma:ANYF (neg:ANYF (match_operand:ANYF 1 "register_operand"))
>> +               (match_operand:ANYF 2 "register_operand")
>> +               (match_operand:ANYF 3 "register_operand")))]
>> +  "(ISA_HAS_FUSED_MADD3 || ISA_HAS_FUSED_MADD4)
>> +   && !HONOR_SIGNED_ZEROS (<MODE>mode)")
>
>  Have you considered the alternative/complementary approach proposed by
> Richard here: <http://gcc.gnu.org/ml/gcc-patches/2010-11/msg00680.html>,
> i.e. to introduce further expanders, e.g.:
>
> fmanM4: (neg:M (fma:M OP1 OP2 OP3))             (multiply-add, negated)
>
> fmsnM4: (neg:M (fma:M OP1 OP2 (neg:M OP3)))     (multiply-subtract, negated)
>
> ?
>
>  These patterns wouldn't need a check for !HONOR_SIGNED_ZEROS as they
> match the respective hardware instructions in an exact manner.  Therefore
> I think they would be more useful as they would also suit software that
> claims/requires full IEEE Std 754 compliance.
>
>  Richard, do you maintain the introduction of these additional operations
> would be a good idea and one you're willing to support for the purpose of
> patch acceptance/approval if implemented?

Yes, esp. if there is now a second architecture that has such instructions.

Thanks,
Richard.

>> +;; fnms is defined as: (fma (neg op1) op2 (neg op3))
>> +;; ((-op1) * op2) - op3 ==> -(op1 * op2) - op3 ==> -((op1 * op2) + op3)
>> +;; The mips nmadd instructions implement -((op1 * op2) + op3)
>> +;; This transformation means we may return the wrong signed zero
>> +;; so we check HONOR_SIGNED_ZEROS.
>> +
>> +(define_expand "fnms<mode>4"
>> +  [(set (match_operand:ANYF 0 "register_operand")
>> +     (fma:ANYF
>> +       (neg:ANYF (match_operand:ANYF 1 "register_operand"))
>> +       (match_operand:ANYF 2 "register_operand")
>> +       (neg:ANYF (match_operand:ANYF 3 "register_operand"))))]
>> +  "(ISA_HAS_FUSED_MADD3 || ISA_HAS_FUSED_MADD4)
>> +   && !HONOR_SIGNED_ZEROS (<MODE>mode)")
>
>  Same observation here.
>
>  The change looks good to me otherwise.
>
>   Maciej

  parent reply	other threads:[~2015-06-30  7:32 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-11 20:09 Steve Ellcey 
2015-06-11 20:39 ` Joseph Myers
2015-06-15 20:52   ` Maciej W. Rozycki
2015-06-15 21:37     ` Joseph Myers
2015-06-15 22:00       ` Maciej W. Rozycki
2015-06-15 22:09         ` Joseph Myers
2015-06-16 12:19           ` Maciej W. Rozycki
2015-06-16 12:26             ` Joseph Myers
2015-06-16 13:28               ` Maciej W. Rozycki
2015-06-16 16:13                 ` Joseph Myers
2015-06-17 10:43                 ` Richard Sandiford
2015-06-17 17:45                   ` Steve Ellcey
2015-06-17 18:44                     ` Maciej W. Rozycki
2015-06-17 18:52                       ` Richard Sandiford
2015-06-17 21:09                         ` Steve Ellcey
2015-06-17 22:06                           ` Matthew Fortune
2015-06-18 12:32                             ` Maciej W. Rozycki
2015-06-18 16:02                               ` Steve Ellcey
2015-06-29 16:10                                 ` Maciej W. Rozycki
2015-06-29 19:07                                   ` Matthew Fortune
2015-06-29 19:46                                     ` Moore, Catherine
2015-07-06 17:35                                     ` Steve Ellcey
2015-06-30  7:35                                   ` Richard Biener [this message]
2015-06-18 12:04                         ` Maciej W. Rozycki
2015-06-17 19:51                       ` Steve Ellcey

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