From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 613 invoked by alias); 20 Mar 2013 11:21:07 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 590 invoked by uid 89); 20 Mar 2013 11:21:00 -0000 X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 X-Spam-User: qpsmtpd, 2 recipients Received: from mail-wg0-f41.google.com (HELO mail-wg0-f41.google.com) (74.125.82.41) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Wed, 20 Mar 2013 11:20:30 +0000 Received: by mail-wg0-f41.google.com with SMTP id ds1so832786wgb.2 for ; Wed, 20 Mar 2013 04:20:27 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.194.178.9 with SMTP id cu9mr9741458wjc.39.1363778427757; Wed, 20 Mar 2013 04:20:27 -0700 (PDT) Received: by 10.194.56.100 with HTTP; Wed, 20 Mar 2013 04:20:27 -0700 (PDT) In-Reply-To: <20130320104613.GK12913@tucnak.redhat.com> References: <1363440569-17331-1-git-send-email-andi@firstfloor.org> <20130319064639.GA12913@tucnak.redhat.com> <20130319155121.GM19692@tassilo.jf.intel.com> <20130319161022.GE12913@tucnak.redhat.com> <20130319173016.GF20853@two.firstfloor.org> <20130320104613.GK12913@tucnak.redhat.com> Date: Wed, 20 Mar 2013 11:21:00 -0000 Message-ID: Subject: Re: [PATCH 1/4] Mark all member functions with memory models always inline From: Richard Biener To: Jakub Jelinek Cc: Andi Kleen , Andi Kleen , Jonathan Wakely , gcc-patches@gcc.gnu.org, libstdc++@gcc.gnu.org, rth@redhat.com Content-Type: text/plain; charset=ISO-8859-1 X-SW-Source: 2013-03/txt/msg00726.txt.bz2 On Wed, Mar 20, 2013 at 11:46 AM, Jakub Jelinek wrote: > On Wed, Mar 20, 2013 at 11:38:03AM +0100, Richard Biener wrote: >> Not without using information created by TER which is disabled for this >> case because of different line information. If TER would not be disabled >> for this reason it would already work automagically. > > Would relaxing that in TER for constants help in the case of: > static inline __attribute__((always_inline)) ... > foo (..., int m = __ATOMIC_SEQ_CST) > { > if (something) > bar (); > else > baz (); > __atomic_test_and_set (&x, m); > } > > void > test () > { > foo (..., __ATOMIC_HLE_ACQUIRE | __ATOMIC_SEQ_CST); > } > though? I'd think as the temp = 0x10005; would be in a different bb, TER > wouldn't do anything here, for -O1 of course CCP or similar would propagate > that, but for -O0 we'd still have to walk the chain of SSA_NAMEs. True. I was for a long time thinking of running a CCP pass at -O0 ... and only restrict what we sustitute into (builtin arguments and asm operands). Walking the SSA def chain would also be possible - preferably from cfgexpand.c when we process the stmt. But you'll eventually lose debug info like for int i = 1; __builtin_foo (i); when we then never expand the SSA name def i_2 = 1 because we are never visiting its use ... Richard. > Jakub