From: Richard Biener <richard.guenther@gmail.com>
To: Richard Biener via Gcc-patches <gcc-patches@gcc.gnu.org>,
liuhongt <hongtao.liu@intel.com>,
Richard Biener <richard.guenther@gmail.com>,
Richard Sandiford <richard.sandiford@arm.com>
Subject: Re: [PATCH] Make sure we're playing with integral modes before call extract_integral_bit_field.
Date: Fri, 6 Aug 2021 13:27:07 +0200 [thread overview]
Message-ID: <CAFiYyc2wx4Nx9CP9h_hmoWcZ2z793UN8Y6069cnbxZUxJH2tZw@mail.gmail.com> (raw)
In-Reply-To: <mptlf5f2ba0.fsf@arm.com>
On Fri, Aug 6, 2021 at 11:05 AM Richard Sandiford
<richard.sandiford@arm.com> wrote:
>
> Richard Biener via Gcc-patches <gcc-patches@gcc.gnu.org> writes:
> > On Fri, Aug 6, 2021 at 5:32 AM liuhongt <hongtao.liu@intel.com> wrote:
> >>
> >> Hi:
> >> ---
> >> OK, I think sth is amiss here upthread. insv/extv do look like they
> >> are designed
> >> to work on integer modes (but docs do not say anything about this here).
> >> In fact the caller of extract_bit_field_using_extv is named
> >> extract_integral_bit_field. Of course nothing seems to check what kind of
> >> modes we're dealing with, but we're for example happily doing
> >> expand_shift in 'mode'. In the extract_integral_bit_field call 'mode' is
> >> some integer mode and op0 is HFmode? From the above I get it's
> >> the other way around? In that case we should wrap the
> >> call to extract_integral_bit_field, extracting in an integer mode with the
> >> same size as 'mode' and then converting the result as (subreg:HF (reg:HI ...)).
> >> ---
> >> This is a separate patch as a follow up of upper comments.
> >>
> >> gcc/ChangeLog:
> >>
> >> * expmed.c (extract_bit_field_1): Wrap the call to
> >> extract_integral_bit_field, extracting in an integer mode with
> >> the same size as 'tmode' and then converting the result
> >> as (subreg:tmode (reg:imode)).
> >>
> >> gcc/testsuite/ChangeLog:
> >> * gcc.target/i386/float16-5.c: New test.
> >> ---
> >> gcc/expmed.c | 19 +++++++++++++++++++
> >> gcc/testsuite/gcc.target/i386/float16-5.c | 12 ++++++++++++
> >> 2 files changed, 31 insertions(+)
> >> create mode 100644 gcc/testsuite/gcc.target/i386/float16-5.c
> >>
> >> diff --git a/gcc/expmed.c b/gcc/expmed.c
> >> index 3143f38e057..72790693ef0 100644
> >> --- a/gcc/expmed.c
> >> +++ b/gcc/expmed.c
> >> @@ -1850,6 +1850,25 @@ extract_bit_field_1 (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum,
> >> op0_mode = opt_scalar_int_mode ();
> >> }
> >>
> >> + /* Make sure we are playing with integral modes. Pun with subregs
> >> + if we aren't. When tmode is HFmode, op0 is SImode, there will be ICE
> >> + in extract_integral_bit_field. */
> >> + if (int_mode_for_mode (tmode).exists (&imode)
> >
> > check !INTEGRAL_MODE_P (tmode) before, that should be slightly
> > cheaper. Then imode should always be != tmode. Maybe
> > even GET_MDOE_CLASS (tmode) != MODE_INT since I'm not sure
> > how it behaves for composite modes.
> >
> > Of course the least surprises would happen when we restrict this
> > to FLOAT_MODE_P (tmode).
> >
> > Richard - any preferences?
>
> If the bug is that extract_integral_bit_field is being called with
> a non-integral mode parameter, then it looks odd that we can still
> fall through to it without an integral mode (when exists is false).
>
> If calling extract_integral_bit_field without an integral mode is
> a bug then I think we should have:
>
> int_mode_for_mode (mode).require ()
>
> whenever mode is not already SCALAR_INT_MODE_P/is_a<scalar_int_mode>.
> Ideally we'd make the mode parameter scalar_int_mode too.
>
> extract_integral_bit_field currently has:
>
> /* Find a correspondingly-sized integer field, so we can apply
> shifts and masks to it. */
> scalar_int_mode int_mode;
> if (!int_mode_for_mode (tmode).exists (&int_mode))
> /* If this fails, we should probably push op0 out to memory and then
> do a load. */
> int_mode = int_mode_for_mode (mode).require ();
>
> which would seem to be redundant after this change.
I'm not sure what exactly the bug is, but extract_integral_bit_field ends
up creating a lowpart subreg that's not allowed and that ICEs (and I
can't see a way to check beforehand). So it seems to me at least
part of that function doesn't expect non-integral extraction modes.
But who knows - the code is older than I am (OK, not, but older than
my involvment in GCC ;))
Richard.
> >> + && imode != tmode
> >> + && imode != GET_MODE (op0))
> >> + {
> >> + rtx ret = extract_integral_bit_field (op0, op0_mode,
> >> + bitsize.to_constant (),
> >> + bitnum.to_constant (), unsignedp,
> >> + NULL, imode, imode,
> >> + reverse, fallback_p);
> >> + gcc_assert (ret);
> >> +
> >> + if (!REG_P (ret))
> >> + ret = force_reg (imode, ret);
> >> + return gen_lowpart_SUBREG (tmode, ret);
> >> + }
> >> +
> >> /* It's possible we'll need to handle other cases here for
> >> polynomial bitnum and bitsize. */
>
> Minor nit, but since the code is using to_constant, it should go after
> this comment rather than before it.
>
> Thanks,
> Richard
>
> >>
> >> diff --git a/gcc/testsuite/gcc.target/i386/float16-5.c b/gcc/testsuite/gcc.target/i386/float16-5.c
> >> new file mode 100644
> >> index 00000000000..ebc0af1490b
> >> --- /dev/null
> >> +++ b/gcc/testsuite/gcc.target/i386/float16-5.c
> >> @@ -0,0 +1,12 @@
> >> +/* { dg-do compile } */
> >> +/* { dg-options "-msse2 -O2" } */
> >> +_Float16
> >> +foo (int a)
> >> +{
> >> + union {
> >> + int a;
> >> + _Float16 b;
> >> + }c;
> >> + c.a = a;
> >> + return c.b;
> >> +}
> >> --
> >> 2.27.0
> >>
next prev parent reply other threads:[~2021-08-06 11:27 UTC|newest]
Thread overview: 138+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210701054808.39000-1-hongtao.liu@intel.com>
2021-07-01 5:55 ` [PATCH 0/2] Initial support for AVX512FP16 Hongtao Liu
2021-07-01 20:46 ` Joseph Myers
2021-07-06 8:53 ` Hongtao Liu
[not found] ` <20210701054808.39000-3-hongtao.liu@intel.com>
2021-07-01 5:55 ` [PATCH 2/2] AVX512FP16: Add HFmode support in libgcc Hongtao Liu
[not found] ` <20210701054808.39000-2-hongtao.liu@intel.com>
2021-07-01 5:55 ` [PATCH 1/2] AVX512FP16: Initial support for _Float16 type and AVX512FP16 feature Hongtao Liu
2021-07-01 11:10 ` [PATCH 0/2] Initial support for AVX512FP16 Uros Bizjak
2021-07-01 12:39 ` H.J. Lu
2021-07-01 12:58 ` Richard Biener
2021-07-01 13:03 ` Jakub Jelinek
2021-07-06 8:51 ` Hongtao Liu
2021-07-06 10:14 ` Richard Biener
2021-07-06 12:11 ` H.J. Lu
2021-07-06 18:20 ` Joseph Myers
2021-07-06 18:18 ` Joseph Myers
2021-07-06 18:11 ` Joseph Myers
2021-07-07 1:24 ` Hongtao Liu
2021-07-14 7:50 ` Hongtao Liu
2021-07-14 15:32 ` [llvm-dev] " Craig Topper
2021-07-15 2:07 ` Wang, Pengfei
2021-07-15 6:34 ` Hongtao Liu
2021-07-15 6:57 ` Wang, Pengfei
2021-07-15 7:49 ` Hongtao Liu
2021-07-21 7:43 ` [PATCH V2 00/10] " liuhongt
2021-07-21 7:43 ` [PATCH 01/10] Update hf soft-fp from glibc liuhongt
2021-07-21 7:43 ` [PATCH 02/10] [i386] Enable _Float16 type for TARGET_SSE2 and above liuhongt
2021-07-21 10:35 ` Uros Bizjak
2021-07-22 5:21 ` Hongtao Liu
2021-07-22 11:56 ` Richard Biener
2021-07-28 21:56 ` Joseph Myers
2021-07-29 4:53 ` Hongtao Liu
2021-07-29 5:34 ` Hongtao Liu
2021-07-29 21:30 ` Joseph Myers
2021-08-02 5:23 ` Hongtao Liu
2021-08-02 6:31 ` [PATCH V3 0/6] Initial support for AVX512FP16 liuhongt
2021-08-02 6:31 ` [PATCH 1/6] Update hf soft-fp from glibc liuhongt
2021-08-02 6:31 ` [PATCH 2/6] [i386] Enable _Float16 type for TARGET_SSE2 and above liuhongt
2021-08-04 2:45 ` Hongtao Liu
2021-08-04 11:28 ` Richard Biener
2021-08-05 7:31 ` Hongtao Liu
2021-08-05 7:39 ` Hongtao Liu
2021-08-05 9:24 ` Richard Biener
2021-08-05 9:49 ` Hongtao Liu
2021-08-05 10:14 ` Richard Biener
2021-08-06 3:32 ` [PATCH] Make sure we're playing with integral modes before call extract_integral_bit_field liuhongt
2021-08-06 3:44 ` Andrew Pinski
2021-08-06 4:59 ` Hongtao Liu
2021-08-06 5:52 ` Hongtao Liu
2021-08-06 6:59 ` Richard Biener
2021-08-06 6:57 ` Richard Biener
2021-08-06 9:05 ` Richard Sandiford
2021-08-06 11:27 ` Richard Biener [this message]
2021-08-09 8:34 ` Hongtao Liu
2021-08-17 1:52 ` Hongtao Liu
2021-08-24 9:40 ` Hongtao Liu
2021-08-24 9:44 ` Hongtao Liu
2021-08-24 11:38 ` Richard Biener
2021-08-26 1:17 ` Hongtao Liu
2021-08-25 23:16 ` Jeff Law
2021-08-26 2:05 ` Hongtao Liu
2021-08-26 7:11 ` Richard Biener
2021-08-26 9:06 ` Richard Sandiford
2021-08-26 10:14 ` Richard Biener
2021-08-26 10:50 ` Richard Sandiford
2021-08-26 11:09 ` Richard Biener
2021-08-27 4:56 ` Hongtao Liu
2021-08-30 19:09 ` Joseph Myers
2021-08-30 21:15 ` Jeff Law
2021-08-31 6:10 ` Richard Biener
2021-08-31 6:30 ` Hongtao Liu
2021-08-31 6:48 ` Hongtao Liu
2021-08-31 11:16 ` Richard Biener
2021-08-31 11:17 ` [PATCH 0/2] Get rid of all float-int special cases in validate_subreg liuhongt
2021-08-31 11:17 ` [PATCH 1/2] Revert "Make sure we're playing with integral modes before call extract_integral_bit_field." liuhongt
2021-08-31 11:17 ` [PATCH 2/2] Get rid of all float-int special cases in validate_subreg liuhongt
2021-08-31 11:57 ` Richard Biener
2021-09-02 17:55 ` Segher Boessenkool
2021-09-03 15:05 ` Andreas Schwab
2021-09-07 23:19 ` Segher Boessenkool
2021-09-08 0:55 ` Hongtao Liu
2021-09-03 12:42 ` [PATCH 2/6] [i386] Enable _Float16 type for TARGET_SSE2 and above Jakub Jelinek
2021-09-06 2:05 ` Hongtao Liu
2021-09-06 12:13 ` Jakub Jelinek
2021-09-07 1:52 ` Hongtao Liu
2021-09-07 7:17 ` Jakub Jelinek
2021-09-07 10:08 ` Hongtao Liu
2021-09-07 10:10 ` Jakub Jelinek
2021-08-02 6:31 ` [PATCH 3/6] [i386] libgcc: Enable hfmode soft-sf/df/xf/tf extensions and truncations liuhongt
2021-08-02 6:31 ` [PATCH 4/6] Support -fexcess-precision=16 which will enable FLT_EVAL_METHOD_PROMOTE_TO_FLOAT16 when backend supports _Float16 liuhongt
2021-08-02 19:34 ` Joseph Myers
2021-08-03 2:44 ` Hongtao Liu
2021-08-06 6:06 ` Hongtao Liu
2021-08-17 1:53 ` Hongtao Liu
2021-08-24 9:39 ` Hongtao Liu
2021-09-02 6:06 ` Hongtao Liu
2021-08-02 6:39 ` [PATCH 6/6] AVX512FP16: Support vector init/broadcast/set/extract for FP16 liuhongt
2021-08-02 6:44 ` [PATCH 5/6] AVX512FP16: Initial support for AVX512FP16 feature and scalar _Float16 instructions liuhongt
2021-08-04 2:40 ` Hongtao Liu
2021-08-04 9:55 ` Uros Bizjak
2021-09-02 6:06 ` [PATCH V3 0/6] Initial support for AVX512FP16 Hongtao Liu
2021-09-02 11:30 ` Iain Sandoe
2021-09-02 15:18 ` Hongtao Liu
2021-09-02 16:44 ` Iain Sandoe
2021-09-02 20:03 ` Joseph Myers
2021-09-03 7:51 ` Iain Sandoe
2021-09-03 15:33 ` Iain Sandoe
2021-09-21 20:11 ` Joseph Myers
2021-09-21 20:25 ` Iain Sandoe
2021-09-22 7:08 ` Iain Sandoe
2021-09-22 19:50 ` Joseph Myers
2021-09-02 15:30 ` H.J. Lu
2021-09-02 15:50 ` Hongtao Liu
2021-09-02 19:45 ` Joseph Myers
2021-07-21 7:43 ` [PATCH 03/10] [i386] libgcc: Enable hfmode soft-sf/df/xf/tf extensions and truncations liuhongt
2021-07-21 10:51 ` Uros Bizjak
2021-07-22 12:14 ` Richard Biener
2021-07-27 5:32 ` Hongtao Liu
2021-07-29 20:57 ` Joseph Myers
2021-08-02 5:10 ` Hongtao Liu
2021-07-21 7:43 ` [PATCH 04/10] AVX512FP16: Initial support for AVX512FP16 feature and scalar _Float16 instructions liuhongt
2021-07-22 8:49 ` Uros Bizjak
2021-07-27 7:31 ` Hongtao Liu
2021-07-21 7:43 ` [PATCH 05/10] AVX512FP16: Support vector init/broadcast/set/extract for FP16 liuhongt
2021-07-22 5:24 ` Hongtao Liu
2021-07-21 7:43 ` [PATCH 06/10] AVX512FP16: Add testcase for vector init and broadcast intrinsics liuhongt
2021-07-21 7:43 ` [PATCH 07/10] AVX512FP16: Add tests for vector passing in variable arguments liuhongt
2021-07-21 7:43 ` [PATCH 08/10] AVX512FP16: Add ABI tests for xmm liuhongt
2021-07-21 7:43 ` [PATCH 09/10] AVX512FP16: Add ABI test for ymm liuhongt
2021-07-21 7:43 ` [PATCH 10/10] AVX512FP16: Add abi test for zmm liuhongt
2021-09-08 2:54 ` [PATCH V2 00/10] Initial support for AVX512FP16 Hongtao Liu
2021-09-08 3:02 ` Hongtao Liu
2021-07-01 12:58 ` [PATCH 0/2] " Uros Bizjak
2021-07-01 21:40 ` Joseph Myers
2021-07-02 6:30 ` Hongtao Liu
2021-07-02 8:03 ` Uros Bizjak
2021-07-02 8:19 ` Richard Biener
2021-07-03 14:44 ` Hongtao Liu
2021-07-05 1:25 ` Hongtao Liu
2021-07-05 11:02 ` Richard Biener
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