From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by sourceware.org (Postfix) with ESMTPS id EF6453857814 for ; Mon, 19 Sep 2022 08:57:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org EF6453857814 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ej1-x62a.google.com with SMTP id lc7so62942388ejb.0 for ; Mon, 19 Sep 2022 01:57:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date; bh=WDGjlBnh22860YrjQWgvSCh3/xHqp8fiKQEl9yQIb5M=; b=dK1HkRd1/7T/9lW9+AjzeJQNI/no6+1rZxJPiae4DxABJPB3+vuqCB8yafloOcQ85D K2xaChkkVIuc5Mu7EJrZ4l6+rpxJ49vvr9uHFHu9XePZa7eOuftUpRlYC9jZrP5H7aoM vdYqek1UIDvpCEyjGICh8q+X468z1PtT0jiorG5htSnPLx28j+8aPKf9R0UE2jPVZPib KLCVIYSAFfNmesMksMY6y5yb5g45rm6RQEMEY0gcf1UtvtSi6NncuNnw+cOwdHajhhR8 WvgANFW4wvf+gp4w5+TrSPJImYdwnIH1P6LgWHREZYOQXtoFs/SJfubcYRd4NMs6mhKi eHGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=WDGjlBnh22860YrjQWgvSCh3/xHqp8fiKQEl9yQIb5M=; b=4do0ty6jJDYVzdzuNU45F//28UL8WuxsEqJYbnSkyyIAgQDSNZthalF7J/itcjwo3a UpSrpMTTmYoibLBATeoZFjqSlOBN9kJzqiy9RJNoGRJ/7ZoO6rMAw57F2AV1AmzXJq8D IFZrtT7eLDtQ8Gn8zxMxiRpU+0VuuFlJLBq4lB3EURzC0tUiahL8fr8M3tRt8bLixE6t DLNf6sqGCPh24r4aFbquXjHsYZU+YfiFXF9tbGBqNvM/BGIbssjMBsi/579nLHpe5LhO M0IGCSGosiE0w5lP+rdBD5ImLpnR1IPymjYVkPH09koXs/wDqMwSpPS8427B7z8C0sAL qc+g== X-Gm-Message-State: ACrzQf3Wxvvx4w4efpkXpDwN9AvsXm3X5XEXcSfO3/oepuW/+vhEyH1S EiLMTIQbQ32UFmEVoWUuM68yODpI5QGd3qHvVuYyEaJv0Ls= X-Google-Smtp-Source: AMsMyM7Xk100Bgc6y7BjHsv+JtJvIGHOkq/6lT6lH5vgYodd40BNx8levksEBkris9MbWROFdFOvV2JCQ6pqrq38O5Y= X-Received: by 2002:a17:906:8a4c:b0:780:a2b6:90f7 with SMTP id gx12-20020a1709068a4c00b00780a2b690f7mr11413925ejc.29.1663577857475; Mon, 19 Sep 2022 01:57:37 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Richard Biener Date: Mon, 19 Sep 2022 10:57:25 +0200 Message-ID: Subject: Re: [PATCH] libgcc: Decrease size of _Unwind_FrameState and even more size of cleared area in uw_frame_state_for To: Jakub Jelinek Cc: Florian Weimer , Jason Merrill , Michael Matz , gcc-patches@gcc.gnu.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Mon, Sep 19, 2022 at 9:59 AM Jakub Jelinek via Gcc-patches wrote: > > Hi! > > The following patch implements something that has Florian found as > low hanging fruit in our unwinder and has been discussed in the > https://gcc.gnu.org/wiki/cauldron2022#cauldron2022talks.inprocess_unwinding_bof > talk. > _Unwind_FrameState type seems to be (unlike the pre-GCC 3 frame_state > which has been part of ABI) private to unwind-dw2.c + unwind.inc it > includes, it is always defined on the stack of some entrypoints, initialized > by static uw_frame_state_for and the address of it is also passed to other > static functions or the static inlines handling machine dependent unwinding, > but it isn't fortunately passed to any callbacks or public functions, so I > think we can safely change it any time we want. > Florian mentioned that the structure is large even on x86_64, 384 bytes > there, starts with 328 bytes long element with frame_state_reg_info type > which then starts with an array with __LIBGCC_DWARF_FRAME_REGISTERS__ + 1 > elements, each of them is 16 bytes long, on x86_64 > __LIBGCC_DWARF_FRAME_REGISTERS__ is just 17 but even that is big, on say > riscv __LIBGCC_DWARF_FRAME_REGISTERS__ is I think 128, on powerpc 111, > on sh 153 etc. And, we memset to zero the whole fs variable with the > _Unwind_FrameState type at the start of the unwinding. > The reason why each element is 16 byte (on 64-bit arches) is that it > contains some pointer or pointer sized integer and then an enum (with just > 7 different enumerators) + padding. > > The following patch decreases it by moving the enum into a separate > array and using just one byte for each register in that second array. > We could compress it even more, say 4 bits per register, but I don't > want to uglify the code for it too much and make the accesses slower. For even more uglification and avoiding of the cache effect mentioned below we could squeeze the 4 bits into the union members, at least on 64bit platforms (probably not on 32bit ones) ... Richard. > Furthermore, the clearing of the object can clear only thos how array > and members after it, because REG_UNSAVED enumerator (0) doesn't actually > need any pointer or pointer sized integer, it is just the other kinds > that need to have there something. > By doing this, on x86_64 the above numbers change to _Unwind_FrameState > type being now 264 bytes long, frame_state_reg_info 208 bytes and we > don't clear the first 144 bytes of the object, so the memset is 120 bytes, > so ~ 31% of the old clearing size. On riscv 64-bit assuming it has same > structure layout rules for the few types used there that would be > ~ 2160 bytes of _Unwind_FrameState type before and ~ 1264 bytes after, > with the memset previously ~ 2160 bytes and after ~ 232 bytes after. > > We've also talked about possibly adding a number of initially initialized > regs and initializing the rest lazily, but at least for x86_64 with > 18 elements in the array that doesn't seem to be worth it anymore, > especially because return address column is 16 there and that is usually the > first thing to be touched. It might theory help with lots of registers if > they are usually untouched, but would uglify and complicate any stores to > how by having to check there for the not initialized yet cases and lazy > initialization, and similarly for all reads of how to do there if below > last initialized one, use how, otherwise imply REG_UNSAVED. > > The disadvantage of the patch is that touching reg[x].loc and how[x] > now means 2 cachelines rather than one as before, and I admit beyond > bootstrap/regtest I haven't benchmarked it in any way. Florian, could > you retry whatever you measured to get at the 40% of time spent on the > stack clearing to see how the numbers change? > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2022-09-19 Jakub Jelinek > > * unwind-dw2.h (REG_UNSAVED, REG_SAVED_OFFSET, REG_SAVED_REG, > REG_SAVED_EXP, REG_SAVED_VAL_OFFSET, REG_SAVED_VAL_EXP, > REG_UNDEFINED): New anonymous enum, moved from inside of > struct frame_state_reg_info. > (struct frame_state_reg_info): Remove reg[].how element and the > anonymous enum there. Add how element. > * unwind-dw2.c: Include stddef.h. > (uw_frame_state_for): Don't clear first > offsetof (_Unwind_FrameState, regs.how[0]) bytes of *fs. > (execute_cfa_program, __frame_state_for, uw_update_context_1, > uw_update_context): Use fs->regs.how[X] instead of fs->regs.reg[X].how > or fs.regs.how[X] instead of fs.regs.reg[X].how. > * config/sh/linux-unwind.h (sh_fallback_frame_state): Likewise. > * config/bfin/linux-unwind.h (bfin_fallback_frame_state): Likewise. > * config/pa/linux-unwind.h (pa32_fallback_frame_state): Likewise. > * config/pa/hpux-unwind.h (UPDATE_FS_FOR_SAR, UPDATE_FS_FOR_GR, > UPDATE_FS_FOR_FR, UPDATE_FS_FOR_PC, pa_fallback_frame_state): > Likewise. > * config/alpha/vms-unwind.h (alpha_vms_fallback_frame_state): > Likewise. > * config/alpha/linux-unwind.h (alpha_fallback_frame_state): Likewise. > * config/arc/linux-unwind.h (arc_fallback_frame_state, > arc_frob_update_context): Likewise. > * config/riscv/linux-unwind.h (riscv_fallback_frame_state): Likewise. > * config/nios2/linux-unwind.h (NIOS2_REG): Likewise. > * config/nds32/linux-unwind.h (NDS32_PUT_FS_REG): Likewise. > * config/s390/tpf-unwind.h (s390_fallback_frame_state): Likewise. > * config/s390/linux-unwind.h (s390_fallback_frame_state): Likewise. > * config/sparc/sol2-unwind.h (sparc64_frob_update_context, > MD_FALLBACK_FRAME_STATE_FOR): Likewise. > * config/sparc/linux-unwind.h (sparc64_fallback_frame_state, > sparc64_frob_update_context, sparc_fallback_frame_state): Likewise. > * config/i386/sol2-unwind.h (x86_64_fallback_frame_state, > x86_fallback_frame_state): Likewise. > * config/i386/w32-unwind.h (i386_w32_fallback_frame_state): Likewise. > * config/i386/linux-unwind.h (x86_64_fallback_frame_state, > x86_fallback_frame_state): Likewise. > * config/i386/freebsd-unwind.h (x86_64_freebsd_fallback_frame_state): > Likewise. > * config/i386/dragonfly-unwind.h > (x86_64_dragonfly_fallback_frame_state): Likewise. > * config/i386/gnu-unwind.h (x86_gnu_fallback_frame_state): Likewise. > * config/csky/linux-unwind.h (csky_fallback_frame_state): Likewise. > * config/aarch64/linux-unwind.h (aarch64_fallback_frame_state): > Likewise. > * config/aarch64/freebsd-unwind.h > (aarch64_freebsd_fallback_frame_state): Likewise. > * config/aarch64/aarch64-unwind.h (aarch64_frob_update_context): > Likewise. > * config/or1k/linux-unwind.h (or1k_fallback_frame_state): Likewise. > * config/mips/linux-unwind.h (mips_fallback_frame_state): Likewise. > * config/loongarch/linux-unwind.h (loongarch_fallback_frame_state): > Likewise. > * config/m68k/linux-unwind.h (m68k_fallback_frame_state): Likewise. > * config/xtensa/linux-unwind.h (xtensa_fallback_frame_state): > Likewise. > * config/rs6000/darwin-fallback.c (set_offset): Likewise. > * config/rs6000/aix-unwind.h (MD_FROB_UPDATE_CONTEXT): Likewise. > * config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Likewise. > * config/rs6000/freebsd-unwind.h (frob_update_context): Likewise. > > --- libgcc/unwind-dw2.h.jj 2022-02-02 09:55:32.753762894 +0100 > +++ libgcc/unwind-dw2.h 2022-09-17 16:31:18.001340756 +0200 > @@ -22,6 +22,16 @@ > see the files COPYING3 and COPYING.RUNTIME respectively. If not, see > . */ > > +enum { > + REG_UNSAVED, > + REG_SAVED_OFFSET, > + REG_SAVED_REG, > + REG_SAVED_EXP, > + REG_SAVED_VAL_OFFSET, > + REG_SAVED_VAL_EXP, > + REG_UNDEFINED > +}; > + > /* The result of interpreting the frame unwind info for a frame. > This is all symbolic at this point, as none of the values can > be resolved until the target pc is located. */ > @@ -37,16 +47,8 @@ typedef struct > _Unwind_Sword offset; > const unsigned char *exp; > } loc; > - enum { > - REG_UNSAVED, > - REG_SAVED_OFFSET, > - REG_SAVED_REG, > - REG_SAVED_EXP, > - REG_SAVED_VAL_OFFSET, > - REG_SAVED_VAL_EXP, > - REG_UNDEFINED > - } how; > } reg[__LIBGCC_DWARF_FRAME_REGISTERS__+1]; > + unsigned char how[__LIBGCC_DWARF_FRAME_REGISTERS__+1]; > > /* Used to implement DW_CFA_remember_state. */ > struct frame_state_reg_info *prev; > --- libgcc/unwind-dw2.c.jj 2022-08-03 11:22:30.501805511 +0200 > +++ libgcc/unwind-dw2.c 2022-09-17 16:46:50.186884786 +0200 > @@ -36,6 +36,7 @@ > #include "unwind-dw2-fde.h" > #include "gthr.h" > #include "unwind-dw2.h" > +#include > > #ifdef HAVE_SYS_SDT_H > #include > @@ -983,7 +984,7 @@ execute_cfa_program (const unsigned char > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > { > - fs->regs.reg[reg].how = REG_SAVED_OFFSET; > + fs->regs.how[reg] = REG_SAVED_OFFSET; > fs->regs.reg[reg].loc.offset = offset; > } > } > @@ -992,7 +993,7 @@ execute_cfa_program (const unsigned char > reg = insn & 0x3f; > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > - fs->regs.reg[reg].how = REG_UNSAVED; > + fs->regs.how[reg] = REG_UNSAVED; > } > else switch (insn) > { > @@ -1026,7 +1027,7 @@ execute_cfa_program (const unsigned char > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > { > - fs->regs.reg[reg].how = REG_SAVED_OFFSET; > + fs->regs.how[reg] = REG_SAVED_OFFSET; > fs->regs.reg[reg].loc.offset = offset; > } > break; > @@ -1037,21 +1038,21 @@ execute_cfa_program (const unsigned char > register was saved somewhere. */ > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > - fs->regs.reg[reg].how = REG_UNSAVED; > + fs->regs.how[reg] = REG_UNSAVED; > break; > > case DW_CFA_same_value: > insn_ptr = read_uleb128 (insn_ptr, ®); > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > - fs->regs.reg[reg].how = REG_UNSAVED; > + fs->regs.how[reg] = REG_UNSAVED; > break; > > case DW_CFA_undefined: > insn_ptr = read_uleb128 (insn_ptr, ®); > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > - fs->regs.reg[reg].how = REG_UNDEFINED; > + fs->regs.how[reg] = REG_UNDEFINED; > break; > > case DW_CFA_nop: > @@ -1065,7 +1066,7 @@ execute_cfa_program (const unsigned char > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > { > - fs->regs.reg[reg].how = REG_SAVED_REG; > + fs->regs.how[reg] = REG_SAVED_REG; > fs->regs.reg[reg].loc.reg = (_Unwind_Word)reg2; > } > } > @@ -1128,7 +1129,7 @@ execute_cfa_program (const unsigned char > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > { > - fs->regs.reg[reg].how = REG_SAVED_EXP; > + fs->regs.how[reg] = REG_SAVED_EXP; > fs->regs.reg[reg].loc.exp = insn_ptr; > } > insn_ptr = read_uleb128 (insn_ptr, &utmp); > @@ -1143,7 +1144,7 @@ execute_cfa_program (const unsigned char > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > { > - fs->regs.reg[reg].how = REG_SAVED_OFFSET; > + fs->regs.how[reg] = REG_SAVED_OFFSET; > fs->regs.reg[reg].loc.offset = offset; > } > break; > @@ -1171,7 +1172,7 @@ execute_cfa_program (const unsigned char > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > { > - fs->regs.reg[reg].how = REG_SAVED_VAL_OFFSET; > + fs->regs.how[reg] = REG_SAVED_VAL_OFFSET; > fs->regs.reg[reg].loc.offset = offset; > } > break; > @@ -1183,7 +1184,7 @@ execute_cfa_program (const unsigned char > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > { > - fs->regs.reg[reg].how = REG_SAVED_VAL_OFFSET; > + fs->regs.how[reg] = REG_SAVED_VAL_OFFSET; > fs->regs.reg[reg].loc.offset = offset; > } > break; > @@ -1193,7 +1194,7 @@ execute_cfa_program (const unsigned char > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > { > - fs->regs.reg[reg].how = REG_SAVED_VAL_EXP; > + fs->regs.how[reg] = REG_SAVED_VAL_EXP; > fs->regs.reg[reg].loc.exp = insn_ptr; > } > insn_ptr = read_uleb128 (insn_ptr, &utmp); > @@ -1205,14 +1206,14 @@ execute_cfa_program (const unsigned char > /* This CFA is multiplexed with Sparc. On AArch64 it's used to toggle > return address signing status. */ > reg = DWARF_REGNUM_AARCH64_RA_STATE; > - gcc_assert (fs->regs.reg[reg].how == REG_UNSAVED); > + gcc_assert (fs->regs.how[reg] == REG_UNSAVED); > fs->regs.reg[reg].loc.offset ^= 1; > #else > /* ??? Hardcoded for SPARC register window configuration. */ > if (__LIBGCC_DWARF_FRAME_REGISTERS__ >= 32) > for (reg = 16; reg < 32; ++reg) > { > - fs->regs.reg[reg].how = REG_SAVED_OFFSET; > + fs->regs.how[reg] = REG_SAVED_OFFSET; > fs->regs.reg[reg].loc.offset = (reg - 16) * sizeof (void *); > } > #endif > @@ -1232,7 +1233,7 @@ execute_cfa_program (const unsigned char > reg = DWARF_REG_TO_UNWIND_COLUMN (reg); > if (UNWIND_COLUMN_IN_RANGE (reg)) > { > - fs->regs.reg[reg].how = REG_SAVED_OFFSET; > + fs->regs.how[reg] = REG_SAVED_OFFSET; > fs->regs.reg[reg].loc.offset = -offset; > } > break; > @@ -1255,7 +1256,8 @@ uw_frame_state_for (struct _Unwind_Conte > const struct dwarf_cie *cie; > const unsigned char *aug, *insn, *end; > > - memset (fs, 0, sizeof (*fs)); > + memset (&fs->regs.how[0], 0, > + sizeof (*fs) - offsetof (_Unwind_FrameState, regs.how[0])); > context->args_size = 0; > context->lsda = 0; > > @@ -1355,7 +1357,7 @@ __frame_state_for (void *pc_target, stru > > for (reg = 0; reg < PRE_GCC3_DWARF_FRAME_REGISTERS + 1; reg++) > { > - state_in->saved[reg] = fs.regs.reg[reg].how; > + state_in->saved[reg] = fs.regs.how[reg]; > switch (state_in->saved[reg]) > { > case REG_SAVED_REG: > @@ -1453,7 +1455,7 @@ uw_update_context_1 (struct _Unwind_Cont > > /* Compute the addresses of all registers saved in this frame. */ > for (i = 0; i < __LIBGCC_DWARF_FRAME_REGISTERS__ + 1; ++i) > - switch (fs->regs.reg[i].how) > + switch (fs->regs.how[i]) > { > case REG_UNSAVED: > case REG_UNDEFINED: > @@ -1531,7 +1533,7 @@ uw_update_context (struct _Unwind_Contex > rule is handled like same_value. The only exception is > DW_CFA_undefined on retaddr_column which is supposed to > mark outermost frame in DWARF 3. */ > - if (fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (fs->retaddr_column)].how > + if (fs->regs.how[DWARF_REG_TO_UNWIND_COLUMN (fs->retaddr_column)] > == REG_UNDEFINED) > /* uw_frame_state_for uses context->ra == 0 check to find outermost > stack frame. */ > --- libgcc/config/sh/linux-unwind.h.jj 2022-02-02 09:55:32.746762946 +0100 > +++ libgcc/config/sh/linux-unwind.h 2022-09-17 16:44:00.574938657 +0200 > @@ -99,24 +99,24 @@ sh_fallback_frame_state (struct _Unwind_ > > for (i = 0; i < 15; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset > = (long)&(sc->sc_regs[i]) - new_cfa; > } > > - fs->regs.reg[SH_DWARF_FRAME_PR].how = REG_SAVED_OFFSET; > + fs->regs.how[SH_DWARF_FRAME_PR] = REG_SAVED_OFFSET; > fs->regs.reg[SH_DWARF_FRAME_PR].loc.offset > = (long)&(sc->sc_pr) - new_cfa; > - fs->regs.reg[SH_DWARF_FRAME_SR].how = REG_SAVED_OFFSET; > + fs->regs.how[SH_DWARF_FRAME_SR] = REG_SAVED_OFFSET; > fs->regs.reg[SH_DWARF_FRAME_SR].loc.offset > = (long)&(sc->sc_sr) - new_cfa; > - fs->regs.reg[SH_DWARF_FRAME_GBR].how = REG_SAVED_OFFSET; > + fs->regs.how[SH_DWARF_FRAME_GBR] = REG_SAVED_OFFSET; > fs->regs.reg[SH_DWARF_FRAME_GBR].loc.offset > = (long)&(sc->sc_gbr) - new_cfa; > - fs->regs.reg[SH_DWARF_FRAME_MACH].how = REG_SAVED_OFFSET; > + fs->regs.how[SH_DWARF_FRAME_MACH] = REG_SAVED_OFFSET; > fs->regs.reg[SH_DWARF_FRAME_MACH].loc.offset > = (long)&(sc->sc_mach) - new_cfa; > - fs->regs.reg[SH_DWARF_FRAME_MACL].how = REG_SAVED_OFFSET; > + fs->regs.how[SH_DWARF_FRAME_MACL] = REG_SAVED_OFFSET; > fs->regs.reg[SH_DWARF_FRAME_MACL].loc.offset > = (long)&(sc->sc_macl) - new_cfa; > > @@ -124,7 +124,7 @@ sh_fallback_frame_state (struct _Unwind_ > r = SH_DWARF_FRAME_FP0; > for (i = 0; i < 16; i++) > { > - fs->regs.reg[r+i].how = REG_SAVED_OFFSET; > + fs->regs.how[r+i] = REG_SAVED_OFFSET; > fs->regs.reg[r+i].loc.offset > = (long)&(sc->sc_fpregs[i]) - new_cfa; > } > @@ -132,20 +132,20 @@ sh_fallback_frame_state (struct _Unwind_ > r = SH_DWARF_FRAME_XD0; > for (i = 0; i < 8; i++) > { > - fs->regs.reg[r+i].how = REG_SAVED_OFFSET; > + fs->regs.how[r+i] = REG_SAVED_OFFSET; > fs->regs.reg[r+i].loc.offset > = (long)&(sc->sc_xfpregs[2*i]) - new_cfa; > } > > - fs->regs.reg[SH_DWARF_FRAME_FPUL].how = REG_SAVED_OFFSET; > + fs->regs.how[SH_DWARF_FRAME_FPUL] = REG_SAVED_OFFSET; > fs->regs.reg[SH_DWARF_FRAME_FPUL].loc.offset > = (long)&(sc->sc_fpul) - new_cfa; > - fs->regs.reg[SH_DWARF_FRAME_FPSCR].how = REG_SAVED_OFFSET; > + fs->regs.how[SH_DWARF_FRAME_FPSCR] = REG_SAVED_OFFSET; > fs->regs.reg[SH_DWARF_FRAME_FPSCR].loc.offset > = (long)&(sc->sc_fpscr) - new_cfa; > #endif > > - fs->regs.reg[SH_DWARF_FRAME_PC].how = REG_SAVED_OFFSET; > + fs->regs.how[SH_DWARF_FRAME_PC] = REG_SAVED_OFFSET; > fs->regs.reg[SH_DWARF_FRAME_PC].loc.offset > = (long)&(sc->sc_pc) - new_cfa; > fs->retaddr_column = SH_DWARF_FRAME_PC; > --- libgcc/config/bfin/linux-unwind.h.jj 2022-02-02 09:55:32.679763438 +0100 > +++ libgcc/config/bfin/linux-unwind.h 2022-09-17 16:44:00.584938662 +0200 > @@ -68,93 +68,93 @@ bfin_fallback_frame_state (struct _Unwin > fs->regs.cfa_reg = 14; > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long)&sc->sc_r0 - new_cfa; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (long)&sc->sc_r1 - new_cfa; > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (long)&sc->sc_r2 - new_cfa; > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > fs->regs.reg[3].loc.offset = (long)&sc->sc_r3 - new_cfa; > - fs->regs.reg[4].how = REG_SAVED_OFFSET; > + fs->regs.how[4] = REG_SAVED_OFFSET; > fs->regs.reg[4].loc.offset = (long)&sc->sc_r4 - new_cfa; > - fs->regs.reg[5].how = REG_SAVED_OFFSET; > + fs->regs.how[5] = REG_SAVED_OFFSET; > fs->regs.reg[5].loc.offset = (long)&sc->sc_r5 - new_cfa; > - fs->regs.reg[6].how = REG_SAVED_OFFSET; > + fs->regs.how[6] = REG_SAVED_OFFSET; > fs->regs.reg[6].loc.offset = (long)&sc->sc_r6 - new_cfa; > - fs->regs.reg[7].how = REG_SAVED_OFFSET; > + fs->regs.how[7] = REG_SAVED_OFFSET; > fs->regs.reg[7].loc.offset = (long)&sc->sc_r7 - new_cfa; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = (long)&sc->sc_p0 - new_cfa; > - fs->regs.reg[9].how = REG_SAVED_OFFSET; > + fs->regs.how[9] = REG_SAVED_OFFSET; > fs->regs.reg[9].loc.offset = (long)&sc->sc_p1 - new_cfa; > - fs->regs.reg[10].how = REG_SAVED_OFFSET; > + fs->regs.how[10] = REG_SAVED_OFFSET; > fs->regs.reg[10].loc.offset = (long)&sc->sc_p2 - new_cfa; > - fs->regs.reg[11].how = REG_SAVED_OFFSET; > + fs->regs.how[11] = REG_SAVED_OFFSET; > fs->regs.reg[11].loc.offset = (long)&sc->sc_p3 - new_cfa; > - fs->regs.reg[12].how = REG_SAVED_OFFSET; > + fs->regs.how[12] = REG_SAVED_OFFSET; > fs->regs.reg[12].loc.offset = (long)&sc->sc_p4 - new_cfa; > - fs->regs.reg[13].how = REG_SAVED_OFFSET; > + fs->regs.how[13] = REG_SAVED_OFFSET; > fs->regs.reg[13].loc.offset = (long)&sc->sc_p5 - new_cfa; > > - fs->regs.reg[15].how = REG_SAVED_OFFSET; > + fs->regs.how[15] = REG_SAVED_OFFSET; > fs->regs.reg[15].loc.offset = (long)&sc->sc_fp - new_cfa; > - fs->regs.reg[16].how = REG_SAVED_OFFSET; > + fs->regs.how[16] = REG_SAVED_OFFSET; > fs->regs.reg[16].loc.offset = (long)&sc->sc_i0 - new_cfa; > - fs->regs.reg[17].how = REG_SAVED_OFFSET; > + fs->regs.how[17] = REG_SAVED_OFFSET; > fs->regs.reg[17].loc.offset = (long)&sc->sc_i1 - new_cfa; > - fs->regs.reg[18].how = REG_SAVED_OFFSET; > + fs->regs.how[18] = REG_SAVED_OFFSET; > fs->regs.reg[18].loc.offset = (long)&sc->sc_i2 - new_cfa; > - fs->regs.reg[19].how = REG_SAVED_OFFSET; > + fs->regs.how[19] = REG_SAVED_OFFSET; > fs->regs.reg[19].loc.offset = (long)&sc->sc_i3 - new_cfa; > - fs->regs.reg[20].how = REG_SAVED_OFFSET; > + fs->regs.how[20] = REG_SAVED_OFFSET; > fs->regs.reg[20].loc.offset = (long)&sc->sc_b0 - new_cfa; > - fs->regs.reg[21].how = REG_SAVED_OFFSET; > + fs->regs.how[21] = REG_SAVED_OFFSET; > fs->regs.reg[21].loc.offset = (long)&sc->sc_b1 - new_cfa; > - fs->regs.reg[22].how = REG_SAVED_OFFSET; > + fs->regs.how[22] = REG_SAVED_OFFSET; > fs->regs.reg[22].loc.offset = (long)&sc->sc_b2 - new_cfa; > - fs->regs.reg[23].how = REG_SAVED_OFFSET; > + fs->regs.how[23] = REG_SAVED_OFFSET; > fs->regs.reg[23].loc.offset = (long)&sc->sc_b3 - new_cfa; > - fs->regs.reg[24].how = REG_SAVED_OFFSET; > + fs->regs.how[24] = REG_SAVED_OFFSET; > fs->regs.reg[24].loc.offset = (long)&sc->sc_l0 - new_cfa; > - fs->regs.reg[25].how = REG_SAVED_OFFSET; > + fs->regs.how[25] = REG_SAVED_OFFSET; > fs->regs.reg[25].loc.offset = (long)&sc->sc_l1 - new_cfa; > - fs->regs.reg[26].how = REG_SAVED_OFFSET; > + fs->regs.how[26] = REG_SAVED_OFFSET; > fs->regs.reg[26].loc.offset = (long)&sc->sc_l2 - new_cfa; > - fs->regs.reg[27].how = REG_SAVED_OFFSET; > + fs->regs.how[27] = REG_SAVED_OFFSET; > fs->regs.reg[27].loc.offset = (long)&sc->sc_l3 - new_cfa; > - fs->regs.reg[28].how = REG_SAVED_OFFSET; > + fs->regs.how[28] = REG_SAVED_OFFSET; > fs->regs.reg[28].loc.offset = (long)&sc->sc_m0 - new_cfa; > - fs->regs.reg[29].how = REG_SAVED_OFFSET; > + fs->regs.how[29] = REG_SAVED_OFFSET; > fs->regs.reg[29].loc.offset = (long)&sc->sc_m1 - new_cfa; > - fs->regs.reg[30].how = REG_SAVED_OFFSET; > + fs->regs.how[30] = REG_SAVED_OFFSET; > fs->regs.reg[30].loc.offset = (long)&sc->sc_m2 - new_cfa; > - fs->regs.reg[31].how = REG_SAVED_OFFSET; > + fs->regs.how[31] = REG_SAVED_OFFSET; > fs->regs.reg[31].loc.offset = (long)&sc->sc_m3 - new_cfa; > /* FIXME: Handle A0, A1, CC. */ > - fs->regs.reg[35].how = REG_SAVED_OFFSET; > + fs->regs.how[35] = REG_SAVED_OFFSET; > fs->regs.reg[35].loc.offset = (long)&sc->sc_rets - new_cfa; > - fs->regs.reg[36].how = REG_SAVED_OFFSET; > + fs->regs.how[36] = REG_SAVED_OFFSET; > fs->regs.reg[36].loc.offset = (long)&sc->sc_pc - new_cfa; > - fs->regs.reg[37].how = REG_SAVED_OFFSET; > + fs->regs.how[37] = REG_SAVED_OFFSET; > fs->regs.reg[37].loc.offset = (long)&sc->sc_retx - new_cfa; > > - fs->regs.reg[40].how = REG_SAVED_OFFSET; > + fs->regs.how[40] = REG_SAVED_OFFSET; > fs->regs.reg[40].loc.offset = (long)&sc->sc_astat - new_cfa; > - fs->regs.reg[41].how = REG_SAVED_OFFSET; > + fs->regs.how[41] = REG_SAVED_OFFSET; > fs->regs.reg[41].loc.offset = (long)&sc->sc_seqstat - new_cfa; > > - fs->regs.reg[44].how = REG_SAVED_OFFSET; > + fs->regs.how[44] = REG_SAVED_OFFSET; > fs->regs.reg[44].loc.offset = (long)&sc->sc_lt0 - new_cfa; > - fs->regs.reg[45].how = REG_SAVED_OFFSET; > + fs->regs.how[45] = REG_SAVED_OFFSET; > fs->regs.reg[45].loc.offset = (long)&sc->sc_lt1 - new_cfa; > - fs->regs.reg[46].how = REG_SAVED_OFFSET; > + fs->regs.how[46] = REG_SAVED_OFFSET; > fs->regs.reg[46].loc.offset = (long)&sc->sc_lc0 - new_cfa; > - fs->regs.reg[47].how = REG_SAVED_OFFSET; > + fs->regs.how[47] = REG_SAVED_OFFSET; > fs->regs.reg[47].loc.offset = (long)&sc->sc_lc1 - new_cfa; > - fs->regs.reg[48].how = REG_SAVED_OFFSET; > + fs->regs.how[48] = REG_SAVED_OFFSET; > fs->regs.reg[48].loc.offset = (long)&sc->sc_lb0 - new_cfa; > - fs->regs.reg[49].how = REG_SAVED_OFFSET; > + fs->regs.how[49] = REG_SAVED_OFFSET; > fs->regs.reg[49].loc.offset = (long)&sc->sc_lb1 - new_cfa; > fs->retaddr_column = 35; > > --- libgcc/config/pa/linux-unwind.h.jj 2022-02-02 09:55:32.738763004 +0100 > +++ libgcc/config/pa/linux-unwind.h 2022-09-17 16:44:00.600938670 +0200 > @@ -138,22 +138,22 @@ pa32_fallback_frame_state (struct _Unwin > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > for (i = 1; i <= 31; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = (long)&sc->sc_gr[i] - new_cfa; > } > for (i = 4; i <= 31; i++) > { > /* FP regs have left and right halves */ > - fs->regs.reg[2*i+24].how = REG_SAVED_OFFSET; > + fs->regs.how[2*i+24] = REG_SAVED_OFFSET; > fs->regs.reg[2*i+24].loc.offset > = (long)&sc->sc_fr[i] - new_cfa; > - fs->regs.reg[2*i+24+1].how = REG_SAVED_OFFSET; > + fs->regs.how[2*i+24+1] = REG_SAVED_OFFSET; > fs->regs.reg[2*i+24+1].loc.offset > = (long)&sc->sc_fr[i] + 4 - new_cfa; > } > - fs->regs.reg[88].how = REG_SAVED_OFFSET; > + fs->regs.how[88] = REG_SAVED_OFFSET; > fs->regs.reg[88].loc.offset = (long) &sc->sc_sar - new_cfa; > - fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].how > + fs->regs.how[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__] > = REG_SAVED_OFFSET; > fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].loc.offset > = (long) &sc->sc_iaoq[0] - new_cfa; > --- libgcc/config/pa/hpux-unwind.h.jj 2022-02-02 09:55:32.738763004 +0100 > +++ libgcc/config/pa/hpux-unwind.h 2022-09-17 16:44:00.592938666 +0200 > @@ -57,19 +57,19 @@ see the files COPYING3 and COPYING.RUNTI > #endif > > #define UPDATE_FS_FOR_SAR(FS, N) \ > - (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \ > + (FS)->regs.how[N] = REG_SAVED_OFFSET; \ > (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_cr11) - new_cfa > > #define UPDATE_FS_FOR_GR(FS, GRN, N) \ > - (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \ > + (FS)->regs.how[N] = REG_SAVED_OFFSET; \ > (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_gr##GRN) - new_cfa > > #define UPDATE_FS_FOR_FR(FS, FRN, N) \ > - (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \ > + (FS)->regs.how[N] = REG_SAVED_OFFSET; \ > (FS)->regs.reg[N].loc.offset = (long) &(mc->ss_fr##FRN) - new_cfa; > > #define UPDATE_FS_FOR_PC(FS, N) \ > - (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \ > + (FS)->regs.how[N] = REG_SAVED_OFFSET; \ > (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_pcoq_head) - new_cfa > > /* Extract bit field from word using HP's numbering (MSB = 0). */ > @@ -151,7 +151,7 @@ pa_fallback_frame_state (struct _Unwind_ > fs->regs.cfa_offset = 0; > > fs->retaddr_column = 0; > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = -24; > > /* Update context to describe the stub frame. */ > @@ -171,7 +171,7 @@ pa_fallback_frame_state (struct _Unwind_ > fs->regs.cfa_offset = 0; > > fs->retaddr_column = 0; > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = -8; > > /* Update context to describe the stub frame. */ > --- libgcc/config/alpha/vms-unwind.h.jj 2022-02-02 09:55:32.674763475 +0100 > +++ libgcc/config/alpha/vms-unwind.h 2022-09-17 16:44:00.614938677 +0200 > @@ -50,7 +50,7 @@ extern int SYS$GL_CALL_HANDL; > > #define UPDATE_FS_FOR_CFA_GR(FS, GRN, LOC, CFA) \ > do { \ > -(FS)->regs.reg[GRN].how = REG_SAVED_OFFSET; \ > +(FS)->regs.how[GRN] = REG_SAVED_OFFSET; \ > (FS)->regs.reg[GRN].loc.offset = (_Unwind_Sword) ((REG) (LOC) - (REG) (CFA)); \ > } while (0); > > @@ -212,10 +212,10 @@ alpha_vms_fallback_frame_state (struct _ > if (eh_debug) > printf ("FALLBACK: REGISTER frame procedure\n"); > > - fs->regs.reg[RA_COLUMN].how = REG_SAVED_REG; > + fs->regs.how[RA_COLUMN] = REG_SAVED_REG; > fs->regs.reg[RA_COLUMN].loc.reg = pv->pdsc$b_save_ra; > > - fs->regs.reg[29].how = REG_SAVED_REG; > + fs->regs.how[29] = REG_SAVED_REG; > fs->regs.reg[29].loc.reg = pv->pdsc$b_save_fp; > > break; > --- libgcc/config/alpha/linux-unwind.h.jj 2022-02-02 09:55:32.673763482 +0100 > +++ libgcc/config/alpha/linux-unwind.h 2022-09-17 16:44:00.607938673 +0200 > @@ -67,17 +67,17 @@ alpha_fallback_frame_state (struct _Unwi > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > for (i = 0; i < 30; ++i) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset > = (long) &sc->sc_regs[i] - new_cfa; > } > for (i = 0; i < 31; ++i) > { > - fs->regs.reg[i+32].how = REG_SAVED_OFFSET; > + fs->regs.how[i+32] = REG_SAVED_OFFSET; > fs->regs.reg[i+32].loc.offset > = (long) &sc->sc_fpregs[i] - new_cfa; > } > - fs->regs.reg[64].how = REG_SAVED_OFFSET; > + fs->regs.how[64] = REG_SAVED_OFFSET; > fs->regs.reg[64].loc.offset = (long)&sc->sc_pc - new_cfa; > fs->retaddr_column = 64; > fs->signal_frame = 1; > --- libgcc/config/arc/linux-unwind.h.jj 2022-02-02 09:55:32.676763460 +0100 > +++ libgcc/config/arc/linux-unwind.h 2022-09-17 16:44:00.620938680 +0200 > @@ -122,7 +122,7 @@ arc_fallback_frame_state (struct _Unwind > > fs->signal_frame = 1; > fs->retaddr_column = __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__; > - fs->regs.reg[fs->retaddr_column].how = REG_SAVED_VAL_OFFSET; > + fs->regs.how[fs->retaddr_column] = REG_SAVED_VAL_OFFSET; > fs->regs.reg[fs->retaddr_column].loc.offset = > ((_Unwind_Ptr) (regs[ret])) - new_cfa; > > @@ -140,7 +140,7 @@ arc_frob_update_context (struct _Unwind_ > _Unwind_Word fp_val; > asm ("mov %0,fp" : "=r" (fp_val)); > > - switch (fs->regs.reg[27].how) > + switch (fs->regs.how[27]) > { > case REG_UNSAVED: > case REG_UNDEFINED: > --- libgcc/config/riscv/linux-unwind.h.jj 2022-02-02 09:55:32.740762990 +0100 > +++ libgcc/config/riscv/linux-unwind.h 2022-09-17 16:44:00.626938683 +0200 > @@ -73,13 +73,13 @@ riscv_fallback_frame_state (struct _Unwi > > for (i = 0; i < 32; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = (_Unwind_Ptr) &sc->gregs[i] - new_cfa; > } > > fs->signal_frame = 1; > fs->retaddr_column = __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__; > - fs->regs.reg[fs->retaddr_column].how = REG_SAVED_VAL_OFFSET; > + fs->regs.how[fs->retaddr_column] = REG_SAVED_VAL_OFFSET; > fs->regs.reg[fs->retaddr_column].loc.offset = > (_Unwind_Ptr) sc->gregs[0] - new_cfa; > > --- libgcc/config/nios2/linux-unwind.h.jj 2022-02-02 09:55:32.738763004 +0100 > +++ libgcc/config/nios2/linux-unwind.h 2022-09-17 16:44:00.632938686 +0200 > @@ -61,7 +61,7 @@ nios2_fallback_frame_state (struct _Unwi > return _URC_END_OF_STACK; > > #define NIOS2_REG(NUM,NAME) \ > - (fs->regs.reg[NUM].how = REG_SAVED_OFFSET, \ > + (fs->regs.how[NUM] = REG_SAVED_OFFSET, \ > fs->regs.reg[NUM].loc.offset = (_Unwind_Ptr)&(regs->NAME) - new_cfa) > > if (pc[0] == (0x00800004 | (__NR_rt_sigreturn << 6))) > --- libgcc/config/nds32/linux-unwind.h.jj 2022-02-02 09:55:32.737763012 +0100 > +++ libgcc/config/nds32/linux-unwind.h 2022-09-17 16:44:00.638938689 +0200 > @@ -92,7 +92,7 @@ nds32_fallback_frame_state (struct _Unwi > fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa; > > #define NDS32_PUT_FS_REG(NUM, NAME) \ > - (fs->regs.reg[NUM].how = REG_SAVED_OFFSET, \ > + (fs->regs.how[NUM] = REG_SAVED_OFFSET, \ > fs->regs.reg[NUM].loc.offset = (_Unwind_Ptr) &(sc_->NAME) - new_cfa) > > /* Restore all registers value. */ > --- libgcc/config/s390/tpf-unwind.h.jj 2022-02-02 09:55:32.745762953 +0100 > +++ libgcc/config/s390/tpf-unwind.h 2022-09-17 16:44:00.645938693 +0200 > @@ -88,18 +88,18 @@ s390_fallback_frame_state (struct _Unwin > /* All registers remain unchanged ... */ > for (i = 0; i < 32; i++) > { > - fs->regs.reg[i].how = REG_SAVED_REG; > + fs->regs.how[i] = REG_SAVED_REG; > fs->regs.reg[i].loc.reg = i; > } > > /* ... except for %r14, which is stored at CFA+offset where offset > is displacment of ICST_CRET or ICST_SRET from CFA */ > if ( __isPATrange(context->ra) ) { > - fs->regs.reg[14].how = REG_SAVED_OFFSET; > + fs->regs.how[14] = REG_SAVED_OFFSET; > fs->regs.reg[14].loc.offset = ICST_CRET - STACK_POINTER_OFFSET; > fs->retaddr_column = 14; > } else { > - fs->regs.reg[14].how = REG_SAVED_OFFSET; > + fs->regs.how[14] = REG_SAVED_OFFSET; > fs->regs.reg[14].loc.offset = ICST_SRET - STACK_POINTER_OFFSET; > fs->retaddr_column = 14; > > @@ -119,13 +119,13 @@ s390_fallback_frame_state (struct _Unwin > > for (i = 0; i < 16; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = regs + i*8 - new_cfa; > } > > for (i = 0; i < 4; i++) > { > - fs->regs.reg[16 + i].how = REG_SAVED_OFFSET; > + fs->regs.how[16 + i] = REG_SAVED_OFFSET; > fs->regs.reg[16 + i].loc.offset = regs + 16*8 + i*8 - new_cfa; > } > > --- libgcc/config/s390/linux-unwind.h.jj 2022-02-02 09:55:32.745762953 +0100 > +++ libgcc/config/s390/linux-unwind.h 2022-09-17 16:44:00.651938696 +0200 > @@ -106,20 +106,20 @@ s390_fallback_frame_state (struct _Unwin > > for (i = 0; i < 16; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = > (long)®s->gprs[i] - new_cfa; > } > for (i = 0; i < 16; i++) > { > - fs->regs.reg[16+i].how = REG_SAVED_OFFSET; > + fs->regs.how[16+i] = REG_SAVED_OFFSET; > fs->regs.reg[16+i].loc.offset = > (long)®s->fprs[dwarf_to_fpr_map[i]] - new_cfa; > } > > /* Load return addr from PSW into dummy register 32. */ > > - fs->regs.reg[32].how = REG_SAVED_OFFSET; > + fs->regs.how[32] = REG_SAVED_OFFSET; > fs->regs.reg[32].loc.offset = (long)®s->psw_addr - new_cfa; > fs->retaddr_column = 32; > /* SIGILL, SIGFPE and SIGTRAP are delivered with psw_addr > --- libgcc/config/sparc/sol2-unwind.h.jj 2022-02-02 09:55:32.746762946 +0100 > +++ libgcc/config/sparc/sol2-unwind.h 2022-09-17 16:44:00.657938699 +0200 > @@ -96,7 +96,7 @@ sparc64_frob_update_context (struct _Unw > context->cfa -= STACK_BIAS; > > for (i = 0; i < __LIBGCC_DWARF_FRAME_REGISTERS__ + 1; ++i) > - if (fs->regs.reg[i].how == REG_SAVED_OFFSET) > + if (fs->regs.how[i] == REG_SAVED_OFFSET) > _Unwind_SetGRPtr (context, i, > _Unwind_GetGRPtr (context, i) - STACK_BIAS); > } > @@ -221,7 +221,7 @@ MD_FALLBACK_FRAME_STATE_FOR (struct _Unw > continue; > > /* First the global registers and then the out registers. */ > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = (long)&mctx->gregs[REG_Y + i] - new_cfa; > } > > @@ -229,7 +229,7 @@ MD_FALLBACK_FRAME_STATE_FOR (struct _Unw > the register window (in and local registers) was saved. */ > for (i = 0; i < 16; i++) > { > - fs->regs.reg[i + 16].how = REG_SAVED_OFFSET; > + fs->regs.how[i + 16] = REG_SAVED_OFFSET; > fs->regs.reg[i + 16].loc.offset = i * sizeof(long); > } > > @@ -238,7 +238,7 @@ MD_FALLBACK_FRAME_STATE_FOR (struct _Unw > { > for (i = 0; i < 32; i++) > { > - fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; > + fs->regs.how[i + 32] = REG_SAVED_OFFSET; > fs->regs.reg[i + 32].loc.offset > = (long)&mctx->fpregs.fpu_fr.fpu_regs[i] - new_cfa; > } > @@ -250,7 +250,7 @@ MD_FALLBACK_FRAME_STATE_FOR (struct _Unw > if (i > 32 && (i & 1)) > continue; > > - fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; > + fs->regs.how[i + 32] = REG_SAVED_OFFSET; > fs->regs.reg[i + 32].loc.offset > = (long)&mctx->fpregs.fpu_fr.fpu_dregs[i/2] - new_cfa; > } > @@ -265,7 +265,7 @@ MD_FALLBACK_FRAME_STATE_FOR (struct _Unw > shifted_ra_location = &mctx->gregs[REG_Y]; > *(void **)shifted_ra_location = *(void **)ra_location - 8; > fs->retaddr_column = 0; > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long)shifted_ra_location - new_cfa; > > /* SIGFPE for IEEE-754 exceptions is delivered after the faulting insn > --- libgcc/config/sparc/linux-unwind.h.jj 2022-02-02 09:55:32.746762946 +0100 > +++ libgcc/config/sparc/linux-unwind.h 2022-09-17 16:44:00.664938703 +0200 > @@ -65,13 +65,13 @@ sparc64_fallback_frame_state (struct _Un > if ((unsigned int) i == __builtin_dwarf_sp_column ()) > continue; > > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset > = this_cfa + regs_off + (i * 8) - new_cfa; > } > for (i = 0; i < 16; i++) > { > - fs->regs.reg[i + 16].how = REG_SAVED_OFFSET; > + fs->regs.how[i + 16] = REG_SAVED_OFFSET; > fs->regs.reg[i + 16].loc.offset > = this_cfa + (i * 8) - new_cfa; > } > @@ -81,7 +81,7 @@ sparc64_fallback_frame_state (struct _Un > { > if (i > 32 && (i & 0x1)) > continue; > - fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; > + fs->regs.how[i + 32] = REG_SAVED_OFFSET; > fs->regs.reg[i + 32].loc.offset > = fpu_save + (i * 4) - new_cfa; > } > @@ -95,7 +95,7 @@ sparc64_fallback_frame_state (struct _Un > shifted_ra_location = this_cfa + regs_off + 19 * 8; /* Y register */ > *(long *)shifted_ra_location = *(long *)ra_location - 8; > fs->retaddr_column = 0; > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = shifted_ra_location - new_cfa; > fs->signal_frame = 1; > > @@ -122,7 +122,7 @@ sparc64_frob_update_context (struct _Unw > context->cfa -= STACK_BIAS; > > for (i = 0; i < __LIBGCC_DWARF_FRAME_REGISTERS__ + 1; ++i) > - if (fs->regs.reg[i].how == REG_SAVED_OFFSET) > + if (fs->regs.how[i] == REG_SAVED_OFFSET) > _Unwind_SetGRPtr (context, i, > _Unwind_GetGRPtr (context, i) - STACK_BIAS); > } > @@ -177,13 +177,13 @@ sparc_fallback_frame_state (struct _Unwi > if ((unsigned int) i == __builtin_dwarf_sp_column ()) > continue; > > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset > = this_cfa + regs_off + (4 * 4) + (i * 4) - new_cfa; > } > for (i = 0; i < 16; i++) > { > - fs->regs.reg[i + 16].how = REG_SAVED_OFFSET; > + fs->regs.how[i + 16] = REG_SAVED_OFFSET; > fs->regs.reg[i + 16].loc.offset > = this_cfa + (i * 4) - new_cfa; > } > @@ -191,7 +191,7 @@ sparc_fallback_frame_state (struct _Unwi > { > for (i = 0; i < 32; i++) > { > - fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; > + fs->regs.how[i + 32] = REG_SAVED_OFFSET; > fs->regs.reg[i + 32].loc.offset > = fpu_save + (i * 4) - new_cfa; > } > @@ -205,7 +205,7 @@ sparc_fallback_frame_state (struct _Unwi > shifted_ra_location = this_cfa + regs_off + 3 * 4; /* Y register */ > *(int *)shifted_ra_location = *(int *)ra_location - 8; > fs->retaddr_column = 0; > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = shifted_ra_location - new_cfa; > fs->signal_frame = 1; > > --- libgcc/config/i386/sol2-unwind.h.jj 2022-02-02 09:55:32.686763387 +0100 > +++ libgcc/config/i386/sol2-unwind.h 2022-09-17 16:44:00.670938706 +0200 > @@ -94,37 +94,37 @@ x86_64_fallback_frame_state (struct _Unw > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > > /* The SVR4 register numbering macros aren't usable in libgcc. */ > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long)&mctx->gregs[REG_RAX] - new_cfa; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (long)&mctx->gregs[REG_RDX] - new_cfa; > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (long)&mctx->gregs[REG_RCX] - new_cfa; > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > fs->regs.reg[3].loc.offset = (long)&mctx->gregs[REG_RBX] - new_cfa; > - fs->regs.reg[4].how = REG_SAVED_OFFSET; > + fs->regs.how[4] = REG_SAVED_OFFSET; > fs->regs.reg[4].loc.offset = (long)&mctx->gregs[REG_RSI] - new_cfa; > - fs->regs.reg[5].how = REG_SAVED_OFFSET; > + fs->regs.how[5] = REG_SAVED_OFFSET; > fs->regs.reg[5].loc.offset = (long)&mctx->gregs[REG_RDI] - new_cfa; > - fs->regs.reg[6].how = REG_SAVED_OFFSET; > + fs->regs.how[6] = REG_SAVED_OFFSET; > fs->regs.reg[6].loc.offset = (long)&mctx->gregs[REG_RBP] - new_cfa; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = (long)&mctx->gregs[REG_R8] - new_cfa; > - fs->regs.reg[9].how = REG_SAVED_OFFSET; > + fs->regs.how[9] = REG_SAVED_OFFSET; > fs->regs.reg[9].loc.offset = (long)&mctx->gregs[REG_R9] - new_cfa; > - fs->regs.reg[10].how = REG_SAVED_OFFSET; > + fs->regs.how[10] = REG_SAVED_OFFSET; > fs->regs.reg[10].loc.offset = (long)&mctx->gregs[REG_R10] - new_cfa; > - fs->regs.reg[11].how = REG_SAVED_OFFSET; > + fs->regs.how[11] = REG_SAVED_OFFSET; > fs->regs.reg[11].loc.offset = (long)&mctx->gregs[REG_R11] - new_cfa; > - fs->regs.reg[12].how = REG_SAVED_OFFSET; > + fs->regs.how[12] = REG_SAVED_OFFSET; > fs->regs.reg[12].loc.offset = (long)&mctx->gregs[REG_R12] - new_cfa; > - fs->regs.reg[13].how = REG_SAVED_OFFSET; > + fs->regs.how[13] = REG_SAVED_OFFSET; > fs->regs.reg[13].loc.offset = (long)&mctx->gregs[REG_R13] - new_cfa; > - fs->regs.reg[14].how = REG_SAVED_OFFSET; > + fs->regs.how[14] = REG_SAVED_OFFSET; > fs->regs.reg[14].loc.offset = (long)&mctx->gregs[REG_R14] - new_cfa; > - fs->regs.reg[15].how = REG_SAVED_OFFSET; > + fs->regs.how[15] = REG_SAVED_OFFSET; > fs->regs.reg[15].loc.offset = (long)&mctx->gregs[REG_R15] - new_cfa; > - fs->regs.reg[16].how = REG_SAVED_OFFSET; > + fs->regs.how[16] = REG_SAVED_OFFSET; > fs->regs.reg[16].loc.offset = (long)&mctx->gregs[REG_RIP] - new_cfa; > fs->retaddr_column = 16; > fs->signal_frame = 1; > @@ -180,21 +180,21 @@ x86_fallback_frame_state (struct _Unwind > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > > /* The SVR4 register numbering macros aren't usable in libgcc. */ > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long)&mctx->gregs[EAX] - new_cfa; > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > fs->regs.reg[3].loc.offset = (long)&mctx->gregs[EBX] - new_cfa; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (long)&mctx->gregs[ECX] - new_cfa; > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (long)&mctx->gregs[EDX] - new_cfa; > - fs->regs.reg[6].how = REG_SAVED_OFFSET; > + fs->regs.how[6] = REG_SAVED_OFFSET; > fs->regs.reg[6].loc.offset = (long)&mctx->gregs[ESI] - new_cfa; > - fs->regs.reg[7].how = REG_SAVED_OFFSET; > + fs->regs.how[7] = REG_SAVED_OFFSET; > fs->regs.reg[7].loc.offset = (long)&mctx->gregs[EDI] - new_cfa; > - fs->regs.reg[5].how = REG_SAVED_OFFSET; > + fs->regs.how[5] = REG_SAVED_OFFSET; > fs->regs.reg[5].loc.offset = (long)&mctx->gregs[EBP] - new_cfa; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = (long)&mctx->gregs[EIP] - new_cfa; > fs->retaddr_column = 8; > > --- libgcc/config/i386/w32-unwind.h.jj 2022-02-02 09:55:32.686763387 +0100 > +++ libgcc/config/i386/w32-unwind.h 2022-09-17 16:44:00.682938712 +0200 > @@ -153,21 +153,21 @@ i386_w32_fallback_frame_state (struct _U > fs->regs.cfa_offset = new_cfa_ - (long) ctx_cfa_; > > /* Restore registers. */ > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long)&proc_ctx_->Eax - new_cfa_; > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > fs->regs.reg[3].loc.offset = (long)&proc_ctx_->Ebx - new_cfa_; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (long)&proc_ctx_->Ecx - new_cfa_; > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (long)&proc_ctx_->Edx - new_cfa_; > - fs->regs.reg[6].how = REG_SAVED_OFFSET; > + fs->regs.how[6] = REG_SAVED_OFFSET; > fs->regs.reg[6].loc.offset = (long)&proc_ctx_->Esi - new_cfa_; > - fs->regs.reg[7].how = REG_SAVED_OFFSET; > + fs->regs.how[7] = REG_SAVED_OFFSET; > fs->regs.reg[7].loc.offset = (long)&proc_ctx_->Edi - new_cfa_; > - fs->regs.reg[5].how = REG_SAVED_OFFSET; > + fs->regs.how[5] = REG_SAVED_OFFSET; > fs->regs.reg[5].loc.offset = (long)&proc_ctx_->Ebp - new_cfa_; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = (long)&proc_ctx_->Eip - new_cfa_; > fs->retaddr_column = 8; > fs->signal_frame = 1; > @@ -189,12 +189,12 @@ i386_w32_fallback_frame_state (struct _U > fs->regs.cfa_offset = new_cfa_ - (long) ctx_cfa_; > > /* The saved value of %ecx is at CFA - 4 */ > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = -4; > > /* and what is stored at the CFA is the return address. */ > fs->retaddr_column = 8; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = 0; > fs->signal_frame = 1; > > --- libgcc/config/i386/linux-unwind.h.jj 2022-02-02 09:55:32.685763394 +0100 > +++ libgcc/config/i386/linux-unwind.h 2022-09-17 16:44:00.694938718 +0200 > @@ -79,37 +79,37 @@ x86_64_fallback_frame_state (struct _Unw > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > > /* The SVR4 register numbering macros aren't usable in libgcc. */ > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long)&sc->rax - new_cfa; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (long)&sc->rdx - new_cfa; > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (long)&sc->rcx - new_cfa; > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > fs->regs.reg[3].loc.offset = (long)&sc->rbx - new_cfa; > - fs->regs.reg[4].how = REG_SAVED_OFFSET; > + fs->regs.how[4] = REG_SAVED_OFFSET; > fs->regs.reg[4].loc.offset = (long)&sc->rsi - new_cfa; > - fs->regs.reg[5].how = REG_SAVED_OFFSET; > + fs->regs.how[5] = REG_SAVED_OFFSET; > fs->regs.reg[5].loc.offset = (long)&sc->rdi - new_cfa; > - fs->regs.reg[6].how = REG_SAVED_OFFSET; > + fs->regs.how[6] = REG_SAVED_OFFSET; > fs->regs.reg[6].loc.offset = (long)&sc->rbp - new_cfa; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = (long)&sc->r8 - new_cfa; > - fs->regs.reg[9].how = REG_SAVED_OFFSET; > + fs->regs.how[9] = REG_SAVED_OFFSET; > fs->regs.reg[9].loc.offset = (long)&sc->r9 - new_cfa; > - fs->regs.reg[10].how = REG_SAVED_OFFSET; > + fs->regs.how[10] = REG_SAVED_OFFSET; > fs->regs.reg[10].loc.offset = (long)&sc->r10 - new_cfa; > - fs->regs.reg[11].how = REG_SAVED_OFFSET; > + fs->regs.how[11] = REG_SAVED_OFFSET; > fs->regs.reg[11].loc.offset = (long)&sc->r11 - new_cfa; > - fs->regs.reg[12].how = REG_SAVED_OFFSET; > + fs->regs.how[12] = REG_SAVED_OFFSET; > fs->regs.reg[12].loc.offset = (long)&sc->r12 - new_cfa; > - fs->regs.reg[13].how = REG_SAVED_OFFSET; > + fs->regs.how[13] = REG_SAVED_OFFSET; > fs->regs.reg[13].loc.offset = (long)&sc->r13 - new_cfa; > - fs->regs.reg[14].how = REG_SAVED_OFFSET; > + fs->regs.how[14] = REG_SAVED_OFFSET; > fs->regs.reg[14].loc.offset = (long)&sc->r14 - new_cfa; > - fs->regs.reg[15].how = REG_SAVED_OFFSET; > + fs->regs.how[15] = REG_SAVED_OFFSET; > fs->regs.reg[15].loc.offset = (long)&sc->r15 - new_cfa; > - fs->regs.reg[16].how = REG_SAVED_OFFSET; > + fs->regs.how[16] = REG_SAVED_OFFSET; > fs->regs.reg[16].loc.offset = (long)&sc->rip - new_cfa; > fs->retaddr_column = 16; > fs->signal_frame = 1; > @@ -159,21 +159,21 @@ x86_fallback_frame_state (struct _Unwind > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > > /* The SVR4 register numbering macros aren't usable in libgcc. */ > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long)&sc->eax - new_cfa; > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > fs->regs.reg[3].loc.offset = (long)&sc->ebx - new_cfa; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (long)&sc->ecx - new_cfa; > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (long)&sc->edx - new_cfa; > - fs->regs.reg[6].how = REG_SAVED_OFFSET; > + fs->regs.how[6] = REG_SAVED_OFFSET; > fs->regs.reg[6].loc.offset = (long)&sc->esi - new_cfa; > - fs->regs.reg[7].how = REG_SAVED_OFFSET; > + fs->regs.how[7] = REG_SAVED_OFFSET; > fs->regs.reg[7].loc.offset = (long)&sc->edi - new_cfa; > - fs->regs.reg[5].how = REG_SAVED_OFFSET; > + fs->regs.how[5] = REG_SAVED_OFFSET; > fs->regs.reg[5].loc.offset = (long)&sc->ebp - new_cfa; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = (long)&sc->eip - new_cfa; > fs->retaddr_column = 8; > fs->signal_frame = 1; > --- libgcc/config/i386/freebsd-unwind.h.jj 2022-02-02 09:55:32.685763394 +0100 > +++ libgcc/config/i386/freebsd-unwind.h 2022-09-17 16:44:00.676938709 +0200 > @@ -110,37 +110,37 @@ x86_64_freebsd_fallback_frame_state > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > > /* The SVR4 register numbering macros aren't usable in libgcc. */ > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long)&sf->REG_NAME(rax) - new_cfa; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (long)&sf->REG_NAME(rdx) - new_cfa; > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (long)&sf->REG_NAME(rcx) - new_cfa; > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > fs->regs.reg[3].loc.offset = (long)&sf->REG_NAME(rbx) - new_cfa; > - fs->regs.reg[4].how = REG_SAVED_OFFSET; > + fs->regs.how[4] = REG_SAVED_OFFSET; > fs->regs.reg[4].loc.offset = (long)&sf->REG_NAME(rsi) - new_cfa; > - fs->regs.reg[5].how = REG_SAVED_OFFSET; > + fs->regs.how[5] = REG_SAVED_OFFSET; > fs->regs.reg[5].loc.offset = (long)&sf->REG_NAME(rdi) - new_cfa; > - fs->regs.reg[6].how = REG_SAVED_OFFSET; > + fs->regs.how[6] = REG_SAVED_OFFSET; > fs->regs.reg[6].loc.offset = (long)&sf->REG_NAME(rbp) - new_cfa; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = (long)&sf->REG_NAME(r8) - new_cfa; > - fs->regs.reg[9].how = REG_SAVED_OFFSET; > + fs->regs.how[9] = REG_SAVED_OFFSET; > fs->regs.reg[9].loc.offset = (long)&sf->REG_NAME(r9) - new_cfa; > - fs->regs.reg[10].how = REG_SAVED_OFFSET; > + fs->regs.how[10] = REG_SAVED_OFFSET; > fs->regs.reg[10].loc.offset = (long)&sf->REG_NAME(r10) - new_cfa; > - fs->regs.reg[11].how = REG_SAVED_OFFSET; > + fs->regs.how[11] = REG_SAVED_OFFSET; > fs->regs.reg[11].loc.offset = (long)&sf->REG_NAME(r11) - new_cfa; > - fs->regs.reg[12].how = REG_SAVED_OFFSET; > + fs->regs.how[12] = REG_SAVED_OFFSET; > fs->regs.reg[12].loc.offset = (long)&sf->REG_NAME(r12) - new_cfa; > - fs->regs.reg[13].how = REG_SAVED_OFFSET; > + fs->regs.how[13] = REG_SAVED_OFFSET; > fs->regs.reg[13].loc.offset = (long)&sf->REG_NAME(r13) - new_cfa; > - fs->regs.reg[14].how = REG_SAVED_OFFSET; > + fs->regs.how[14] = REG_SAVED_OFFSET; > fs->regs.reg[14].loc.offset = (long)&sf->REG_NAME(r14) - new_cfa; > - fs->regs.reg[15].how = REG_SAVED_OFFSET; > + fs->regs.how[15] = REG_SAVED_OFFSET; > fs->regs.reg[15].loc.offset = (long)&sf->REG_NAME(r15) - new_cfa; > - fs->regs.reg[16].how = REG_SAVED_OFFSET; > + fs->regs.how[16] = REG_SAVED_OFFSET; > fs->regs.reg[16].loc.offset = (long)&sf->REG_NAME(rip) - new_cfa; > fs->retaddr_column = 16; > fs->signal_frame = 1; > @@ -189,21 +189,21 @@ x86_freebsd_fallback_frame_state > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > > /* The SVR4 register numbering macros aren't usable in libgcc. */ > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long)&sf->REG_NAME(eax) - new_cfa; > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > fs->regs.reg[3].loc.offset = (long)&sf->REG_NAME(ebx) - new_cfa; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (long)&sf->REG_NAME(ecx) - new_cfa; > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (long)&sf->REG_NAME(edx) - new_cfa; > - fs->regs.reg[6].how = REG_SAVED_OFFSET; > + fs->regs.how[6] = REG_SAVED_OFFSET; > fs->regs.reg[6].loc.offset = (long)&sf->REG_NAME(esi) - new_cfa; > - fs->regs.reg[7].how = REG_SAVED_OFFSET; > + fs->regs.how[7] = REG_SAVED_OFFSET; > fs->regs.reg[7].loc.offset = (long)&sf->REG_NAME(edi) - new_cfa; > - fs->regs.reg[5].how = REG_SAVED_OFFSET; > + fs->regs.how[5] = REG_SAVED_OFFSET; > fs->regs.reg[5].loc.offset = (long)&sf->REG_NAME(ebp) - new_cfa; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = (long)&sf->REG_NAME(eip) - new_cfa; > fs->retaddr_column = 8; > fs->signal_frame = 1; > --- libgcc/config/i386/dragonfly-unwind.h.jj 2022-02-02 09:55:32.685763394 +0100 > +++ libgcc/config/i386/dragonfly-unwind.h 2022-09-17 16:44:00.688938715 +0200 > @@ -102,37 +102,37 @@ x86_64_dragonfly_fallback_frame_state > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > > /* The SVR4 register numbering macros aren't usable in libgcc. */ > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long)&sf->REG_NAME(rax) - new_cfa; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (long)&sf->REG_NAME(rdx) - new_cfa; > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (long)&sf->REG_NAME(rcx) - new_cfa; > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > fs->regs.reg[3].loc.offset = (long)&sf->REG_NAME(rbx) - new_cfa; > - fs->regs.reg[4].how = REG_SAVED_OFFSET; > + fs->regs.how[4] = REG_SAVED_OFFSET; > fs->regs.reg[4].loc.offset = (long)&sf->REG_NAME(rsi) - new_cfa; > - fs->regs.reg[5].how = REG_SAVED_OFFSET; > + fs->regs.how[5] = REG_SAVED_OFFSET; > fs->regs.reg[5].loc.offset = (long)&sf->REG_NAME(rdi) - new_cfa; > - fs->regs.reg[6].how = REG_SAVED_OFFSET; > + fs->regs.how[6] = REG_SAVED_OFFSET; > fs->regs.reg[6].loc.offset = (long)&sf->REG_NAME(rbp) - new_cfa; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = (long)&sf->REG_NAME(r8) - new_cfa; > - fs->regs.reg[9].how = REG_SAVED_OFFSET; > + fs->regs.how[9] = REG_SAVED_OFFSET; > fs->regs.reg[9].loc.offset = (long)&sf->REG_NAME(r9) - new_cfa; > - fs->regs.reg[10].how = REG_SAVED_OFFSET; > + fs->regs.how[10] = REG_SAVED_OFFSET; > fs->regs.reg[10].loc.offset = (long)&sf->REG_NAME(r10) - new_cfa; > - fs->regs.reg[11].how = REG_SAVED_OFFSET; > + fs->regs.how[11] = REG_SAVED_OFFSET; > fs->regs.reg[11].loc.offset = (long)&sf->REG_NAME(r11) - new_cfa; > - fs->regs.reg[12].how = REG_SAVED_OFFSET; > + fs->regs.how[12] = REG_SAVED_OFFSET; > fs->regs.reg[12].loc.offset = (long)&sf->REG_NAME(r12) - new_cfa; > - fs->regs.reg[13].how = REG_SAVED_OFFSET; > + fs->regs.how[13] = REG_SAVED_OFFSET; > fs->regs.reg[13].loc.offset = (long)&sf->REG_NAME(r13) - new_cfa; > - fs->regs.reg[14].how = REG_SAVED_OFFSET; > + fs->regs.how[14] = REG_SAVED_OFFSET; > fs->regs.reg[14].loc.offset = (long)&sf->REG_NAME(r14) - new_cfa; > - fs->regs.reg[15].how = REG_SAVED_OFFSET; > + fs->regs.how[15] = REG_SAVED_OFFSET; > fs->regs.reg[15].loc.offset = (long)&sf->REG_NAME(r15) - new_cfa; > - fs->regs.reg[16].how = REG_SAVED_OFFSET; > + fs->regs.how[16] = REG_SAVED_OFFSET; > fs->regs.reg[16].loc.offset = (long)&sf->REG_NAME(rip) - new_cfa; > fs->retaddr_column = 16; > fs->signal_frame = 1; > @@ -182,21 +182,21 @@ x86_dragonfly_fallback_frame_state > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > > /* The SVR4 register numbering macros aren't usable in libgcc. */ > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long)&sf->REG_NAME(eax) - new_cfa; > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > fs->regs.reg[3].loc.offset = (long)&sf->REG_NAME(ebx) - new_cfa; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (long)&sf->REG_NAME(ecx) - new_cfa; > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (long)&sf->REG_NAME(edx) - new_cfa; > - fs->regs.reg[6].how = REG_SAVED_OFFSET; > + fs->regs.how[6] = REG_SAVED_OFFSET; > fs->regs.reg[6].loc.offset = (long)&sf->REG_NAME(esi) - new_cfa; > - fs->regs.reg[7].how = REG_SAVED_OFFSET; > + fs->regs.how[7] = REG_SAVED_OFFSET; > fs->regs.reg[7].loc.offset = (long)&sf->REG_NAME(edi) - new_cfa; > - fs->regs.reg[5].how = REG_SAVED_OFFSET; > + fs->regs.how[5] = REG_SAVED_OFFSET; > fs->regs.reg[5].loc.offset = (long)&sf->REG_NAME(ebp) - new_cfa; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = (long)&sf->REG_NAME(eip) - new_cfa; > fs->retaddr_column = 8; > fs->signal_frame = 1; > --- libgcc/config/i386/gnu-unwind.h.jj 2022-02-02 09:55:32.685763394 +0100 > +++ libgcc/config/i386/gnu-unwind.h 2022-09-17 16:44:00.699938721 +0200 > @@ -123,14 +123,14 @@ x86_gnu_fallback_frame_state > fs->regs.cfa_reg = 4; > fs->regs.cfa_offset = usp - (unsigned long) context->cfa; > > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > - fs->regs.reg[5].how = REG_SAVED_OFFSET; > - fs->regs.reg[6].how = REG_SAVED_OFFSET; > - fs->regs.reg[7].how = REG_SAVED_OFFSET; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > + fs->regs.how[5] = REG_SAVED_OFFSET; > + fs->regs.how[6] = REG_SAVED_OFFSET; > + fs->regs.how[7] = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > > fs->retaddr_column = 8; > fs->signal_frame = 1; > --- libgcc/config/csky/linux-unwind.h.jj 2022-02-02 09:55:32.681763424 +0100 > +++ libgcc/config/csky/linux-unwind.h 2022-09-17 16:44:00.705938724 +0200 > @@ -85,28 +85,28 @@ csky_fallback_frame_state (struct _Unwin > fs->regs.cfa_reg = STACK_POINTER_REGNUM; > fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa; > > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (_Unwind_Ptr) & sc_pt_regs (a0) - new_cfa; > > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (_Unwind_Ptr) & sc_pt_regs (a1) - new_cfa; > > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (_Unwind_Ptr) & sc_pt_regs (a2) - new_cfa; > > - fs->regs.reg[3].how = REG_SAVED_OFFSET; > + fs->regs.how[3] = REG_SAVED_OFFSET; > fs->regs.reg[3].loc.offset = (_Unwind_Ptr) & sc_pt_regs (a3) - new_cfa; > > for (i = 4; i < 14; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = > (_Unwind_Ptr) & sc_pt_regs (regs[i - 4]) - new_cfa; > } > > for (i = 16; i < 31; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = > (_Unwind_Ptr) & sc_pt_regs (exregs[i - 16]) - new_cfa; > } > @@ -114,10 +114,10 @@ csky_fallback_frame_state (struct _Unwin > fs->regs.reg[31].loc.offset = > (_Unwind_Ptr) & sc_pt_regs_tls (tls) - new_cfa; > /* FIXME : hi lo ? */ > - fs->regs.reg[15].how = REG_SAVED_OFFSET; > + fs->regs.how[15] = REG_SAVED_OFFSET; > fs->regs.reg[15].loc.offset = (_Unwind_Ptr) & sc_pt_regs_lr - new_cfa; > > - fs->regs.reg[32].how = REG_SAVED_OFFSET; > + fs->regs.how[32] = REG_SAVED_OFFSET; > fs->regs.reg[32].loc.offset = (_Unwind_Ptr) & sc_pt_regs (pc) - new_cfa; > fs->retaddr_column = 32; > fs->signal_frame = 1; > --- libgcc/config/aarch64/linux-unwind.h.jj 2022-02-02 09:55:32.673763482 +0100 > +++ libgcc/config/aarch64/linux-unwind.h 2022-09-17 16:44:00.716938729 +0200 > @@ -89,7 +89,7 @@ aarch64_fallback_frame_state (struct _Un > > for (i = 0; i < AARCH64_DWARF_NUMBER_R; i++) > { > - fs->regs.reg[AARCH64_DWARF_R0 + i].how = REG_SAVED_OFFSET; > + fs->regs.how[AARCH64_DWARF_R0 + i] = REG_SAVED_OFFSET; > fs->regs.reg[AARCH64_DWARF_R0 + i].loc.offset = > (_Unwind_Ptr) & (sc->regs[i]) - new_cfa; > } > @@ -115,7 +115,7 @@ aarch64_fallback_frame_state (struct _Un > { > _Unwind_Sword offset; > > - fs->regs.reg[AARCH64_DWARF_V0 + i].how = REG_SAVED_OFFSET; > + fs->regs.how[AARCH64_DWARF_V0 + i] = REG_SAVED_OFFSET; > > /* sigcontext contains 32 128bit registers for V0 to > V31. The kernel will have saved the contents of the > @@ -142,12 +142,12 @@ aarch64_fallback_frame_state (struct _Un > } > } > > - fs->regs.reg[31].how = REG_SAVED_OFFSET; > + fs->regs.how[31] = REG_SAVED_OFFSET; > fs->regs.reg[31].loc.offset = (_Unwind_Ptr) & (sc->sp) - new_cfa; > > fs->signal_frame = 1; > > - fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].how = > + fs->regs.how[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__] = > REG_SAVED_VAL_OFFSET; > fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].loc.offset = > (_Unwind_Ptr) (sc->pc) - new_cfa; > --- libgcc/config/aarch64/freebsd-unwind.h.jj 2022-02-02 09:55:32.673763482 +0100 > +++ libgcc/config/aarch64/freebsd-unwind.h 2022-09-17 16:44:00.710938726 +0200 > @@ -90,7 +90,7 @@ aarch64_freebsd_fallback_frame_state > fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa; > > for (n = 0; n < 32; n++) > - fs->regs.reg[n].how = REG_SAVED_OFFSET; > + fs->regs.how[n] = REG_SAVED_OFFSET; > > for (n = 0; n < 30; n++) > fs->regs.reg[n].loc.offset = (_Unwind_Ptr) &(sc->XREG(n)) - new_cfa; > @@ -98,7 +98,7 @@ aarch64_freebsd_fallback_frame_state > fs->regs.reg[30].loc.offset = (_Unwind_Ptr) &(sc->REG_NAME(lr)) - new_cfa; > fs->regs.reg[31].loc.offset = (_Unwind_Ptr) &(sc->REG_NAME(sp)) - new_cfa; > > - fs->regs.reg[DARC].how = REG_SAVED_OFFSET; > + fs->regs.how[DARC] = REG_SAVED_OFFSET; > fs->regs.reg[DARC].loc.offset = (_Unwind_Ptr) &(sc->REG_NAME(elr)) - new_cfa; > > fs->retaddr_column = DARC; > --- libgcc/config/aarch64/aarch64-unwind.h.jj 2022-08-03 11:22:30.469804554 +0200 > +++ libgcc/config/aarch64/aarch64-unwind.h 2022-09-17 16:44:00.721938732 +0200 > @@ -80,7 +80,7 @@ aarch64_frob_update_context (struct _Unw > { > const int reg = DWARF_REGNUM_AARCH64_RA_STATE; > int ra_signed; > - if (fs->regs.reg[reg].how == REG_UNSAVED) > + if (fs->regs.how[reg] == REG_UNSAVED) > ra_signed = fs->regs.reg[reg].loc.offset & 0x1; > else > ra_signed = _Unwind_GetGR (context, reg) & 0x1; > --- libgcc/config/or1k/linux-unwind.h.jj 2022-02-02 09:55:32.738763004 +0100 > +++ libgcc/config/or1k/linux-unwind.h 2022-09-17 16:44:00.727938735 +0200 > @@ -59,10 +59,10 @@ or1k_fallback_frame_state (struct _Unwin > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > for (i = 2; i < 32; ++i) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = (long) &sc->regs.gpr[i] - new_cfa; > } > - fs->regs.reg[32].how = REG_SAVED_OFFSET; > + fs->regs.how[32] = REG_SAVED_OFFSET; > fs->regs.reg[32].loc.offset = (long)&sc->regs.pc - new_cfa; > fs->retaddr_column = 32; > fs->signal_frame = 1; > --- libgcc/config/mips/linux-unwind.h.jj 2022-02-02 09:55:32.728763078 +0100 > +++ libgcc/config/mips/linux-unwind.h 2022-09-17 16:44:00.732938738 +0200 > @@ -103,7 +103,7 @@ mips_fallback_frame_state (struct _Unwin > #endif > > for (i = 0; i < 32; i++) { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset > = (_Unwind_Ptr)&(sc->sc_regs[i]) + reg_offset - new_cfa; > } > @@ -115,7 +115,7 @@ mips_fallback_frame_state (struct _Unwin > Note that setting fs->signal_frame would not work. As the comment > above MASK_RETURN_ADDR explains, MIPS unwinders must earch for an > odd-valued address. */ > - fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].how > + fs->regs.how[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__] > = REG_SAVED_VAL_OFFSET; > fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].loc.offset > = (_Unwind_Ptr)(sc->sc_pc) + 2 - new_cfa; > --- libgcc/config/loongarch/linux-unwind.h.jj 2022-04-13 10:16:00.284758835 +0200 > +++ libgcc/config/loongarch/linux-unwind.h 2022-09-17 16:44:00.738938741 +0200 > @@ -64,12 +64,12 @@ loongarch_fallback_frame_state (struct _ > > for (i = 0; i < 32; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = (_Unwind_Ptr) & (sc->sc_regs[i]) - new_cfa; > } > > fs->signal_frame = 1; > - fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].how > + fs->regs.how[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__] > = REG_SAVED_VAL_OFFSET; > fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].loc.offset > = (_Unwind_Ptr) (sc->sc_pc) - new_cfa; > --- libgcc/config/m68k/linux-unwind.h.jj 2022-02-02 09:55:32.727763085 +0100 > +++ libgcc/config/m68k/linux-unwind.h 2022-09-17 16:44:00.744938744 +0200 > @@ -68,21 +68,21 @@ m68k_fallback_frame_state (struct _Unwin > fs->regs.cfa_reg = 15; > fs->regs.cfa_offset = cfa - (long) context->cfa; > > - fs->regs.reg[0].how = REG_SAVED_OFFSET; > + fs->regs.how[0] = REG_SAVED_OFFSET; > fs->regs.reg[0].loc.offset = (long) &sc->sc_d0 - cfa; > - fs->regs.reg[1].how = REG_SAVED_OFFSET; > + fs->regs.how[1] = REG_SAVED_OFFSET; > fs->regs.reg[1].loc.offset = (long) &sc->sc_d1 - cfa; > - fs->regs.reg[8].how = REG_SAVED_OFFSET; > + fs->regs.how[8] = REG_SAVED_OFFSET; > fs->regs.reg[8].loc.offset = (long) &sc->sc_a0 - cfa; > - fs->regs.reg[9].how = REG_SAVED_OFFSET; > + fs->regs.how[9] = REG_SAVED_OFFSET; > fs->regs.reg[9].loc.offset = (long) &sc->sc_a1 - cfa; > > #ifdef __uClinux__ > - fs->regs.reg[13].how = REG_SAVED_OFFSET; > + fs->regs.how[13] = REG_SAVED_OFFSET; > fs->regs.reg[13].loc.offset = (long) &sc->sc_a5 - cfa; > #endif > > - fs->regs.reg[24].how = REG_SAVED_OFFSET; > + fs->regs.how[24] = REG_SAVED_OFFSET; > fs->regs.reg[24].loc.offset = (long) &sc->sc_pc - cfa; > > #ifndef __uClinux__ > @@ -90,9 +90,9 @@ m68k_fallback_frame_state (struct _Unwin > { > int *fpregs = (int *) sc->sc_fpregs; > > - fs->regs.reg[16].how = REG_SAVED_OFFSET; > + fs->regs.how[16] = REG_SAVED_OFFSET; > fs->regs.reg[16].loc.offset = (long) &fpregs[0] - cfa; > - fs->regs.reg[17].how = REG_SAVED_OFFSET; > + fs->regs.how[17] = REG_SAVED_OFFSET; > fs->regs.reg[17].loc.offset = (long) &fpregs[M68K_FP_SIZE/4] - cfa; > } > #elif defined __mcffpu__ > @@ -124,12 +124,12 @@ m68k_fallback_frame_state (struct _Unwin > /* register %d0-%d7/%a0-%a6 */ > for (i = 0; i <= 14; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = (long) &gregs[i] - cfa; > } > > /* return address */ > - fs->regs.reg[24].how = REG_SAVED_OFFSET; > + fs->regs.how[24] = REG_SAVED_OFFSET; > fs->regs.reg[24].loc.offset = (long) &gregs[16] - cfa; > > #define uc_fpstate uc_filler[0] > @@ -141,7 +141,7 @@ m68k_fallback_frame_state (struct _Unwin > /* register %fp0-%fp7 */ > for (i = 16; i <= 23; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = fpregs - cfa; > fpregs += M68K_FP_SIZE; > } > --- libgcc/config/xtensa/linux-unwind.h.jj 2022-02-02 09:55:32.749762923 +0100 > +++ libgcc/config/xtensa/linux-unwind.h 2022-09-17 16:44:00.749938746 +0200 > @@ -105,11 +105,11 @@ xtensa_fallback_frame_state (struct _Unw > > for (i = 0; i < 16; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = (_Unwind_Ptr) &(sc->sc_a[i]) - new_cfa; > } > > - fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].how = > + fs->regs.how[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__] = > REG_SAVED_VAL_OFFSET; > fs->regs.reg[__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__].loc.offset = > (_Unwind_Ptr) (sc->sc_pc) - new_cfa; > --- libgcc/config/rs6000/darwin-fallback.c.jj 2022-02-02 09:55:32.742762975 +0100 > +++ libgcc/config/rs6000/darwin-fallback.c 2022-09-17 16:44:00.755938749 +0200 > @@ -368,7 +368,7 @@ handle_syscall (_Unwind_FrameState *fs, > return false; > > #define set_offset(r, addr) \ > - (fs->regs.reg[r].how = REG_SAVED_OFFSET, \ > + (fs->regs.how[r] = REG_SAVED_OFFSET, \ > fs->regs.reg[r].loc.offset = (_Unwind_Ptr)(addr) - new_cfa) > > /* Restore even the registers that are not call-saved, since they > --- libgcc/config/rs6000/aix-unwind.h.jj 2022-02-02 09:55:32.741762982 +0100 > +++ libgcc/config/rs6000/aix-unwind.h 2022-09-17 16:44:00.767938756 +0200 > @@ -40,7 +40,7 @@ > #ifdef __64BIT__ > #define MD_FROB_UPDATE_CONTEXT(CTX, FS) \ > do { \ > - if ((FS)->regs.reg[2].how == REG_UNSAVED) \ > + if ((FS)->regs.how[2] == REG_UNSAVED) \ > { \ > unsigned int *insn \ > = (unsigned int *) \ > @@ -52,7 +52,7 @@ > #else > #define MD_FROB_UPDATE_CONTEXT(CTX, FS) \ > do { \ > - if ((FS)->regs.reg[2].how == REG_UNSAVED) \ > + if ((FS)->regs.how[2] == REG_UNSAVED) \ > { \ > unsigned int *insn \ > = (unsigned int *) \ > @@ -207,7 +207,7 @@ ucontext_for (struct _Unwind_Context *co > > #define REGISTER_CFA_OFFSET_FOR(FS,REGNO,ADDR,CFA)\ > do { \ > -(FS)->regs.reg[REGNO].how = REG_SAVED_OFFSET; \ > +(FS)->regs.how[REGNO] = REG_SAVED_OFFSET; \ > (FS)->regs.reg[REGNO].loc.offset = (long) (ADDR) - (CFA); \ > } while (0) > > --- libgcc/config/rs6000/linux-unwind.h.jj 2022-02-02 09:55:32.744762960 +0100 > +++ libgcc/config/rs6000/linux-unwind.h 2022-09-17 16:44:00.773938759 +0200 > @@ -215,12 +215,12 @@ ppc_fallback_frame_state (struct _Unwind > fs->regs.cfa_offset = new_cfa - (long) context->cfa; > > #ifdef __powerpc64__ > - fs->regs.reg[2].how = REG_SAVED_OFFSET; > + fs->regs.how[2] = REG_SAVED_OFFSET; > fs->regs.reg[2].loc.offset = (long) ®s->gpr[2] - new_cfa; > #endif > for (i = 14; i < 32; i++) > { > - fs->regs.reg[i].how = REG_SAVED_OFFSET; > + fs->regs.how[i] = REG_SAVED_OFFSET; > fs->regs.reg[i].loc.offset = (long) ®s->gpr[i] - new_cfa; > } > > @@ -230,20 +230,20 @@ ppc_fallback_frame_state (struct _Unwind > cr_offset += sizeof (long) - 4; > #endif > /* In the ELFv1 ABI, CR2 stands in for the whole CR. */ > - fs->regs.reg[R_CR2].how = REG_SAVED_OFFSET; > + fs->regs.how[R_CR2] = REG_SAVED_OFFSET; > fs->regs.reg[R_CR2].loc.offset = cr_offset; > #if _CALL_ELF == 2 > /* In the ELFv2 ABI, every CR field has a separate CFI entry. */ > - fs->regs.reg[R_CR3].how = REG_SAVED_OFFSET; > + fs->regs.how[R_CR3] = REG_SAVED_OFFSET; > fs->regs.reg[R_CR3].loc.offset = cr_offset; > - fs->regs.reg[R_CR4].how = REG_SAVED_OFFSET; > + fs->regs.how[R_CR4] = REG_SAVED_OFFSET; > fs->regs.reg[R_CR4].loc.offset = cr_offset; > #endif > > - fs->regs.reg[R_LR].how = REG_SAVED_OFFSET; > + fs->regs.how[R_LR] = REG_SAVED_OFFSET; > fs->regs.reg[R_LR].loc.offset = (long) ®s->link - new_cfa; > > - fs->regs.reg[ARG_POINTER_REGNUM].how = REG_SAVED_OFFSET; > + fs->regs.how[ARG_POINTER_REGNUM] = REG_SAVED_OFFSET; > fs->regs.reg[ARG_POINTER_REGNUM].loc.offset = (long) ®s->nip - new_cfa; > fs->retaddr_column = ARG_POINTER_REGNUM; > fs->signal_frame = 1; > @@ -251,7 +251,7 @@ ppc_fallback_frame_state (struct _Unwind > /* If we have a FPU... */ > for (i = 14; i < 32; i++) > { > - fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; > + fs->regs.how[i + 32] = REG_SAVED_OFFSET; > fs->regs.reg[i + 32].loc.offset = (long) ®s->fpr[i] - new_cfa; > } > > @@ -265,12 +265,12 @@ ppc_fallback_frame_state (struct _Unwind > { > for (i = 20; i < 32; i++) > { > - fs->regs.reg[i + R_VR0].how = REG_SAVED_OFFSET; > + fs->regs.how[i + R_VR0] = REG_SAVED_OFFSET; > fs->regs.reg[i + R_VR0].loc.offset = (long) &vregs->vr[i] - new_cfa; > } > } > > - fs->regs.reg[R_VRSAVE].how = REG_SAVED_OFFSET; > + fs->regs.how[R_VRSAVE] = REG_SAVED_OFFSET; > fs->regs.reg[R_VRSAVE].loc.offset = (long) &vregs->vsave - new_cfa; > > /* If we have SPE register high-parts... we check at compile-time to > @@ -278,7 +278,7 @@ ppc_fallback_frame_state (struct _Unwind > #ifdef __SPE__ > for (i = 14; i < 32; i++) > { > - fs->regs.reg[i + FIRST_SPE_HIGH_REGNO - 4].how = REG_SAVED_OFFSET; > + fs->regs.how[i + FIRST_SPE_HIGH_REGNO - 4] = REG_SAVED_OFFSET; > fs->regs.reg[i + FIRST_SPE_HIGH_REGNO - 4].loc.offset > = (long) ®s->vregs - new_cfa + 4 * i; > } > @@ -315,7 +315,7 @@ frob_update_context (struct _Unwind_Cont > #endif > > #ifdef __powerpc64__ > - if (fs->regs.reg[2].how == REG_UNSAVED) > + if (fs->regs.how[2] == REG_UNSAVED) > { > /* If the current unwind info (FS) does not contain explicit info > saving R2, then we have to do a minor amount of code reading to > --- libgcc/config/rs6000/freebsd-unwind.h.jj 2022-02-02 09:55:32.743762968 +0100 > +++ libgcc/config/rs6000/freebsd-unwind.h 2022-09-17 16:44:00.761938753 +0200 > @@ -33,7 +33,7 @@ frob_update_context (struct _Unwind_Cont > const unsigned int *pc = (const unsigned int *) context->ra; > > #ifdef __powerpc64__ > - if (fs->regs.reg[2].how == REG_UNSAVED) > + if (fs->regs.how[2] == REG_UNSAVED) > { > /* If the current unwind info (FS) does not contain explicit info > saving R2, then we have to do a minor amount of code reading to > > > Jakub >