From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by sourceware.org (Postfix) with ESMTPS id 829943858CDB for ; Wed, 22 Nov 2023 08:06:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 829943858CDB Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 829943858CDB Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::136 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700640368; cv=none; b=Wko265g7+ENMmp4uXkxpeR2QB1BbJN67PfPT88iTXooEhWXoWSyEjpAkIFjVdAK7236Dhwyp+x8IQ4RjxLtfYSxhMZvzGIl6naUJvirYvt+SbPpq9xkxRA+rE5Gak6RGVb+K3Ysb4UcDO7KcT1LQLYAguxYqv14bB6pMLLXkC2A= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700640368; c=relaxed/simple; bh=aTwBF3fpCOevolL5A79d6GZx7oqmyGtn9YJSCylTdyw=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=putHeBXL82GynNCOekCnbW4If8pYLqdf4wGFIMNOv1fT90CSJHZloaTFyGwNvPfrpxR1+8XDvOE/CniDMkPEC4GryUc3pVoJmvQAr8JCu8Ft713vxNod17SpYDjMNkrr0HjfvM41DB63Qp24gzWF9q69qBGVkNf6w0BUfXRzfIk= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-507cee17b00so8458907e87.2 for ; Wed, 22 Nov 2023 00:06:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1700640365; x=1701245165; darn=gcc.gnu.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=ZXhNlrN1RlJ6Wepnyv/gtYHzSVcWNb3yaShfRdpgxls=; b=IAh/r0+nxTx+IwymdMix9zQi1+aIYAnPdJXecstZkEDwlTcxuv9kCtXWwEt/nEDOHK 07h+BGi1/85lb1hH6eSJm/4n6ljFv28JkwOEWGO/52QK2mFR9LFx8viLXwUx6cFt77QC tA8NgmpoSzWRHvAOetz0aQMv5Ui+1KAqBKp63udLNczreBBX27irx8UQmw5z5FCkUqxD QeLvVvf0jfuW2PhgGUFVizT37reED5RbUsHL/nSGU8pfpYL4zDIVp4XzZ/7rNaB1Wv7w HdjTUIvIPSrNJ9103sGemFG5IDcbfHwvF2+y/XmtLDFbtCMTFOt/VidLwxm23kiq/fVW CM+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700640365; x=1701245165; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZXhNlrN1RlJ6Wepnyv/gtYHzSVcWNb3yaShfRdpgxls=; b=w+jibxLhQhzS887WfJ25mVmau15yYXZqP4Kip0SMeBQln5eFWygzy3T9j2hD22gqv7 ilBhfwR/VQZyfRpzpBODwN85i3qCn9FB0OKAIQGuEq5oMThk+XyM5hafV3G8iQepxS7Q 5vMrifnrGg9/4qMcg59GpCyfQQ0Qu+7VSyzb2nHF+UdxbtSrV4J4lrVswt3LZYM65ZOS G9u2M/Renfbh1sH/86cVbFrZIW4Ol/SwRIsS1eTSGTnq9SQTZeuNPZNC/C5n3yFB8ebv G+qn1k1fvST6jDQ0Mx5p7I1wcP8w+sOaKhabjfFUq9jw5EoO4HoXi/b0S//an0C3GzZK cyNA== X-Gm-Message-State: AOJu0Yw318g5Kba1P3iiJSZZHuOcFIBls9WispUXv60PRlgNA/bS1r55 K8FU9SfngIyAE0ssSCH//0g+IFeBUbIUjnlwhvw= X-Google-Smtp-Source: AGHT+IHHgJc8CtrPKKJ109qdQGu9NM/LUORNxRuF/QYm7RxQ+88URM7JUOjKXEBuvo1IR38K2OBBQm0bkQ16i1kEYO0= X-Received: by 2002:a05:6512:ba6:b0:50a:4b96:5d09 with SMTP id b38-20020a0565120ba600b0050a4b965d09mr1227484lfv.66.1700640364716; Wed, 22 Nov 2023 00:06:04 -0800 (PST) MIME-Version: 1.0 References: <20231102031423.3751965-1-pan2.li@intel.com> <20231113032237.1379330-1-pan2.li@intel.com> In-Reply-To: From: Richard Biener Date: Wed, 22 Nov 2023 09:02:22 +0100 Message-ID: Subject: Re: [PATCH v4] DSE: Allow vector type for get_stored_val when read < store To: "Li, Pan2" Cc: "richard.sandiford@arm.com" , "juzhe.zhong@rivai.ai" , "Wang, Yanzhang" , "kito.cheng@gmail.com" , Jeff Law , "gcc-patches@gcc.gnu.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, Nov 22, 2023 at 3:30=E2=80=AFAM Li, Pan2 wrote: > > Hi Richard S, > > Thanks a lot for reviewing and comments. May I know is there any concern = or further comments for landing this patch to GCC-14? It looks like Jeff approved the patch? Richard. > Pan > > -----Original Message----- > From: Li, Pan2 > Sent: Wednesday, November 15, 2023 8:25 AM > To: gcc-patches@gcc.gnu.org > Cc: juzhe.zhong@rivai.ai; Wang, Yanzhang ; kito.= cheng@gmail.com; richard.guenther@gmail.com; richard.sandiford@arm.com; Jef= f Law > Subject: RE: [PATCH v4] DSE: Allow vector type for get_stored_val when re= ad < store > > Sorry for disturbing, looks I have a typo for Richard S's email address, = cc the right email address for awareness. > > Pan > > -----Original Message----- > From: Li, Pan2 > Sent: Wednesday, November 15, 2023 8:18 AM > To: Jeff Law ; gcc-patches@gcc.gnu.org > Cc: juzhe.zhong@rivai.ai; Wang, Yanzhang ; kito.= cheng@gmail.com; richard.guenther@gmail.com; richard.sandiford@arm.com2 > Subject: RE: [PATCH v4] DSE: Allow vector type for get_stored_val when re= ad < store > > > I wouldn't try to handle that case unless we had actual evidence it was > > useful to do so. Just wanted to point out that unlike pseudos we can > > have multiple modes referencing the same memory location. > > Got the point here, thanks Jeff for emphasizing this, =F0=9F=98=89. > > Pan > > -----Original Message----- > From: Jeff Law > Sent: Tuesday, November 14, 2023 4:12 AM > To: Li, Pan2 ; gcc-patches@gcc.gnu.org > Cc: juzhe.zhong@rivai.ai; Wang, Yanzhang ; kito.= cheng@gmail.com; richard.guenther@gmail.com; richard.sandiford@arm.com2 > Subject: Re: [PATCH v4] DSE: Allow vector type for get_stored_val when re= ad < store > > > > On 11/12/23 20:22, pan2.li@intel.com wrote: > > From: Pan Li > > > > Update in v4: > > * Merge upstream and removed some independent changes. > > > > Update in v3: > > * Take known_le instead of known_lt for vector size. > > * Return NULL_RTX when gap is not equal 0 and not constant. > > > > Update in v2: > > * Move vector type support to get_stored_val. > > > > Original log: > > > > This patch would like to allow the vector mode in the > > get_stored_val in the DSE. It is valid for the read > > rtx if and only if the read bitsize is less than the > > stored bitsize. > > > > Given below example code with > > --param=3Driscv-autovec-preference=3Dfixed-vlmax. > > > > vuint8m1_t test () { > > uint8_t arr[32] =3D { > > 1, 2, 7, 1, 3, 4, 5, 3, 1, 0, 1, 2, 4, 4, 9, 9, > > 1, 2, 7, 1, 3, 4, 5, 3, 1, 0, 1, 2, 4, 4, 9, 9, > > }; > > > > return __riscv_vle8_v_u8m1(arr, 32); > > } > > > > Before this patch: > > test: > > lui a5,%hi(.LANCHOR0) > > addi sp,sp,-32 > > addi a5,a5,%lo(.LANCHOR0) > > li a3,32 > > vl2re64.v v2,0(a5) > > vsetvli zero,a3,e8,m1,ta,ma > > vs2r.v v2,0(sp) <=3D=3D Unnecessary store to stack > > vle8.v v1,0(sp) <=3D=3D Ditto > > vs1r.v v1,0(a0) > > addi sp,sp,32 > > jr ra > > > > After this patch: > > test: > > lui a5,%hi(.LANCHOR0) > > addi a5,a5,%lo(.LANCHOR0) > > li a4,32 > > addi sp,sp,-32 > > vsetvli zero,a4,e8,m1,ta,ma > > vle8.v v1,0(a5) > > vs1r.v v1,0(a0) > > addi sp,sp,32 > > jr ra > > > > Below tests are passed within this patch: > > * The risc-v regression test. > > * The x86 bootstrap and regression test. > > * The aarch64 regression test. > > > > PR target/111720 > > > > gcc/ChangeLog: > > > > * dse.cc (get_stored_val): Allow vector mode if read size is > > less than or equal to stored size. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.target/riscv/rvv/base/pr111720-0.c: New test. > > * gcc.target/riscv/rvv/base/pr111720-1.c: New test. > > * gcc.target/riscv/rvv/base/pr111720-10.c: New test. > > * gcc.target/riscv/rvv/base/pr111720-2.c: New test. > > * gcc.target/riscv/rvv/base/pr111720-3.c: New test. > > * gcc.target/riscv/rvv/base/pr111720-4.c: New test. > > * gcc.target/riscv/rvv/base/pr111720-5.c: New test. > > * gcc.target/riscv/rvv/base/pr111720-6.c: New test. > > * gcc.target/riscv/rvv/base/pr111720-7.c: New test. > > * gcc.target/riscv/rvv/base/pr111720-8.c: New test. > > * gcc.target/riscv/rvv/base/pr111720-9.c: New test. > OK for the trunk. > > > > > > > + else if (VECTOR_MODE_P (read_mode) && VECTOR_MODE_P (store_mode) > > + && known_le (GET_MODE_BITSIZE (read_mode), GET_MODE_BITSIZE (store= _mode)) > > + && targetm.modes_tieable_p (read_mode, store_mode)) > > + read_reg =3D gen_lowpart (read_mode, copy_rtx (store_info->rhs)); > > else > > read_reg =3D extract_low_bits (read_mode, store_mode, > > copy_rtx (store_info->rhs)); > It may not matter, especially for RV, but we could possibly have a > mixture of scalar and vector modes in the RTL. Say a vector store > followed by a scalar read or vice-versa. > > I wouldn't try to handle that case unless we had actual evidence it was > useful to do so. Just wanted to point out that unlike pseudos we can > have multiple modes referencing the same memory location. > > Jeff