* [PATCH][AARCH64][5/5] Add macro fusion support for cmp/b.X for ThunderX
@ 2014-12-05 14:37 Kyrill Tkachov
2014-12-09 16:20 ` Marcus Shawcroft
0 siblings, 1 reply; 4+ messages in thread
From: Kyrill Tkachov @ 2014-12-05 14:37 UTC (permalink / raw)
To: GCC Patches; +Cc: Richard Earnshaw, Marcus Shawcroft, Andrew Pinski
[-- Attachment #1: Type: text/plain, Size: 713 bytes --]
Hi all,
Andrew posted this patch sometime ago (before stage1 closed) and I had
rebased it on top of the
other macro fusion patches in that series.
This is a respin of that patch with the comment about not calling
get_attr_type
repeatedly resolved
(https://gcc.gnu.org/ml/gcc-patches/2014-11/msg02251.html)
Tested aarch64-none-elf.
Is this ok to go in?
Thanks,
Kyrill
2014-12-01 Andrew Pinski apinski@cavium.com
Kyrylo Tkachov kyrylo.tkachov@arm.com
* config/aarch64/aarch64.c (AARCH64_FUSE_CMP_BRANCH): New define.
(thunderx_tunings): Add AARCH64_FUSE_CMP_BRANCH to fuseable_ops.
(aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_CMP_BRANCH.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: aarch64-cmp-branch.patch --]
[-- Type: text/x-patch; name=aarch64-cmp-branch.patch, Size: 1672 bytes --]
commit 3035cf0bed7058e45ca70cb33face93d7dc1ce9c
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Fri Nov 14 09:16:08 2014 +0000
[AArch64][apinski] CMP+branch macro fusion
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 93932c8..3b76071 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -310,6 +310,7 @@ static const struct cpu_vector_cost cortexa57_vector_cost =
#define AARCH64_FUSE_ADRP_ADD (1 << 1)
#define AARCH64_FUSE_MOVK_MOVK (1 << 2)
#define AARCH64_FUSE_ADRP_LDR (1 << 3)
+#define AARCH64_FUSE_CMP_BRANCH (1 << 4)
#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
__extension__
@@ -356,7 +357,7 @@ static const struct tune_params thunderx_tunings =
&generic_vector_cost,
NAMED_PARAM (memmov_cost, 6),
NAMED_PARAM (issue_rate, 2),
- NAMED_PARAM (fuseable_ops, AARCH64_FUSE_NOTHING)
+ NAMED_PARAM (fuseable_ops, AARCH64_FUSE_CMP_BRANCH)
};
/* A processor implementing AArch64. */
@@ -10522,6 +10523,20 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
}
}
+ if ((aarch64_tune_params->fuseable_ops & AARCH64_FUSE_CMP_BRANCH)
+ && any_condjump_p (curr))
+ {
+ enum attr_type prev_type = get_attr_type (prev);
+
+ /* FIXME: this misses some which is considered simple arthematic
+ instructions for ThunderX. Simple shifts are missed here. */
+ if (prev_type == TYPE_ALUS_SREG
+ || prev_type == TYPE_ALUS_IMM
+ || prev_type == TYPE_LOGICS_REG
+ || prev_type == TYPE_LOGICS_IMM)
+ return true;
+ }
+
return false;
}
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH][AARCH64][5/5] Add macro fusion support for cmp/b.X for ThunderX
2014-12-05 14:37 [PATCH][AARCH64][5/5] Add macro fusion support for cmp/b.X for ThunderX Kyrill Tkachov
@ 2014-12-09 16:20 ` Marcus Shawcroft
0 siblings, 0 replies; 4+ messages in thread
From: Marcus Shawcroft @ 2014-12-09 16:20 UTC (permalink / raw)
To: Kyrill Tkachov; +Cc: GCC Patches
On 5 December 2014 at 14:36, Kyrill Tkachov <kyrylo.tkachov@arm.com> wrote:
> Hi all,
>
> Andrew posted this patch sometime ago (before stage1 closed) and I had
> rebased it on top of the
> other macro fusion patches in that series.
> This is a respin of that patch with the comment about not calling
> get_attr_type
> repeatedly resolved
> (https://gcc.gnu.org/ml/gcc-patches/2014-11/msg02251.html)
>
> Tested aarch64-none-elf.
>
> Is this ok to go in?
>
> Thanks,
> Kyrill
>
> 2014-12-01 Andrew Pinski apinski@cavium.com
> Kyrylo Tkachov kyrylo.tkachov@arm.com
>
> * config/aarch64/aarch64.c (AARCH64_FUSE_CMP_BRANCH): New define.
> (thunderx_tunings): Add AARCH64_FUSE_CMP_BRANCH to fuseable_ops.
> (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_CMP_BRANCH.
OK /Marcus
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH][AARCH64][5/5] Add macro fusion support for cmp/b.X for ThunderX
2014-11-18 10:38 Kyrill Tkachov
@ 2014-11-18 11:03 ` Richard Earnshaw
0 siblings, 0 replies; 4+ messages in thread
From: Richard Earnshaw @ 2014-11-18 11:03 UTC (permalink / raw)
To: Kyrill Tkachov, GCC Patches; +Cc: Marcus Shawcroft, Andrew Pinski
On 18/11/14 10:34, Kyrill Tkachov wrote:
> Hi all,
>
> This is a rebase of Andrews' CMP+BRANCH fusion patch on top of my macro
> fusion patches.
> I've assigned the number 1<<4 to AARCH64_FUSE_CMP_BRANCH.
>
> I've given it a test on top of my fusion patches.
>
> Ok for trunk together with the rest?
>
> 2014-11-14 Andrew Pinski <apinski@cavium.com>
>
> * config/aarch64/aarch64.c (AARCH64_FUSE_CMP_BRANCH): New define.
> (thunderx_tunings): Add AARCH64_FUSE_CMP_BRANCH to fuseable_ops.
> (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_CMP_BRANCH.
>
>
> aarch64-cmp-branch.patch
>
>
> commit 619f6c056e80f284a834d2b24e6a9c1f933a2dd5
> Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
> Date: Fri Nov 14 09:16:08 2014 +0000
>
> [AArch64][apinski] CMP+branch macro fusion
>
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index 2e63269..d0e52b0 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -308,6 +308,7 @@ static const struct cpu_vector_cost cortexa57_vector_cost =
> #define AARCH64_FUSE_ADRP_ADD (1 << 1)
> #define AARCH64_FUSE_MOVK_MOVK (1 << 2)
> #define AARCH64_FUSE_ADRP_LDR (1 << 3)
> +#define AARCH64_FUSE_CMP_BRANCH (1 << 4)
>
> #if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
> __extension__
> @@ -353,7 +354,7 @@ static const struct tune_params thunderx_tunings =
> &generic_vector_cost,
> NAMED_PARAM (memmov_cost, 6),
> NAMED_PARAM (issue_rate, 2),
> - NAMED_PARAM (fuseable_ops, AARCH64_FUSE_NOTHING)
> + NAMED_PARAM (fuseable_ops, AARCH64_FUSE_CMP_BRANCH)
> };
>
> /* A processor implementing AArch64. */
> @@ -10133,6 +10134,18 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
> }
> }
>
> + if ((aarch64_tune_params->fuseable_ops & AARCH64_FUSE_CMP_BRANCH)
> + && any_condjump_p (curr))
> + {
> + /* FIXME: this misses some which are considered simple arthematic
> + instructions for ThunderX. Simple shifts are missed here. */
> + if (get_attr_type (prev) == TYPE_ALUS_SREG
> + || get_attr_type (prev) == TYPE_ALUS_IMM
> + || get_attr_type (prev) == TYPE_LOGICS_REG
> + || get_attr_type (prev) == TYPE_LOGICS_IMM)
> + return true;
> + }
> +
Repeatedly calling get_attr_type on the same insn is a bit wasteful,
despite the caching that's done. It would be better to call it once and
save the value in a variable.
Also, calling that function may cause prev to become the extracted insn.
Is it safe to assume that the caller(s) of this code understand that
this might have happened, or do we need to re-extract curr before returning?
> return false;
> }
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH][AARCH64][5/5] Add macro fusion support for cmp/b.X for ThunderX
@ 2014-11-18 10:38 Kyrill Tkachov
2014-11-18 11:03 ` Richard Earnshaw
0 siblings, 1 reply; 4+ messages in thread
From: Kyrill Tkachov @ 2014-11-18 10:38 UTC (permalink / raw)
To: GCC Patches; +Cc: Marcus Shawcroft, Richard Earnshaw, Andrew Pinski
[-- Attachment #1: Type: text/plain, Size: 515 bytes --]
Hi all,
This is a rebase of Andrews' CMP+BRANCH fusion patch on top of my macro
fusion patches.
I've assigned the number 1<<4 to AARCH64_FUSE_CMP_BRANCH.
I've given it a test on top of my fusion patches.
Ok for trunk together with the rest?
2014-11-14 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64.c (AARCH64_FUSE_CMP_BRANCH): New define.
(thunderx_tunings): Add AARCH64_FUSE_CMP_BRANCH to fuseable_ops.
(aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_CMP_BRANCH.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: aarch64-cmp-branch.patch --]
[-- Type: text/x-patch; name=aarch64-cmp-branch.patch, Size: 1650 bytes --]
commit 619f6c056e80f284a834d2b24e6a9c1f933a2dd5
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Fri Nov 14 09:16:08 2014 +0000
[AArch64][apinski] CMP+branch macro fusion
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 2e63269..d0e52b0 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -308,6 +308,7 @@ static const struct cpu_vector_cost cortexa57_vector_cost =
#define AARCH64_FUSE_ADRP_ADD (1 << 1)
#define AARCH64_FUSE_MOVK_MOVK (1 << 2)
#define AARCH64_FUSE_ADRP_LDR (1 << 3)
+#define AARCH64_FUSE_CMP_BRANCH (1 << 4)
#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
__extension__
@@ -353,7 +354,7 @@ static const struct tune_params thunderx_tunings =
&generic_vector_cost,
NAMED_PARAM (memmov_cost, 6),
NAMED_PARAM (issue_rate, 2),
- NAMED_PARAM (fuseable_ops, AARCH64_FUSE_NOTHING)
+ NAMED_PARAM (fuseable_ops, AARCH64_FUSE_CMP_BRANCH)
};
/* A processor implementing AArch64. */
@@ -10133,6 +10134,18 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
}
}
+ if ((aarch64_tune_params->fuseable_ops & AARCH64_FUSE_CMP_BRANCH)
+ && any_condjump_p (curr))
+ {
+ /* FIXME: this misses some which are considered simple arthematic
+ instructions for ThunderX. Simple shifts are missed here. */
+ if (get_attr_type (prev) == TYPE_ALUS_SREG
+ || get_attr_type (prev) == TYPE_ALUS_IMM
+ || get_attr_type (prev) == TYPE_LOGICS_REG
+ || get_attr_type (prev) == TYPE_LOGICS_IMM)
+ return true;
+ }
+
return false;
}
^ permalink raw reply [flat|nested] 4+ messages in thread
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