From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5476 invoked by alias); 26 Jun 2015 15:34:23 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 5463 invoked by uid 89); 26 Jun 2015 15:34:22 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=BAYES_00,FREEMAIL_FROM,KAM_STOCKGEN,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 X-HELO: fencepost.gnu.org Received: from fencepost.gnu.org (HELO fencepost.gnu.org) (208.118.235.10) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Fri, 26 Jun 2015 15:34:21 +0000 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53698) by fencepost.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:256) (Exim 4.82) (envelope-from ) id 1Z8Vdy-0007Ee-RE for gcc-patches@gnu.org; Fri, 26 Jun 2015 11:34:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z8Vdu-0001vI-JD for gcc-patches@gnu.org; Fri, 26 Jun 2015 11:34:18 -0400 Received: from mail-wi0-x229.google.com ([2a00:1450:400c:c05::229]:38904) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8Vdu-0001tq-D5 for gcc-patches@gnu.org; Fri, 26 Jun 2015 11:34:14 -0400 Received: by wibdq8 with SMTP id dq8so21063376wib.1 for ; Fri, 26 Jun 2015 08:34:12 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.180.149.240 with SMTP id ud16mr5885807wib.7.1435332852106; Fri, 26 Jun 2015 08:34:12 -0700 (PDT) Received: by 10.180.210.169 with HTTP; Fri, 26 Jun 2015 08:34:11 -0700 (PDT) In-Reply-To: References: Date: Fri, 26 Jun 2015 16:02:00 -0000 Message-ID: Subject: Re: [AArch64][TLSLE][N/N] Implement local executable mode for all memory model From: Marcus Shawcroft To: Jiong Wang Cc: gcc-patches Content-Type: text/plain; charset=UTF-8 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2a00:1450:400c:c05::229 X-IsSubscribed: yes X-SW-Source: 2015-06/txt/msg01968.txt.bz2 On 21 May 2015 at 17:49, Jiong Wang wrote: > 2015-05-14 Jiong Wang > gcc/ > * config/aarch64/aarch64.c (aarch64_print_operand): Support tls_size. > * config/aarch64/aarch64.md (tlsle): Choose proper instruction > sequences. > (tlsle_): New define_insn. > (tlsle_movsym_): Ditto. > * config/aarch64/constraints.md (Uta): New constraint. > (Utb): Ditto. > (Utc): Ditto. > (Utd): Ditto. > > gcc/testsuite/ > * gcc.target/aarch64/tlsle.c: New test source. > * gcc.target/aarch64/tlsle12.c: New testcase. > * gcc.target/aarch64/tlsle24.c: New testcase. > * gcc.target/aarch64/tlsle32.c: New testcase. > case SYMBOL_TLSLE: - asm_fprintf (asm_out_file, ":tprel_lo12_nc:"); + if (aarch64_tls_size <= 12) + /* Make sure TLS offset fit into 12bit. */ + asm_fprintf (asm_out_file, ":tprel_lo12:"); + else + asm_fprintf (asm_out_file, ":tprel_lo12_nc:"); break; Use the existing classify_symbol mechanism we use throughout the aarch64 backend. Specifically rename SYMBOL_TLSLE as SYMBOL_TLSLE24 and introduce the 3 missing flavours then use the symbol classification to control behaviour such as this modifier selection. Cheers /Marcus