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From: Marcus Shawcroft <marcus.shawcroft@gmail.com>
To: Ian Bolton <ian.bolton@arm.com>
Cc: gcc-patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH, AArch64] Fix macro in vdup_lane_2 test case
Date: Mon, 19 May 2014 10:44:00 -0000	[thread overview]
Message-ID: <CAFqB+PyH_=uCaiQ=HOWEzcPAh=atGFmXunn7dNGC2o4s-4Q71g@mail.gmail.com> (raw)
In-Reply-To: <536bc1d0.a2a1440a.3499.ffffeb33SMTPIN_ADDED_BROKEN@mx.google.com>

On 8 May 2014 18:41, Ian Bolton <ian.bolton@arm.com> wrote:

> gcc/testsuite
>         * gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit an
>         actual instruction to move into the allocated register.

This macro is attempting to force a value to a particular class of
register, we don't need or want the mov instruction at all.  Isn't
something like this sufficient:

#define force_simd(V1)   asm volatile (""       \
          : "+w"(V1)                            \
          :                                     \
          : /* No clobbers */)

?

/Marcus

       reply	other threads:[~2014-05-19 10:44 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <536bc1d0.a2a1440a.3499.ffffeb33SMTPIN_ADDED_BROKEN@mx.google.com>
2014-05-19 10:44 ` Marcus Shawcroft [this message]
2014-05-20 10:36   ` Ian Bolton
2014-05-08 17:41 Ian Bolton
2014-05-16  9:20 ` Ian Bolton

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