[PATCHv2/AARCH64 0/3] Add ILP32 GNU/Linux support

[PATCHv2/AARCH64 0/3] Add ILP32 GNU/Linux support

[Andrew Pinski]

This patch set adds ILP32 support to GCC for GNU/Linux.  

A patch which adds the host support for PCH.

A patch which fixes TLS variables with ILP32; shows up while compiling glibc
so no new testcases added.

One final patch which adds the name of the dynamic linker and passes the linker
script to the linker and allows for the multi-lib to work correctly.

All of these patches are tested incrementally.  Only the last patch depends on
the rest of the patches.  The rest can be applied independently.


Thanks,
Andrew Pinski

Andrew Pinski (3):
  2014-02-25  Andrew Pinski  <apinski@cavium.com>
  2014-02-25  Andrew Pinski  <apinski@cavium.com>
  2014-02-25  Andrew Pinski  <apinski@cavium.com>

 gcc/ChangeLog                      |   28 ++++++++++++++++++
 gcc/config/aarch64/aarch64-linux.h |    4 +-
 gcc/config/aarch64/aarch64.c       |   48 ++++++++++++++++++++++++++++----
 gcc/config/aarch64/aarch64.md      |   54 ++++++++++++++++++++++++++++--------
 gcc/config/aarch64/t-aarch64-linux |    7 +---
 gcc/config/host-linux.c            |    4 ++-
 6 files changed, 119 insertions(+), 26 deletions(-)

-- 
1.7.2.5

[PATCH/AARCH64 1/3] Add AARCH64 ILP32 PCH support

[Andrew Pinski]

Hi,
  Just like most of the targets out there we should define
TRY_EMPTY_VM_SPACE to have better PCH support.

OK?  Built and tested on aarch64-linux-gnu with no regressions.

Thanks,
Andrew Pinski

	* config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
	definition.
---
 gcc/ChangeLog           |    5 +++++
 gcc/config/host-linux.c |    4 +++-
 2 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 616d8ec..fd2b6cd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-02-25  Andrew Pinski  <apinski@cavium.com>
+
+	* config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
+	definition.
+
 2014-02-25  Vladimir Makarov  <vmakarov@redhat.com>
 
 	PR rtl-optimization/60317
diff --git a/gcc/config/host-linux.c b/gcc/config/host-linux.c
index 17048d7..b298a17 100644
--- a/gcc/config/host-linux.c
+++ b/gcc/config/host-linux.c
@@ -86,8 +86,10 @@
 # define TRY_EMPTY_VM_SPACE	0x60000000
 #elif defined(__mc68000__)
 # define TRY_EMPTY_VM_SPACE	0x40000000
-#elif defined(__aarch64__)
+#elif defined(__aarch64__) && defined(__LP64__)
 # define TRY_EMPTY_VM_SPACE	0x1000000000
+#elif defined(__aarch64__)
+# define TRY_EMPTY_VM_SPACE	0x60000000
 #elif defined(__ARM_EABI__)
 # define TRY_EMPTY_VM_SPACE     0x60000000
 #elif defined(__mips__) && defined(__LP64__)
-- 
1.7.2.5

[PATCHv2/AARCH64 3/3] Support ILP32 multi-lib

[Andrew Pinski]

Hi,
  This is the final patch which adds support for the dynamic linker and
multi-lib directories for ILP32.  I did not change multi-arch support as
I did not know what it should be changed to and internally here at Cavium,
we don't use multi-arch.  Updated for the new names that were decided on.


OK?  Build and tested for aarch64-linux-gnu with and without --with-multilib-list=lp64,ilp32.

Thanks,
Andrew Pinski

	* config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER): /lib/ld-linux-aarch64_ilp32.so.1
	is used for ILP32.
	(LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
	file whose name depends on -mabi= and -mbig-endian.
	* config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64 better
	and handle ilp32 too.
	(MULTILIB_OPTIONS): Delete.
	(MULTILIB_DIRNAMES): Delete.
---
 gcc/ChangeLog                      |   11 +++++++++++
 gcc/config/aarch64/aarch64-linux.h |    4 ++--
 gcc/config/aarch64/t-aarch64-linux |    7 ++-----
 3 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 155ce45..a0cdc58 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,16 @@
 2014-02-25  Andrew Pinski  <apinski@cavium.com>
 
+	* config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER): /lib/ld-linux32-aarch64_ilp32.so.1
+	is used for ILP32.
+	(LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
+	file whose name depends on -mabi= and -mbig-endian.
+	* config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64 better
+	and handle ilp32 too.
+	(MULTILIB_OPTIONS): Delete.
+	(MULTILIB_DIRNAMES): Delete.
+
+2014-02-25  Andrew Pinski  <apinski@cavium.com>
+
 	* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
 	Handle TLS for ILP32.
 	* config/aarch64/aarch64.md (tlsie_small): Rename to ...
diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h
index a8f0771..48beafb 100644
--- a/gcc/config/aarch64/aarch64-linux.h
+++ b/gcc/config/aarch64/aarch64-linux.h
@@ -21,7 +21,7 @@
 #ifndef GCC_AARCH64_LINUX_H
 #define GCC_AARCH64_LINUX_H
 
-#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}.so.1"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
 
 #define CPP_SPEC "%{pthread:-D_REENTRANT}"
 
@@ -33,7 +33,7 @@
    -dynamic-linker " GNU_USER_DYNAMIC_LINKER "	\
    -X						\
    %{mbig-endian:-EB} %{mlittle-endian:-EL}     \
-   -maarch64linux%{mbig-endian:b}"
+   -maarch64linux%{mabi=ilp32:32}%{mbig-endian:b}"
 
 #define LINK_SPEC LINUX_TARGET_LINK_SPEC
 
diff --git a/gcc/config/aarch64/t-aarch64-linux b/gcc/config/aarch64/t-aarch64-linux
index 147452b..d6a678e 100644
--- a/gcc/config/aarch64/t-aarch64-linux
+++ b/gcc/config/aarch64/t-aarch64-linux
@@ -22,10 +22,7 @@ LIB1ASMSRC   = aarch64/lib1funcs.asm
 LIB1ASMFUNCS = _aarch64_sync_cache_range
 
 AARCH_BE = $(if $(findstring TARGET_BIG_ENDIAN_DEFAULT=1, $(tm_defines)),_be)
-MULTILIB_OSDIRNAMES = .=../lib64$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu)
+MULTILIB_OSDIRNAMES = mabi.lp64=../lib64$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu)
 MULTIARCH_DIRNAME = $(call if_multiarch,aarch64$(AARCH_BE)-linux-gnu)
 
-# Disable the multilib for linux-gnu targets for the time being; focus
-# on the baremetal targets.
-MULTILIB_OPTIONS    =
-MULTILIB_DIRNAMES   =
+MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32
-- 
1.7.2.5

[PATCHv2/AARCH64 2/3] Fix TLS for ILP32.

[Andrew Pinski]

Hi,
  With ILP32, some simple usage of TLS variables causes an unrecognizable
instruction due to needing to use SImode for loading pointers from memory.
This fixes the three (tlsie_small, tlsle_small, tlsdesc_small) patterns to
support SImode for pointers.  I modified them to be like what was done for
the GOT patterns.

OK?  Build and tested on aarch64-elf with no regressions.

Thanks,
Andrew Pinski

	* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
	Handle TLS for ILP32.
	* config/aarch64/aarch64.md (tlsie_small): Rename to ...
	(tlsie_small_<mode>): this and handle PTR.
	(tlsie_small_sidi): New pattern.
	(tlsle_small): Change to an expand to handle ILP32.
	(tlsle_small_<mode>): New pattern.
	(tlsdesc_small): Rename to ...
	(tlsdesc_small_<mode>): this and handle PTR.
---
 gcc/ChangeLog                 |   12 +++++++++
 gcc/config/aarch64/aarch64.c  |   48 +++++++++++++++++++++++++++++++----
 gcc/config/aarch64/aarch64.md |   54 +++++++++++++++++++++++++++++++---------
 3 files changed, 96 insertions(+), 18 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fd2b6cd..155ce45 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,17 @@
 2014-02-25  Andrew Pinski  <apinski@cavium.com>
 
+	* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
+	Handle TLS for ILP32.
+	* config/aarch64/aarch64.md (tlsie_small): Rename to ...
+	(tlsie_small_<mode>): this and handle PTR.
+	(tlsie_small_sidi): New pattern.
+	(tlsle_small): Change to an expand to handle ILP32.
+	(tlsle_small_<mode>): New pattern.
+	(tlsdesc_small): Rename to ...
+	(tlsdesc_small_<mode>): this and handle PTR.
+
+2014-02-25  Andrew Pinski  <apinski@cavium.com>
+
 	* config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
 	definition.
 
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 901ad3d..e65c049 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -640,22 +640,58 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
 
     case SYMBOL_SMALL_TLSDESC:
       {
-	rtx x0 = gen_rtx_REG (Pmode, R0_REGNUM);
+	enum machine_mode mode = GET_MODE (dest);
+	rtx x0 = gen_rtx_REG (mode, R0_REGNUM);
 	rtx tp;
 
-	emit_insn (gen_tlsdesc_small (imm));
+	gcc_assert (mode == Pmode || mode == ptr_mode);
+
+	/* In ILP32, the got entry is always of SImode size.  Unlike
+	   small GOT, the dest is fixed at reg 0.  */
+	if (TARGET_ILP32)
+	  emit_insn (gen_tlsdesc_small_si (imm));
+	else
+	  emit_insn (gen_tlsdesc_small_di (imm));
 	tp = aarch64_load_tp (NULL);
-	emit_insn (gen_rtx_SET (Pmode, dest, gen_rtx_PLUS (Pmode, tp, x0)));
+
+	if (mode != Pmode)
+	  tp = gen_lowpart (mode, tp);
+
+	emit_insn (gen_rtx_SET (mode, dest, gen_rtx_PLUS (mode, tp, x0)));
 	set_unique_reg_note (get_last_insn (), REG_EQUIV, imm);
 	return;
       }
 
     case SYMBOL_SMALL_GOTTPREL:
       {
-	rtx tmp_reg = gen_reg_rtx (Pmode);
+	/* In ILP32, the mode of dest can be either SImode or DImode,
+	   while the got entry is always of SImode size.  The mode of
+	   dest depends on how dest is used: if dest is assigned to a
+	   pointer (e.g. in the memory), it has SImode; it may have
+	   DImode if dest is dereferenced to access the memeory.
+	   This is why we have to handle three different tlsie_small
+	   patterns here (two patterns for ILP32).  */
+	enum machine_mode mode = GET_MODE (dest);
+	rtx tmp_reg = gen_reg_rtx (mode);
 	rtx tp = aarch64_load_tp (NULL);
-	emit_insn (gen_tlsie_small (tmp_reg, imm));
-	emit_insn (gen_rtx_SET (Pmode, dest, gen_rtx_PLUS (Pmode, tp, tmp_reg)));
+
+	if (mode == ptr_mode)
+	  {
+	    if (mode == DImode)
+	      emit_insn (gen_tlsie_small_di (tmp_reg, imm));
+	    else
+	      {
+		emit_insn (gen_tlsie_small_si (tmp_reg, imm));
+		tp = gen_lowpart (mode, tp);
+	      }
+	  }
+	else
+	  {
+	    gcc_assert (mode == Pmode);
+	    emit_insn (gen_tlsie_small_sidi (tmp_reg, imm));
+	  }
+
+	emit_insn (gen_rtx_SET (mode, dest, gen_rtx_PLUS (mode, tp, tmp_reg)));
 	set_unique_reg_note (get_last_insn (), REG_EQUIV, imm);
 	return;
       }
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 99a6ac8..7d8a645 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3581,35 +3581,65 @@
   [(set_attr "type" "call")
    (set_attr "length" "16")])
 
-(define_insn "tlsie_small"
-  [(set (match_operand:DI 0 "register_operand" "=r")
-        (unspec:DI [(match_operand:DI 1 "aarch64_tls_ie_symref" "S")]
+(define_insn "tlsie_small_<mode>"
+  [(set (match_operand:PTR 0 "register_operand" "=r")
+        (unspec:PTR [(match_operand 1 "aarch64_tls_ie_symref" "S")]
 		   UNSPEC_GOTSMALLTLS))]
   ""
-  "adrp\\t%0, %A1\;ldr\\t%0, [%0, #%L1]"
+  "adrp\\t%0, %A1\;ldr\\t%<w>0, [%0, #%L1]"
   [(set_attr "type" "load1")
    (set_attr "length" "8")]
 )
 
-(define_insn "tlsle_small"
+
+(define_insn "tlsie_small_sidi"
   [(set (match_operand:DI 0 "register_operand" "=r")
-        (unspec:DI [(match_operand:DI 1 "register_operand" "r")
-                   (match_operand:DI 2 "aarch64_tls_le_symref" "S")]
+	(zero_extend:DI
+          (unspec:SI [(match_operand 1 "aarch64_tls_ie_symref" "S")]
+		      UNSPEC_GOTSMALLTLS)))]
+  ""
+  "adrp\\t%0, %A1\;ldr\\t%w0, [%0, #%L1]"
+  [(set_attr "type" "load1")
+   (set_attr "length" "8")]
+)
+
+
+(define_expand "tlsle_small"
+  [(set (match_operand 0 "register_operand" "=r")
+        (unspec [(match_operand 1 "register_operand" "r")
+                   (match_operand 2 "aarch64_tls_le_symref" "S")]
+                   UNSPEC_GOTSMALLTLS))]
+  ""
+{
+  enum machine_mode mode = GET_MODE (operands[0]);
+  emit_insn ((mode == DImode
+	      ? gen_tlsle_small_di
+	      : gen_tlsle_small_si) (operands[0],
+				   operands[1],
+				   operands[2]));
+  DONE;
+
+})
+
+(define_insn "tlsle_small_<mode>"
+  [(set (match_operand:P 0 "register_operand" "=r")
+        (unspec:P [(match_operand:P 1 "register_operand" "r")
+                   (match_operand 2 "aarch64_tls_le_symref" "S")]
 		   UNSPEC_GOTSMALLTLS))]
   ""
-  "add\\t%0, %1, #%G2\;add\\t%0, %0, #%L2"
+  "add\\t%<w>0, %<w>1, #%G2\;add\\t%<w>0, %<w>0, #%L2"
   [(set_attr "type" "alu_reg")
    (set_attr "length" "8")]
 )
 
-(define_insn "tlsdesc_small"
-  [(set (reg:DI R0_REGNUM)
-        (unspec:DI [(match_operand:DI 0 "aarch64_valid_symref" "S")]
+(define_insn "tlsdesc_small_<mode>"
+  [(set (reg:PTR R0_REGNUM)
+        (unspec:PTR [(match_operand 0 "aarch64_valid_symref" "S")]
 		   UNSPEC_TLSDESC))
    (clobber (reg:DI LR_REGNUM))
    (clobber (match_scratch:DI 1 "=r"))]
   "TARGET_TLS_DESC"
-  "adrp\\tx0, %A0\;ldr\\t%1, [x0, #%L0]\;add\\tx0, x0, %L0\;.tlsdesccall\\t%0\;blr\\t%1"
+  "adrp\\tx0, %A0\;ldr\\t%<w>1, [x0, #%L0]\;add\\t<w>0, <w>0, %L0\;.tlsdesccall\\t%0\;blr\\t%1"
   [(set_attr "type" "call")
    (set_attr "length" "16")])
 
-- 
1.7.2.5

Re: [PATCHv2/AARCH64 2/3] Fix TLS for ILP32.

[Yufeng Zhang]

Hi,

On 02/26/14 02:25, Andrew Pinski wrote:
> Hi,
>    With ILP32, some simple usage of TLS variables causes an unrecognizable
> instruction due to needing to use SImode for loading pointers from memory.
> This fixes the three (tlsie_small, tlsle_small, tlsdesc_small) patterns to
> support SImode for pointers.  I modified them to be like what was done for
> the GOT patterns.

The patch looks good to me (but I cannot approve).

There are some minor indentation issues though; see below.

>
> OK?  Build and tested on aarch64-elf with no regressions.
>
> Thanks,
> Andrew Pinski
>
> 	* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
> 	Handle TLS for ILP32.
> 	* config/aarch64/aarch64.md (tlsie_small): Rename to ...
> 	(tlsie_small_<mode>): this and handle PTR.
> 	(tlsie_small_sidi): New pattern.
> 	(tlsle_small): Change to an expand to handle ILP32.
> 	(tlsle_small_<mode>): New pattern.
> 	(tlsdesc_small): Rename to ...
> 	(tlsdesc_small_<mode>): this and handle PTR.
> ---
>   gcc/ChangeLog                 |   12 +++++++++
>   gcc/config/aarch64/aarch64.c  |   48 +++++++++++++++++++++++++++++++----
>   gcc/config/aarch64/aarch64.md |   54 +++++++++++++++++++++++++++++++---------
>   3 files changed, 96 insertions(+), 18 deletions(-)

[snip]

> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index 99a6ac8..7d8a645 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -3581,35 +3581,65 @@
>     [(set_attr "type" "call")
>      (set_attr "length" "16")])
>
> -(define_insn "tlsie_small"
> -  [(set (match_operand:DI 0 "register_operand" "=r")
> -        (unspec:DI [(match_operand:DI 1 "aarch64_tls_ie_symref" "S")]
> +(define_insn "tlsie_small_<mode>"
> +  [(set (match_operand:PTR 0 "register_operand" "=r")
> +        (unspec:PTR [(match_operand 1 "aarch64_tls_ie_symref" "S")]
>   		   UNSPEC_GOTSMALLTLS))]
>     ""
> -  "adrp\\t%0, %A1\;ldr\\t%0, [%0, #%L1]"
> +  "adrp\\t%0, %A1\;ldr\\t%<w>0, [%0, #%L1]"
>     [(set_attr "type" "load1")
>      (set_attr "length" "8")]
>   )
>
> -(define_insn "tlsle_small"
> +
> +(define_insn "tlsie_small_sidi"
>     [(set (match_operand:DI 0 "register_operand" "=r")
> -        (unspec:DI [(match_operand:DI 1 "register_operand" "r")
> -                   (match_operand:DI 2 "aarch64_tls_le_symref" "S")]
> +	(zero_extend:DI
> +          (unspec:SI [(match_operand 1 "aarch64_tls_ie_symref" "S")]
> +		      UNSPEC_GOTSMALLTLS)))]
> +  ""
> +  "adrp\\t%0, %A1\;ldr\\t%w0, [%0, #%L1]"
> +  [(set_attr "type" "load1")
> +   (set_attr "length" "8")]
> +)
> +
> +
> +(define_expand "tlsle_small"
> +  [(set (match_operand 0 "register_operand" "=r")
> +        (unspec [(match_operand 1 "register_operand" "r")
> +                   (match_operand 2 "aarch64_tls_le_symref" "S")]
> +                   UNSPEC_GOTSMALLTLS))]

The last two lines were not indented well.

> +  ""
> +{
> +  enum machine_mode mode = GET_MODE (operands[0]);
> +  emit_insn ((mode == DImode
> +	      ? gen_tlsle_small_di
> +	      : gen_tlsle_small_si) (operands[0],
> +				   operands[1],
> +				   operands[2]));

Likewise here.


Thanks,
Yufeng


> +  DONE;
> +
> +})
> +
> +(define_insn "tlsle_small_<mode>"
> +  [(set (match_operand:P 0 "register_operand" "=r")
> +        (unspec:P [(match_operand:P 1 "register_operand" "r")
> +                   (match_operand 2 "aarch64_tls_le_symref" "S")]
>   		   UNSPEC_GOTSMALLTLS))]
>     ""
> -  "add\\t%0, %1, #%G2\;add\\t%0, %0, #%L2"
> +  "add\\t%<w>0, %<w>1, #%G2\;add\\t%<w>0, %<w>0, #%L2"
>     [(set_attr "type" "alu_reg")
>      (set_attr "length" "8")]
>   )
>
> -(define_insn "tlsdesc_small"
> -  [(set (reg:DI R0_REGNUM)
> -        (unspec:DI [(match_operand:DI 0 "aarch64_valid_symref" "S")]
> +(define_insn "tlsdesc_small_<mode>"
> +  [(set (reg:PTR R0_REGNUM)
> +        (unspec:PTR [(match_operand 0 "aarch64_valid_symref" "S")]
>   		   UNSPEC_TLSDESC))
>      (clobber (reg:DI LR_REGNUM))
>      (clobber (match_scratch:DI 1 "=r"))]
>     "TARGET_TLS_DESC"
> -  "adrp\\tx0, %A0\;ldr\\t%1, [x0, #%L0]\;add\\tx0, x0, %L0\;.tlsdesccall\\t%0\;blr\\t%1"
> +  "adrp\\tx0, %A0\;ldr\\t%<w>1, [x0, #%L0]\;add\\t<w>0,<w>0, %L0\;.tlsdesccall\\t%0\;blr\\t%1"
>     [(set_attr "type" "call")
>      (set_attr "length" "16")])
>

Re: [PATCHv2/AARCH64 3/3] Support ILP32 multi-lib

[Yufeng Zhang]

On 02/26/14 02:25, Andrew Pinski wrote:
> Hi,
>    This is the final patch which adds support for the dynamic linker and
> multi-lib directories for ILP32.  I did not change multi-arch support as
> I did not know what it should be changed to and internally here at Cavium,
> we don't use multi-arch.  Updated for the new names that were decided on.
>
>
> OK?  Build and tested for aarch64-linux-gnu with and without --with-multilib-list=lp64,ilp32.

Looks good to me, but I cannot approve.  I have a couple of minor 
comments on the changelog entry.

>
> Thanks,
> Andrew Pinski
>
> 	* config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER): /lib/ld-linux-aarch64_ilp32.so.1
> 	is used for ILP32.
> 	(LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
> 	file whose name depends on -mabi= and -mbig-endian.
> 	* config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64 better
> 	and handle ilp32 too.
> 	(MULTILIB_OPTIONS): Delete.
> 	(MULTILIB_DIRNAMES): Delete.
> ---
>   gcc/ChangeLog                      |   11 +++++++++++
>   gcc/config/aarch64/aarch64-linux.h |    4 ++--
>   gcc/config/aarch64/t-aarch64-linux |    7 ++-----
>   3 files changed, 15 insertions(+), 7 deletions(-)
>
> diff --git a/gcc/ChangeLog b/gcc/ChangeLog
> index 155ce45..a0cdc58 100644
> --- a/gcc/ChangeLog
> +++ b/gcc/ChangeLog
> @@ -1,5 +1,16 @@
>   2014-02-25  Andrew Pinski<apinski@cavium.com>
>
> +	* config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER): /lib/ld-linux32-aarch64_ilp32.so.1

s/linux32/linux

> +	is used for ILP32.
> +	(LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
> +	file whose name depends on -mabi= and -mbig-endian.
> +	* config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64 better
> +	and handle ilp32 too.

s/ilp32/ILP32

Thanks,
Yufeng




> +	(MULTILIB_OPTIONS): Delete.
> +	(MULTILIB_DIRNAMES): Delete.
> +
> +2014-02-25  Andrew Pinski<apinski@cavium.com>
> +
>   	* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
>   	Handle TLS for ILP32.
>   	* config/aarch64/aarch64.md (tlsie_small): Rename to ...
> diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h
> index a8f0771..48beafb 100644
> --- a/gcc/config/aarch64/aarch64-linux.h
> +++ b/gcc/config/aarch64/aarch64-linux.h
> @@ -21,7 +21,7 @@
>   #ifndef GCC_AARCH64_LINUX_H
>   #define GCC_AARCH64_LINUX_H
>
> -#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}.so.1"
> +#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
>
>   #define CPP_SPEC "%{pthread:-D_REENTRANT}"
>
> @@ -33,7 +33,7 @@
>      -dynamic-linker " GNU_USER_DYNAMIC_LINKER "	\
>      -X						\
>      %{mbig-endian:-EB} %{mlittle-endian:-EL}     \
> -   -maarch64linux%{mbig-endian:b}"
> +   -maarch64linux%{mabi=ilp32:32}%{mbig-endian:b}"
>
>   #define LINK_SPEC LINUX_TARGET_LINK_SPEC
>
> diff --git a/gcc/config/aarch64/t-aarch64-linux b/gcc/config/aarch64/t-aarch64-linux
> index 147452b..d6a678e 100644
> --- a/gcc/config/aarch64/t-aarch64-linux
> +++ b/gcc/config/aarch64/t-aarch64-linux
> @@ -22,10 +22,7 @@ LIB1ASMSRC   = aarch64/lib1funcs.asm
>   LIB1ASMFUNCS = _aarch64_sync_cache_range
>
>   AARCH_BE = $(if $(findstring TARGET_BIG_ENDIAN_DEFAULT=1, $(tm_defines)),_be)
> -MULTILIB_OSDIRNAMES = .=../lib64$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu)
> +MULTILIB_OSDIRNAMES = mabi.lp64=../lib64$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu)
>   MULTIARCH_DIRNAME = $(call if_multiarch,aarch64$(AARCH_BE)-linux-gnu)
>
> -# Disable the multilib for linux-gnu targets for the time being; focus
> -# on the baremetal targets.
> -MULTILIB_OPTIONS    =
> -MULTILIB_DIRNAMES   =
> +MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32

Re: [PATCHv2/AARCH64 2/3] Fix TLS for ILP32.

[Marcus Shawcroft]

On 26 February 2014 02:25, Andrew Pinski <apinski@cavium.com> wrote:
> Hi,
>   With ILP32, some simple usage of TLS variables causes an unrecognizable
> instruction due to needing to use SImode for loading pointers from memory.
> This fixes the three (tlsie_small, tlsle_small, tlsdesc_small) patterns to
> support SImode for pointers.  I modified them to be like what was done for
> the GOT patterns.
>
> OK?  Build and tested on aarch64-elf with no regressions.
>
> Thanks,
> Andrew Pinski
>
>         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
>         Handle TLS for ILP32.
>         * config/aarch64/aarch64.md (tlsie_small): Rename to ...
>         (tlsie_small_<mode>): this and handle PTR.
>         (tlsie_small_sidi): New pattern.
>         (tlsle_small): Change to an expand to handle ILP32.
>         (tlsle_small_<mode>): New pattern.
>         (tlsdesc_small): Rename to ...
>         (tlsdesc_small_<mode>): this and handle PTR.

Thanks Andrew, this is OK for stage-1, but please fix Yufeng's layout nit.
/Marcus

Re: [PATCH/AARCH64 1/3] Add AARCH64 ILP32 PCH support

[Marcus Shawcroft]

On 26 February 2014 02:25, Andrew Pinski <apinski@cavium.com> wrote:
>
> Hi,
>   Just like most of the targets out there we should define
> TRY_EMPTY_VM_SPACE to have better PCH support.
>
> OK?  Built and tested on aarch64-linux-gnu with no regressions.

This is OK for stage-1.

/Marcus

Re: [PATCH/AARCH64 1/3] Add AARCH64 ILP32 PCH support

[Kyle McMartin]

On Tue, Feb 25, 2014 at 06:25:11PM -0800, Andrew Pinski wrote:
> -#elif defined(__aarch64__)
> +#elif defined(__aarch64__) && defined(__LP64__)
>  # define TRY_EMPTY_VM_SPACE	0x1000000000
> +#elif defined(__aarch64__)
> +# define TRY_EMPTY_VM_SPACE	0x60000000

awesome. thanks andrew!

--kyle

Re: [PATCH/AARCH64 1/3] Add AARCH64 ILP32 PCH support

[Richard Earnshaw]

On 26/02/14 02:25, Andrew Pinski wrote:
> 
> Hi,
>   Just like most of the targets out there we should define
> TRY_EMPTY_VM_SPACE to have better PCH support.
> 
> OK?  Built and tested on aarch64-linux-gnu with no regressions.
> 
> Thanks,
> Andrew Pinski
> 
> 	* config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
> 	definition.
> ---
>  gcc/ChangeLog           |    5 +++++
>  gcc/config/host-linux.c |    4 +++-
>  2 files changed, 8 insertions(+), 1 deletions(-)
> 
> diff --git a/gcc/ChangeLog b/gcc/ChangeLog
> index 616d8ec..fd2b6cd 100644
> --- a/gcc/ChangeLog
> +++ b/gcc/ChangeLog
> @@ -1,3 +1,8 @@
> +2014-02-25  Andrew Pinski  <apinski@cavium.com>
> +
> +	* config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
> +	definition.
> +
>  2014-02-25  Vladimir Makarov  <vmakarov@redhat.com>
>  
>  	PR rtl-optimization/60317
> diff --git a/gcc/config/host-linux.c b/gcc/config/host-linux.c
> index 17048d7..b298a17 100644
> --- a/gcc/config/host-linux.c
> +++ b/gcc/config/host-linux.c
> @@ -86,8 +86,10 @@
>  # define TRY_EMPTY_VM_SPACE	0x60000000
>  #elif defined(__mc68000__)
>  # define TRY_EMPTY_VM_SPACE	0x40000000
> -#elif defined(__aarch64__)
> +#elif defined(__aarch64__) && defined(__LP64__)
>  # define TRY_EMPTY_VM_SPACE	0x1000000000
> +#elif defined(__aarch64__)
> +# define TRY_EMPTY_VM_SPACE	0x60000000
>  #elif defined(__ARM_EABI__)
>  # define TRY_EMPTY_VM_SPACE     0x60000000
>  #elif defined(__mips__) && defined(__LP64__)
> 

I'd prefer to see this written as:


-#elif defined(__aarch64__)
+#elif defined(__aarch64__) && defined(__ILP32__)
 # define TRY_EMPTY_VM_SPACE	0x60000000
+#elif defined(__aarch64__)
+# define TRY_EMPTY_VM_SPACE	0x1000000000


Since I'd expect there to be a much higher likelihood of another variant
that uses 64-bit pointers (eg LLP64) than of there being another variant
that uses 32-bit.

R.

Re: [PATCHv2/AARCH64 3/3] Support ILP32 multi-lib

[Andrew Pinski]

On Thu, Feb 27, 2014 at 7:57 AM, Yufeng Zhang <Yufeng.Zhang@arm.com> wrote:
> On 02/26/14 02:25, Andrew Pinski wrote:
>>
>> Hi,
>>    This is the final patch which adds support for the dynamic linker and
>> multi-lib directories for ILP32.  I did not change multi-arch support as
>> I did not know what it should be changed to and internally here at Cavium,
>> we don't use multi-arch.  Updated for the new names that were decided on.
>>
>>
>> OK?  Build and tested for aarch64-linux-gnu with and without
>> --with-multilib-list=lp64,ilp32.
>
>
> Looks good to me, but I cannot approve.  I have a couple of minor comments
> on the changelog entry.

Ping?  This is also required to support the VDSO inside the Linux kernel.

Thanks,
Andrew

>
>
>>
>> Thanks,
>> Andrew Pinski
>>
>>         * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
>> /lib/ld-linux-aarch64_ilp32.so.1
>>         is used for ILP32.
>>         (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
>>         file whose name depends on -mabi= and -mbig-endian.
>>         * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle
>> LP64 better
>>         and handle ilp32 too.
>>         (MULTILIB_OPTIONS): Delete.
>>         (MULTILIB_DIRNAMES): Delete.
>> ---
>>   gcc/ChangeLog                      |   11 +++++++++++
>>   gcc/config/aarch64/aarch64-linux.h |    4 ++--
>>   gcc/config/aarch64/t-aarch64-linux |    7 ++-----
>>   3 files changed, 15 insertions(+), 7 deletions(-)
>>
>> diff --git a/gcc/ChangeLog b/gcc/ChangeLog
>> index 155ce45..a0cdc58 100644
>> --- a/gcc/ChangeLog
>> +++ b/gcc/ChangeLog
>> @@ -1,5 +1,16 @@
>>   2014-02-25  Andrew Pinski<apinski@cavium.com>
>>
>> +       * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
>> /lib/ld-linux32-aarch64_ilp32.so.1
>
>
> s/linux32/linux
>
>
>> +       is used for ILP32.
>> +       (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
>> +       file whose name depends on -mabi= and -mbig-endian.
>> +       * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle
>> LP64 better
>> +       and handle ilp32 too.
>
>
> s/ilp32/ILP32
>
> Thanks,
> Yufeng
>
>
>
>
>
>> +       (MULTILIB_OPTIONS): Delete.
>> +       (MULTILIB_DIRNAMES): Delete.
>> +
>> +2014-02-25  Andrew Pinski<apinski@cavium.com>
>> +
>>         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
>>         Handle TLS for ILP32.
>>         * config/aarch64/aarch64.md (tlsie_small): Rename to ...
>> diff --git a/gcc/config/aarch64/aarch64-linux.h
>> b/gcc/config/aarch64/aarch64-linux.h
>> index a8f0771..48beafb 100644
>> --- a/gcc/config/aarch64/aarch64-linux.h
>> +++ b/gcc/config/aarch64/aarch64-linux.h
>> @@ -21,7 +21,7 @@
>>   #ifndef GCC_AARCH64_LINUX_H
>>   #define GCC_AARCH64_LINUX_H
>>
>> -#define GLIBC_DYNAMIC_LINKER
>> "/lib/ld-linux-aarch64%{mbig-endian:_be}.so.1"
>> +#define GLIBC_DYNAMIC_LINKER
>> "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
>>
>>   #define CPP_SPEC "%{pthread:-D_REENTRANT}"
>>
>> @@ -33,7 +33,7 @@
>>      -dynamic-linker " GNU_USER_DYNAMIC_LINKER "        \
>>      -X                                         \
>>      %{mbig-endian:-EB} %{mlittle-endian:-EL}     \
>> -   -maarch64linux%{mbig-endian:b}"
>> +   -maarch64linux%{mabi=ilp32:32}%{mbig-endian:b}"
>>
>>   #define LINK_SPEC LINUX_TARGET_LINK_SPEC
>>
>> diff --git a/gcc/config/aarch64/t-aarch64-linux
>> b/gcc/config/aarch64/t-aarch64-linux
>> index 147452b..d6a678e 100644
>> --- a/gcc/config/aarch64/t-aarch64-linux
>> +++ b/gcc/config/aarch64/t-aarch64-linux
>> @@ -22,10 +22,7 @@ LIB1ASMSRC   = aarch64/lib1funcs.asm
>>   LIB1ASMFUNCS = _aarch64_sync_cache_range
>>
>>   AARCH_BE = $(if $(findstring TARGET_BIG_ENDIAN_DEFAULT=1,
>> $(tm_defines)),_be)
>> -MULTILIB_OSDIRNAMES = .=../lib64$(call
>> if_multiarch,:aarch64$(AARCH_BE)-linux-gnu)
>> +MULTILIB_OSDIRNAMES = mabi.lp64=../lib64$(call
>> if_multiarch,:aarch64$(AARCH_BE)-linux-gnu)
>>   MULTIARCH_DIRNAME = $(call if_multiarch,aarch64$(AARCH_BE)-linux-gnu)
>>
>> -# Disable the multilib for linux-gnu targets for the time being; focus
>> -# on the baremetal targets.
>> -MULTILIB_OPTIONS    =
>> -MULTILIB_DIRNAMES   =
>> +MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32
>
>
>

Re: [PATCHv2/AARCH64 3/3] Support ILP32 multi-lib

[Marcus Shawcroft]

On 26 February 2014 02:25, Andrew Pinski <apinski@cavium.com> wrote:
> Hi,
>   This is the final patch which adds support for the dynamic linker and
> multi-lib directories for ILP32.  I did not change multi-arch support as
> I did not know what it should be changed to and internally here at Cavium,
> we don't use multi-arch.  Updated for the new names that were decided on.
>
>
> OK?  Build and tested for aarch64-linux-gnu with and without --with-multilib-list=lp64,ilp32.
>
> Thanks,
> Andrew Pinski
>
>         * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER): /lib/ld-linux-aarch64_ilp32.so.1
>         is used for ILP32.
>         (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
>         file whose name depends on -mabi= and -mbig-endian.
>         * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64 better
>         and handle ilp32 too.
>         (MULTILIB_OPTIONS): Delete.
>         (MULTILIB_DIRNAMES): Delete.

Hi, This is OK, thanks  /Marcus

Re: [PATCHv2/AARCH64 2/3] Fix TLS for ILP32.

[Marcus Shawcroft]

>      case SYMBOL_SMALL_GOTTPREL:
>        {
> -       rtx tmp_reg = gen_reg_rtx (Pmode);
> +       /* In ILP32, the mode of dest can be either SImode or DImode,
> +          while the got entry is always of SImode size.  The mode of
> +          dest depends on how dest is used: if dest is assigned to a
> +          pointer (e.g. in the memory), it has SImode; it may have
> +          DImode if dest is dereferenced to access the memeory.
> +          This is why we have to handle three different tlsie_small
> +          patterns here (two patterns for ILP32).  */
> +       enum machine_mode mode = GET_MODE (dest);
> +       rtx tmp_reg = gen_reg_rtx (mode);
>         rtx tp = aarch64_load_tp (NULL);
> -       emit_insn (gen_tlsie_small (tmp_reg, imm));
> -       emit_insn (gen_rtx_SET (Pmode, dest, gen_rtx_PLUS (Pmode, tp, tmp_reg)));
> +
> +       if (mode == ptr_mode)
> +         {
> +           if (mode == DImode)
> +             emit_insn (gen_tlsie_small_di (tmp_reg, imm));
> +           else
> +             {
> +               emit_insn (gen_tlsie_small_si (tmp_reg, imm));
> +               tp = gen_lowpart (mode, tp);
> +             }
> +         }
> +       else
> +         {
> +           gcc_assert (mode == Pmode);
> +           emit_insn (gen_tlsie_small_sidi (tmp_reg, imm));
> +         }


Andrew, do you recall the circumstance that trigger the mode == SImode
code path through the above code?  I've been trying to trigger this
while working on the equivalent tiny address mode code... with no
success.
/Marcus

Re: [PATCHv2/AARCH64 2/3] Fix TLS for ILP32.

[Andrew Pinski]

On Fri, Feb 20, 2015 at 5:35 AM, Marcus Shawcroft
<marcus.shawcroft@gmail.com> wrote:
>>      case SYMBOL_SMALL_GOTTPREL:
>>        {
>> -       rtx tmp_reg = gen_reg_rtx (Pmode);
>> +       /* In ILP32, the mode of dest can be either SImode or DImode,
>> +          while the got entry is always of SImode size.  The mode of
>> +          dest depends on how dest is used: if dest is assigned to a
>> +          pointer (e.g. in the memory), it has SImode; it may have
>> +          DImode if dest is dereferenced to access the memeory.
>> +          This is why we have to handle three different tlsie_small
>> +          patterns here (two patterns for ILP32).  */
>> +       enum machine_mode mode = GET_MODE (dest);
>> +       rtx tmp_reg = gen_reg_rtx (mode);
>>         rtx tp = aarch64_load_tp (NULL);
>> -       emit_insn (gen_tlsie_small (tmp_reg, imm));
>> -       emit_insn (gen_rtx_SET (Pmode, dest, gen_rtx_PLUS (Pmode, tp, tmp_reg)));
>> +
>> +       if (mode == ptr_mode)
>> +         {
>> +           if (mode == DImode)
>> +             emit_insn (gen_tlsie_small_di (tmp_reg, imm));
>> +           else
>> +             {
>> +               emit_insn (gen_tlsie_small_si (tmp_reg, imm));
>> +               tp = gen_lowpart (mode, tp);
>> +             }
>> +         }
>> +       else
>> +         {
>> +           gcc_assert (mode == Pmode);
>> +           emit_insn (gen_tlsie_small_sidi (tmp_reg, imm));
>> +         }
>
>
> Andrew, do you recall the circumstance that trigger the mode == SImode
> code path through the above code?  I've been trying to trigger this
> while working on the equivalent tiny address mode code... with no
> success.

IIRC this happened during the compiling of glibc.  That is with -fPIC
and with initial-exec tls_model.  errno variable in fact.

Thanks,
Andrew Pinski



> /Marcus