From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 75940 invoked by alias); 16 Dec 2015 23:51:03 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 75921 invoked by uid 89); 16 Dec 2015 23:51:02 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.8 required=5.0 tests=AWL,BAYES_50,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 spammy=rs6000c, rs6000.c, sk:meissne, UD:rs6000.c X-HELO: mail-lb0-f171.google.com Received: from mail-lb0-f171.google.com (HELO mail-lb0-f171.google.com) (209.85.217.171) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 16 Dec 2015 23:51:01 +0000 Received: by mail-lb0-f171.google.com with SMTP id cs9so35387059lbb.1 for ; Wed, 16 Dec 2015 15:51:01 -0800 (PST) MIME-Version: 1.0 X-Received: by 10.112.150.135 with SMTP id ui7mr17064042lbb.53.1450309858003; Wed, 16 Dec 2015 15:50:58 -0800 (PST) Received: by 10.114.71.169 with HTTP; Wed, 16 Dec 2015 15:50:57 -0800 (PST) In-Reply-To: <20151216232049.GA4524@ibm-tiger.the-meissners.org> References: <20151216232049.GA4524@ibm-tiger.the-meissners.org> Date: Wed, 16 Dec 2015 23:51:00 -0000 Message-ID: Subject: Re: [PATCH] Pr 68805, Fix PowerPC little endian -mvsx-timode From: David Edelsohn To: Michael Meissner , GCC Patches Content-Type: text/plain; charset=UTF-8 X-SW-Source: 2015-12/txt/msg01681.txt.bz2 On Wed, Dec 16, 2015 at 6:20 PM, Michael Meissner wrote: > My first mail did not seem to be delivered, so I'm trying again. > > This fixes a bug with the debug switch -mvsx-timode that we would eventually > like to enable by default on PowerPC little endian server systems. The bug is > that the load with rotate or rotate with store instructions needed on power8 > little endian systems used VEC_SELECT to swap the 64-bit words. This patch > uses ROTATE for TImode, just like I did for KFmode. > > Without this patch, 10 of the 30 spec 2006 benchmarks fail to compile on a > little endian PowerPC system with -mvsx-timode. With the patch, all 30 > benchmarks compile and do the spec verification. > > In developing the patch, I noticed that the generic swap optimizations that are > done for vector types are not done for TImode, since we don't split the TImoves > until after register allocation when we discover a vector register was used > instead of a GPR register. So, I added a peephole2 to catch the common case of > store followed by load, eliminating the pair of ROTATE insns. > > I bootstrapped it on both a big endian power7 and a little endian power8 system > with no regressions. Is it ok to install on the trunk? > > At the current time, I don't see the need to back port it to GCC 5 (though the > backport is fairly simple), because it isn't on by default in GCC 5, and we > don't plan to eventually have -mvsx-timode and -mlra on by default in that > branch. > > [gcc] > 2015-12-15 Michael Meissner > > PR target/68805 > * config/rs6000/rs6000.c (rs6000_gen_le_vsx_permute): Use ROTATE > instead of VEC_SELECT for TImode. > > * config/rs6000/vsx.md (VSX_LE): Move TImode from VSX_LE to > VSX_LE_128, so that we use ROTATE to swap the 64-bit words instead > of using VEC_SELECT. > (VSX_LE_128): Likewise. > (define_peephole2): Add peephole to eliminate double xxpermdi when > copying TImode. > > [gcc/testsuite] > 2015-12-15 Michael Meissner > > PR target/68805 > * gcc.target/powerpc/pr68805.c: New test. Okay. Thanks, David