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From: David Edelsohn <dje.gcc@gmail.com>
To: Michael Meissner <meissner@linux.vnet.ibm.com>,
	David Edelsohn <dje.gcc@gmail.com>,
		GCC Patches <gcc-patches@gcc.gnu.org>,
	Pat Haugen <pthaugen@us.ibm.com>,
		Peter Bergner <bergner@vnet.ibm.com>
Subject: Re: [PATCH, rs6000] power8 patches, patch #4 (revised), new power8 builtins
Date: Sat, 20 Jul 2013 19:12:00 -0000	[thread overview]
Message-ID: <CAGWvny=zodWdOsbxQSnDFRkPXNwmCUbtr45KtEfyO55kV6BGhQ@mail.gmail.com> (raw)
In-Reply-To: <20130715214310.GA24693@ibm-tiger.the-meissners.org>

On Mon, Jul 15, 2013 at 5:43 PM, Michael Meissner
<meissner@linux.vnet.ibm.com> wrote:

> Are these patches ok to install?
>
> 2013-07-15  Michael Meissner  <meissner@linux.vnet.ibm.com>
>
>         * config/rs6000/vector.md (xor<mode>3): Move 128-bit boolean
>         expanders to rs6000.md.
>         (ior<mode>3): Likewise.
>         (and<mode>3): Likewise.
>         (one_cmpl<mode>2): Likewise.
>         (nor<mode>3): Likewise.
>         (andc<mode>3): Likewise.
>         (eqv<mode>3): Likewise.
>         (nand<mode>3): Likewise.
>         (orc<mode>3): Likewise.
>
>         * config/rs6000/vsx.md (VSX_L2): Delete, no longer used.
>         (vsx_and<mode>3_32bit): Move 128-bit logical insns to rs6000.md,
>         and allow TImode operations in 32-bit.
>         (vsx_and<mode>3_64bit): Likewise.
>         (vsx_ior<mode>3_32bit): Likewise.
>         (vsx_ior<mode>3_64bit): Likewise.
>         (vsx_xor<mode>3_32bit): Likewise.
>         (vsx_xor<mode>3_64bit): Likewise.
>         (vsx_one_cmpl<mode>2_32bit): Likewise.
>         (vsx_one_cmpl<mode>2_64bit): Likewise.
>         (vsx_nor<mode>3_32bit): Likewise.
>         (vsx_nor<mode>3_64bit): Likewise.
>         (vsx_andc<mode>3_32bit): Likewise.
>         (vsx_andc<mode>3_64bit): Likewise.
>         (vsx_eqv<mode>3_32bit): Likewise.
>         (vsx_eqv<mode>3_64bit): Likewise.
>         (vsx_nand<mode>3_32bit): Likewise.
>         (vsx_nand<mode>3_64bit): Likewise.
>         (vsx_orc<mode>3_32bit): Likewise.
>         (vsx_orc<mode>3_64bit): Likewise.
>
>         * config/rs6000/altivec.md (altivec_and): Move 128-bit logical
>         insns to rs6000.md, and allow TImode operations in 32-bit.
>         (altivec_ior<mode>3): Likewise.
>         (altivec_xor<mode>3): Likewise.
>         (altivec_one_cmpl<mode>2): Likewise.
>         (altivec_nor<mode>3): Likewise.
>         (altivec_andc<mode>3): Likewise.
>
>         * config/rs6000/rs6000.md (BOOL_128): New mode iterators and mode
>         attributes for moving the 128-bit logical operations into
>         rs6000.md.
>         (BOOL_REGS_OUTPUT): Likewise.
>         (BOOL_REGS_OP1): Likewise.
>         (BOOL_REGS_OP2): Likewise.
>         (BOOL_REGS_UNARY): Likewise.
>         (BOOL_REGS_AND_CR0): Likewise.
>         (one_cmpl<mode>2): Add support for DI logical operations on
>         32-bit, splitting the operations to 32-bit.
>         (anddi3): Likewise.
>         (iordi3): Likewise.
>         (xordi3): Likewise.
>         (and<mode>3, 128-bit types): Rewrite 2013-06-06 logical operator
>         changes to combine the 32/64-bit code, allow logical operations on
>         TI mode in 32-bit, and to use similar match_operator patterns like
>         scalar mode uses.  Combine the Altivec and VSX code for logical
>         operations, and move it here.
>         (ior<mode>3, 128-bit types): Likewise.
>         (xor<mode>3, 128-bit types): Likewise.
>         (one_cmpl<mode>3, 128-bit types): Likewise.
>         (nor<mode>3, 128-bit types): Likewise.
>         (andc<mode>3, 128-bit types): Likewise.
>         (eqv<mode>3, 128-bit types): Likewise.
>         (nand<mode>3, 128-bit types): Likewise.
>         (orc<mode>3, 128-bit types): Likewise.
>         (and<mode>3_internal): Likewise.
>         (bool<mode>3_internal): Likewise.
>         (boolc<mode>3_internal1): Likewise.
>         (boolc<mode>3_internal2): Likewise.
>         (boolcc<mode>3_internal1): Likewise.
>         (boolcc<mode>3_internal2): Likewise.
>         (eqv<mode>3_internal1): Likewise.
>         (eqv<mode>3_internal2): Likewise.
>         (one_cmpl1<mode>3_internal): Likewise.
>
>         * config/rs6000/rs6000-protos.h (rs6000_split_logical): New
>         declaration.
>
>         * config/rs6000/rs6000.c (rs6000_split_logical_inner): Add support
>         to split multi-word logical operations.
>         (rs6000_split_logical_di): Likewise.
>         (rs6000_split_logical): Likewise.

This patch is okay.  But two things:

Spelling mistake: elEment

+;; The canonical form is to have the negated elment first, so we need to
+;; reverse arguments.
+(define_expand "orc<mode>3"

And this patch needs a number of new testcases for logical operations,
GPRs, VRs and VSRs.

Thanks, David

  reply	other threads:[~2013-07-20 18:44 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-20 20:41 [PATCH, rs6000] power8 patches Michael Meissner
2013-05-20 20:49 ` [PATCH, rs6000] power8 patch #1, infrastructure changes Michael Meissner
2013-05-20 21:34   ` [PATCH, rs6000] power8 patch #1, infrastructure changes (revised patch) Michael Meissner
2013-05-22  3:29     ` David Edelsohn
2013-05-20 23:13 ` [PATCH, rs6000] power8 patches, patch #2, add crypto builtins Michael Meissner
2013-05-22  3:30   ` David Edelsohn
2013-05-23  3:41     ` David Edelsohn
2013-05-23  3:59       ` Michael Meissner
2013-05-25  4:07         ` David Edelsohn
2013-05-30 21:04           ` Michael Meissner
2013-05-21  2:11 ` [PATCH, rs6000] power8 patches Peter Bergner
2013-05-21 15:51 ` [PATCH, rs6000] power8 patches, patch #3, add V2DI vector support Michael Meissner
2013-05-23 16:31   ` David Edelsohn
2013-05-21 23:47 ` [PATCH, rs6000] power8 patches, patch #4, new power8 builtins Michael Meissner
2013-05-25  4:03   ` David Edelsohn
2013-05-30 23:26     ` Michael Meissner
2013-05-31  9:14       ` Segher Boessenkool
2013-05-31 15:11         ` Michael Meissner
2013-06-04 18:49   ` [PATCH, rs6000] power8 patches, patch #4 (revised), " Michael Meissner
2013-06-05 14:28     ` David Edelsohn
2013-06-05 15:50       ` Segher Boessenkool
2013-06-05 16:05         ` Michael Meissner
2013-06-05 20:06           ` Segher Boessenkool
2013-06-05 20:24             ` Michael Meissner
2013-06-05 16:13       ` Michael Meissner
2013-06-05 17:28         ` David Edelsohn
2013-06-06 15:57         ` David Edelsohn
2013-06-06 21:42           ` Michael Meissner
2013-07-15 21:48           ` Michael Meissner
2013-07-20 19:12             ` David Edelsohn [this message]
2013-07-23 21:24               ` Michael Meissner
2013-05-21 23:49 ` [PATCH, rs6000] power8 patches, patch #5, new vector tests Michael Meissner
2013-06-06 21:51   ` Michael Meissner
2013-05-22 14:26 ` [PATCH, rs6000] power8 patches, patch #6, direct move & basic quad load/store Michael Meissner
2013-05-29 19:53   ` David Edelsohn
2013-05-29 20:32     ` Michael Meissner
2013-06-10 15:41       ` David Edelsohn
2013-06-10 20:26         ` Michael Meissner
2013-05-22 16:51 ` [PATCH, rs6000] power8 patches, patch #7, quad/byte/half-word atomic instructions Michael Meissner
2013-05-29 20:29   ` David Edelsohn
2013-05-29 20:36     ` Michael Meissner
2013-06-11 23:56     ` Michael Meissner
2013-06-12 21:55       ` David Edelsohn
2013-05-22 20:53 ` [PATCH, rs6000] power8 patches, patch #8, power8 load fusion + misc Michael Meissner
2013-06-18 18:30   ` David Edelsohn
2013-06-24 16:32     ` Michael Meissner
2013-06-24 19:43       ` David Edelsohn
2013-07-29 18:46   ` [PATCH, rs6000] power8 patches, revised patch #8, power8 load fusion Michael Meissner
2013-07-31 16:00     ` David Edelsohn
2013-11-23 16:48     ` Alan Modra
2013-06-07 19:22 ` [PATCH, rs6000] power8 patches, patch #9, power8 scheduling Pat Haugen
2013-06-19 13:00   ` David Edelsohn

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