From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by sourceware.org (Postfix) with ESMTPS id 024F13858D20 for ; Sun, 11 Jun 2023 18:39:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 024F13858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ed1-x533.google.com with SMTP id 4fb4d7f45d1cf-5183101690cso2090764a12.0 for ; Sun, 11 Jun 2023 11:39:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686508756; x=1689100756; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=Byd+1R9eXM4uIlevCLI9GKMG0bvr6+AhhA4KPbkVOTg=; b=oRYVkuyzFipcDXcoTI7fN9BccVGdMeGkMpm1YogWRD0fI9ZLwZIGUK7ebOI9RSrg6X LFVtoG2VwXOKXdrWu8FrEkjZC+JgJNp79fzObJ+EZWBF4Gr9QM1Dr39GqQDHgCTZTAth J9htYKYXRI8zH22kDXEL06OWlbEe8jzC4yATwR2PyS8lowF5oU4DUPucGKqu+visweXe a/4CezrG5zLlJJad54iTWzZVUtEdP2GA25AcQiJQWHvR1euG1SUez5VcCmsH+zsSgYG6 Z42LDtdZBeyGXnIMxodZ19wIuCBvNVu4WKkpaSpcowkofInxE74vuYaGh8TJIR2FtwlL 885g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686508756; x=1689100756; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=Byd+1R9eXM4uIlevCLI9GKMG0bvr6+AhhA4KPbkVOTg=; b=HhLXO3PxAZm01CFsq8VsZZrYw/WipC29PpocsVzNDEM3keyS8bIeYHF2vIdlQtrTAH mMyH+zYVBp9/3oe+bAj5xhhQQEcFSYzO3J1BpxL+ZRQtJXzHRGYNNe8t21RVUPNqDXsb 5ShSZD2f9Ds1IUMkWac/9fN3yJlpwbUlPUScF4FH5W1fysQYqmgfx3FuvV6O//915l0h k29BAIiHnPSdDLDYNFdFknWd8CkcrawJ8nk6VFPlF/iA0PbQ2WfmF4A4WnT4dJUrKpgW kBk3HOqFPfLLMB2iK6wpauCmNMoIPLL1gz3gztvQsaK7lyr6DaAUKo07HuCoSKD9xRiE J4Fw== X-Gm-Message-State: AC+VfDwbUA76YqnRXgOZLLDgxO28wiowkNf+Z937UmLh96kqDwii5H0A q9ERxjkmrDPIhfwAB1lhDl+z2aGSpTPwhPF2e1eyLncN X-Google-Smtp-Source: ACHHUZ4xmhnM3GxpY3fjWo/xOD+mkh6bu5s3R82rtYmJmlEz/wgl2A+MPNJsYxm2S96vc5WU8dPpvqyT5IG9gz7W4jc= X-Received: by 2002:a17:907:7246:b0:977:d8bf:58e2 with SMTP id ds6-20020a170907724600b00977d8bf58e2mr5849596ejc.37.1686508756326; Sun, 11 Jun 2023 11:39:16 -0700 (PDT) MIME-Version: 1.0 References: <124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com> In-Reply-To: <124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com> From: David Edelsohn Date: Sun, 11 Jun 2023 14:39:04 -0400 Message-ID: Subject: Re: [PATCH] rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932] To: "Kewen.Lin" Cc: GCC Patches , Segher Boessenkool , Peter Bergner Content-Type: multipart/alternative; boundary="00000000000054db3c05fddeeb6b" X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,HTML_MESSAGE,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --00000000000054db3c05fddeeb6b Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Jun 6, 2023 at 5:19=E2=80=AFAM Kewen.Lin wrot= e: > Hi, > > As PR109932 shows, builtins __builtin_{un,}pack_vector_int128 > should be guarded under vsx rather than power7, as their > corresponding bif patterns have the conditions TARGET_VSX > and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to > move __builtin_{un,}pack_vector_int128 to stanza vsx to ensure > their supports. > > Bootstrapped and regtested on powerpc64-linux-gnu P7/P8/P9 and > powerpc64le-linux-gnu P9 and P10. > > I'll push this next week if no objections. > > BR, > Kewen > ----- > PR target/109932 > > gcc/ChangeLog: > > * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128, > __builtin_unpack_vector_int128): Move from stanza power7 to vsx. > > gcc/testsuite/ChangeLog: > > * gcc.target/powerpc/pr109932-1.c: New test. > * gcc.target/powerpc/pr109932-2.c: New test. > This is okay. Thanks, David > --- > gcc/config/rs6000/rs6000-builtins.def | 14 +++++++------- > gcc/testsuite/gcc.target/powerpc/pr109932-1.c | 16 ++++++++++++++++ > gcc/testsuite/gcc.target/powerpc/pr109932-2.c | 16 ++++++++++++++++ > 3 files changed, 39 insertions(+), 7 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-1.c > create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-2.c > > diff --git a/gcc/config/rs6000/rs6000-builtins.def > b/gcc/config/rs6000/rs6000-builtins.def > index 92d9b46e1b9..a38184b0ef9 100644 > --- a/gcc/config/rs6000/rs6000-builtins.def > +++ b/gcc/config/rs6000/rs6000-builtins.def > @@ -2009,6 +2009,13 @@ > const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>); > XXSPLTD_V2DI vsx_xxspltd_v2di {} > > + const vsq __builtin_pack_vector_int128 (unsigned long long, \ > + unsigned long long); > + PACK_V1TI packv1ti {} > + > + const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>); > + UNPACK_V1TI unpackv1ti {} > + > > ; Power7 builtins (ISA 2.06). > [power7] > @@ -2030,16 +2037,9 @@ > const unsigned int __builtin_divweu (unsigned int, unsigned int); > DIVWEU diveu_si {} > > - const vsq __builtin_pack_vector_int128 (unsigned long long, \ > - unsigned long long); > - PACK_V1TI packv1ti {} > - > void __builtin_ppc_speculation_barrier (); > SPECBARR speculation_barrier {} > > - const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>); > - UNPACK_V1TI unpackv1ti {} > - > > ; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing). > [power7-64] > diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-1.c > b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c > new file mode 100644 > index 00000000000..3e3f9eaa65e > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c > @@ -0,0 +1,16 @@ > +/* { dg-require-effective-target powerpc_altivec_ok } */ > +/* { dg-options "-maltivec -mno-vsx" } */ > + > +/* Verify there is no ICE but one expected error message instead. */ > + > +#include > + > +extern vector signed __int128 res_vslll; > +extern unsigned long long aull[2]; > + > +void > +testVectorInt128Pack () > +{ > + res_vslll =3D __builtin_pack_vector_int128 (aull[0], aull[1]); /* { > dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */ > +} > + > diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-2.c > b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c > new file mode 100644 > index 00000000000..3e3f9eaa65e > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c > @@ -0,0 +1,16 @@ > +/* { dg-require-effective-target powerpc_altivec_ok } */ > +/* { dg-options "-maltivec -mno-vsx" } */ > + > +/* Verify there is no ICE but one expected error message instead. */ > + > +#include > + > +extern vector signed __int128 res_vslll; > +extern unsigned long long aull[2]; > + > +void > +testVectorInt128Pack () > +{ > + res_vslll =3D __builtin_pack_vector_int128 (aull[0], aull[1]); /* { > dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */ > +} > + > -- > 2.25.1 > --00000000000054db3c05fddeeb6b--