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From: David Edelsohn <dje.gcc@gmail.com>
To: Michael Meissner <meissner@linux.vnet.ibm.com>,
	GCC Patches <gcc-patches@gcc.gnu.org>,
		Pat Haugen <pthaugen@us.ibm.com>,
	Peter Bergner <bergner@vnet.ibm.com>
Subject: Re: [PATCH, rs6000] power8 patches, patch #4 (revised), new power8 builtins
Date: Thu, 06 Jun 2013 15:57:00 -0000	[thread overview]
Message-ID: <CAGWvnykTZBMXCWu3Xe3mndpYQ01gLWuBpJRMzte=3HF1ohJYvA@mail.gmail.com> (raw)
In-Reply-To: <20130605161332.GB5774@ibm-tiger.the-meissners.org>

On Wed, Jun 5, 2013 at 12:13 PM, Michael Meissner
<meissner@linux.vnet.ibm.com> wrote:
> On Wed, Jun 05, 2013 at 10:28:02AM -0400, David Edelsohn wrote:
>> +;; The canonical form is to have the negated elment first, so we need to
>> +;; reverse arguments.
>>
>> Please fix the typo in the comment: "element".
>
> Ok.  I need to proof-read the patches before sending them out.
>
>> +;; Like VSX_L, but don't support TImode for doing logical instructions in
>> +;; 32-bit
>> +(define_mode_iterator VSX_L2 [V16QI V8HI V4SI V2DI V4SF V2DF])
>> +
>>  ;; Iterator for memory move.  Handle TImode specially to allow
>>  ;; it to use gprs as well as vsx registers.
>>  (define_mode_iterator VSX_M [V16QI V8HI V4SI V2DI V4SF V2DF])
>>
>> +(define_mode_iterator VSX_M2 [V16QI
>> +                  V8HI
>> +                  V4SI
>> +                  V2DI
>> +                  V4SF
>> +                  V2DF
>> +                  (TI    "TARGET_VSX_TIMODE")])
>>
>> The patch adds new iterators VSX_L2 and VSX_M2.  The original
>> ChangeLog only mentioned M2 and the new ChangeLog only mentions L2.
>> What's going on?
>
> I thought I had deleted VSX_M2 from this patch.  It will be needed in patch #8
> for the fusion peephole.  The difference is VSX_L2 avoids TImode altogether,
> and was used by the logical ops to prevent TImode operations in VSX registers
> in 32-bit.
>
> The problem is unless we have expanders/splitters for logical DImode, the
> compiler when it wants to do a logical DImode operation says, aha I have a
> TImode operation, and then it converts the DImode value to TImode, does the
> operation (which in turn may mean transfer between GPR and VSX registers).
>
> I can add splitters and such for 32-bit DImode to prevent this, but I don't
> know if you want me to do it in the context of this patch, or do it as a later
> patch.

Okay, the revised patch #4 is okay with the typos fixed and either the
ChangeLog or the patch adjusted for iterators VSX_L2 and VSX_M2 -- the
ChangeLog and patch need to match.

But I view this as a preliminary step.  The logical instructions need
an iterator and TImode needs to be cleaned up on 32 bit.

Thanks, David

  parent reply	other threads:[~2013-06-06 15:57 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-20 20:41 [PATCH, rs6000] power8 patches Michael Meissner
2013-05-20 20:49 ` [PATCH, rs6000] power8 patch #1, infrastructure changes Michael Meissner
2013-05-20 21:34   ` [PATCH, rs6000] power8 patch #1, infrastructure changes (revised patch) Michael Meissner
2013-05-22  3:29     ` David Edelsohn
2013-05-20 23:13 ` [PATCH, rs6000] power8 patches, patch #2, add crypto builtins Michael Meissner
2013-05-22  3:30   ` David Edelsohn
2013-05-23  3:41     ` David Edelsohn
2013-05-23  3:59       ` Michael Meissner
2013-05-25  4:07         ` David Edelsohn
2013-05-30 21:04           ` Michael Meissner
2013-05-21  2:11 ` [PATCH, rs6000] power8 patches Peter Bergner
2013-05-21 15:51 ` [PATCH, rs6000] power8 patches, patch #3, add V2DI vector support Michael Meissner
2013-05-23 16:31   ` David Edelsohn
2013-05-21 23:47 ` [PATCH, rs6000] power8 patches, patch #4, new power8 builtins Michael Meissner
2013-05-25  4:03   ` David Edelsohn
2013-05-30 23:26     ` Michael Meissner
2013-05-31  9:14       ` Segher Boessenkool
2013-05-31 15:11         ` Michael Meissner
2013-06-04 18:49   ` [PATCH, rs6000] power8 patches, patch #4 (revised), " Michael Meissner
2013-06-05 14:28     ` David Edelsohn
2013-06-05 15:50       ` Segher Boessenkool
2013-06-05 16:05         ` Michael Meissner
2013-06-05 20:06           ` Segher Boessenkool
2013-06-05 20:24             ` Michael Meissner
2013-06-05 16:13       ` Michael Meissner
2013-06-05 17:28         ` David Edelsohn
2013-06-06 15:57         ` David Edelsohn [this message]
2013-06-06 21:42           ` Michael Meissner
2013-07-15 21:48           ` Michael Meissner
2013-07-20 19:12             ` David Edelsohn
2013-07-23 21:24               ` Michael Meissner
2013-05-21 23:49 ` [PATCH, rs6000] power8 patches, patch #5, new vector tests Michael Meissner
2013-06-06 21:51   ` Michael Meissner
2013-05-22 14:26 ` [PATCH, rs6000] power8 patches, patch #6, direct move & basic quad load/store Michael Meissner
2013-05-29 19:53   ` David Edelsohn
2013-05-29 20:32     ` Michael Meissner
2013-06-10 15:41       ` David Edelsohn
2013-06-10 20:26         ` Michael Meissner
2013-05-22 16:51 ` [PATCH, rs6000] power8 patches, patch #7, quad/byte/half-word atomic instructions Michael Meissner
2013-05-29 20:29   ` David Edelsohn
2013-05-29 20:36     ` Michael Meissner
2013-06-11 23:56     ` Michael Meissner
2013-06-12 21:55       ` David Edelsohn
2013-05-22 20:53 ` [PATCH, rs6000] power8 patches, patch #8, power8 load fusion + misc Michael Meissner
2013-06-18 18:30   ` David Edelsohn
2013-06-24 16:32     ` Michael Meissner
2013-06-24 19:43       ` David Edelsohn
2013-07-29 18:46   ` [PATCH, rs6000] power8 patches, revised patch #8, power8 load fusion Michael Meissner
2013-07-31 16:00     ` David Edelsohn
2013-11-23 16:48     ` Alan Modra
2013-06-07 19:22 ` [PATCH, rs6000] power8 patches, patch #9, power8 scheduling Pat Haugen
2013-06-19 13:00   ` David Edelsohn

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